Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/src/arm/imx6sll-kobo-librah2o.dts
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1 // SPDX-License-Identifier: (GPL-2.0) 2 /* 3 * Device tree for the Kobo Libra H2O ebook reader 4 * 5 * Name on mainboard is: 37NB-E70K0M+6A3 6 * Serials start with: E70K02 (a number also seen in 7 * vendor kernel sources) 8 * 9 * This mainboard seems to be equipped with different SoCs. 10 * In the Kobo Libra H2O ebook reader it is an i.MX6SLL 11 * 12 * Copyright 2021 Andreas Kemnade 13 * based on works 14 * Copyright 2016 Freescale Semiconductor, Inc. 15 */ 16 17 /dts-v1/; 18 19 #include <dt-bindings/input/input.h> 20 #include <dt-bindings/gpio/gpio.h> 21 #include "imx6sll.dtsi" 22 #include "e70k02.dtsi" 23 24 / { 25 model = "Kobo Libra H2O"; 26 compatible = "kobo,librah2o", "fsl,imx6sll"; 27 }; 28 29 &clks { 30 assigned-clocks = <&clks IMX6SLL_CLK_PLL4_AUDIO_DIV>; 31 assigned-clock-rates = <393216000>; 32 }; 33 34 &cpu0 { 35 arm-supply = <&dcdc3_reg>; 36 soc-supply = <&dcdc1_reg>; 37 }; 38 39 &gpio_keys { 40 pinctrl-names = "default"; 41 pinctrl-0 = <&pinctrl_gpio_keys>; 42 }; 43 44 &i2c1 { 45 pinctrl-names = "default","sleep"; 46 pinctrl-0 = <&pinctrl_i2c1>; 47 pinctrl-1 = <&pinctrl_i2c1_sleep>; 48 }; 49 50 &i2c2 { 51 pinctrl-names = "default","sleep"; 52 pinctrl-0 = <&pinctrl_i2c2>; 53 pinctrl-1 = <&pinctrl_i2c2_sleep>; 54 }; 55 56 &i2c3 { 57 pinctrl-names = "default"; 58 pinctrl-0 = <&pinctrl_i2c3>; 59 }; 60 61 &iomuxc { 62 pinctrl-names = "default"; 63 pinctrl-0 = <&pinctrl_hog>; 64 65 pinctrl_gpio_keys: gpio-keysgrp { 66 fsl,pins = < 67 MX6SLL_PAD_GPIO4_IO25__GPIO4_IO25 0x17059 /* PWR_SW */ 68 MX6SLL_PAD_GPIO4_IO23__GPIO4_IO23 0x17059 /* HALL_EN */ 69 MX6SLL_PAD_KEY_COL4__GPIO4_IO00 0x17059 /* PAGE_UP */ 70 MX6SLL_PAD_KEY_COL5__GPIO4_IO02 0x17059 /* PAGE_DOWN */ 71 >; 72 }; 73 74 pinctrl_hog: hoggrp { 75 fsl,pins = < 76 MX6SLL_PAD_LCD_DATA01__GPIO2_IO21 0x79 77 MX6SLL_PAD_LCD_DATA04__GPIO2_IO24 0x79 78 MX6SLL_PAD_LCD_DATA05__GPIO2_IO25 0x79 79 MX6SLL_PAD_LCD_DATA06__GPIO2_IO26 0x79 80 MX6SLL_PAD_LCD_DATA07__GPIO2_IO27 0x79 81 MX6SLL_PAD_LCD_DATA08__GPIO2_IO28 0x79 82 MX6SLL_PAD_LCD_DATA09__GPIO2_IO29 0x79 83 MX6SLL_PAD_LCD_DATA10__GPIO2_IO30 0x79 84 MX6SLL_PAD_LCD_DATA11__GPIO2_IO31 0x79 85 MX6SLL_PAD_LCD_DATA12__GPIO3_IO00 0x79 86 MX6SLL_PAD_LCD_DATA13__GPIO3_IO01 0x79 87 MX6SLL_PAD_LCD_DATA14__GPIO3_IO02 0x79 88 MX6SLL_PAD_LCD_DATA15__GPIO3_IO03 0x79 89 MX6SLL_PAD_LCD_DATA16__GPIO3_IO04 0x79 90 MX6SLL_PAD_LCD_DATA17__GPIO3_IO05 0x79 91 MX6SLL_PAD_LCD_DATA18__GPIO3_IO06 0x79 92 MX6SLL_PAD_LCD_DATA19__GPIO3_IO07 0x79 93 MX6SLL_PAD_LCD_DATA20__GPIO3_IO08 0x79 94 MX6SLL_PAD_LCD_DATA21__GPIO3_IO09 0x79 95 MX6SLL_PAD_LCD_DATA22__GPIO3_IO10 0x79 96 MX6SLL_PAD_LCD_DATA23__GPIO3_IO11 0x79 97 MX6SLL_PAD_LCD_CLK__GPIO2_IO15 0x79 98 MX6SLL_PAD_LCD_ENABLE__GPIO2_IO16 0x79 99 MX6SLL_PAD_LCD_HSYNC__GPIO2_IO17 0x79 100 MX6SLL_PAD_LCD_VSYNC__GPIO2_IO18 0x79 101 MX6SLL_PAD_LCD_RESET__GPIO2_IO19 0x79 102 MX6SLL_PAD_GPIO4_IO21__GPIO4_IO21 0x79 103 MX6SLL_PAD_GPIO4_IO26__GPIO4_IO26 0x79 104 MX6SLL_PAD_KEY_COL3__GPIO3_IO30 0x79 105 MX6SLL_PAD_KEY_ROW7__GPIO4_IO07 0x79 106 MX6SLL_PAD_ECSPI2_MOSI__GPIO4_IO13 0x79 107 >; 108 }; 109 110 pinctrl_i2c1: i2c1grp { 111 fsl,pins = < 112 MX6SLL_PAD_I2C1_SCL__I2C1_SCL 0x4001f8b1 113 MX6SLL_PAD_I2C1_SDA__I2C1_SDA 0x4001f8b1 114 >; 115 }; 116 117 pinctrl_i2c1_sleep: i2c1grp-sleep { 118 fsl,pins = < 119 MX6SLL_PAD_I2C1_SCL__I2C1_SCL 0x400108b1 120 MX6SLL_PAD_I2C1_SDA__I2C1_SDA 0x400108b1 121 >; 122 }; 123 124 pinctrl_i2c2: i2c2grp { 125 fsl,pins = < 126 MX6SLL_PAD_I2C2_SCL__I2C2_SCL 0x4001f8b1 127 MX6SLL_PAD_I2C2_SDA__I2C2_SDA 0x4001f8b1 128 >; 129 }; 130 131 pinctrl_i2c2_sleep: i2c2grp-sleep { 132 fsl,pins = < 133 MX6SLL_PAD_I2C2_SCL__I2C2_SCL 0x400108b1 134 MX6SLL_PAD_I2C2_SDA__I2C2_SDA 0x400108b1 135 >; 136 }; 137 138 pinctrl_i2c3: i2c3grp { 139 fsl,pins = < 140 MX6SLL_PAD_REF_CLK_24M__I2C3_SCL 0x4001f8b1 141 MX6SLL_PAD_REF_CLK_32K__I2C3_SDA 0x4001f8b1 142 >; 143 }; 144 145 pinctrl_led: ledgrp { 146 fsl,pins = < 147 MX6SLL_PAD_GPIO4_IO17__GPIO4_IO17 0x10059 148 >; 149 }; 150 151 pinctrl_lm3630a_bl_gpio: lm3630a-bl-gpiogrp { 152 fsl,pins = < 153 MX6SLL_PAD_EPDC_PWR_CTRL3__GPIO2_IO10 0x10059 /* HWEN */ 154 >; 155 }; 156 157 pinctrl_ricoh_gpio: ricoh-gpiogrp { 158 fsl,pins = < 159 MX6SLL_PAD_GPIO4_IO20__GPIO4_IO20 0x1b8b1 /* ricoh619 chg */ 160 MX6SLL_PAD_GPIO4_IO19__GPIO4_IO19 0x1b8b1 /* ricoh619 irq */ 161 MX6SLL_PAD_KEY_COL2__GPIO3_IO28 0x1b8b1 /* ricoh619 bat_low_int */ 162 >; 163 }; 164 165 pinctrl_uart1: uart1grp { 166 fsl,pins = < 167 MX6SLL_PAD_UART1_TXD__UART1_DCE_TX 0x1b0b1 168 MX6SLL_PAD_UART1_RXD__UART1_DCE_RX 0x1b0b1 169 >; 170 }; 171 172 pinctrl_usbotg1: usbotg1grp { 173 fsl,pins = < 174 MX6SLL_PAD_EPDC_PWR_COM__USB_OTG1_ID 0x17059 175 >; 176 }; 177 178 pinctrl_usdhc1: usdhc1grp { 179 fsl,pins = < 180 MX6SLL_PAD_SD1_CMD__SD1_CMD 0x17059 181 MX6SLL_PAD_SD1_CLK__SD1_CLK 0x17059 182 MX6SLL_PAD_SD1_DATA0__SD1_DATA0 0x17059 183 MX6SLL_PAD_SD1_DATA1__SD1_DATA1 0x17059 184 MX6SLL_PAD_SD1_DATA2__SD1_DATA2 0x17059 185 MX6SLL_PAD_SD1_DATA3__SD1_DATA3 0x17059 186 MX6SLL_PAD_SD1_DATA4__SD1_DATA4 0x17059 187 MX6SLL_PAD_SD1_DATA5__SD1_DATA5 0x17059 188 MX6SLL_PAD_SD1_DATA6__SD1_DATA6 0x17059 189 MX6SLL_PAD_SD1_DATA7__SD1_DATA7 0x17059 190 >; 191 }; 192 193 pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp { 194 fsl,pins = < 195 MX6SLL_PAD_SD1_CMD__SD1_CMD 0x170b9 196 MX6SLL_PAD_SD1_CLK__SD1_CLK 0x170b9 197 MX6SLL_PAD_SD1_DATA0__SD1_DATA0 0x170b9 198 MX6SLL_PAD_SD1_DATA1__SD1_DATA1 0x170b9 199 MX6SLL_PAD_SD1_DATA2__SD1_DATA2 0x170b9 200 MX6SLL_PAD_SD1_DATA3__SD1_DATA3 0x170b9 201 MX6SLL_PAD_SD1_DATA4__SD1_DATA4 0x170b9 202 MX6SLL_PAD_SD1_DATA5__SD1_DATA5 0x170b9 203 MX6SLL_PAD_SD1_DATA6__SD1_DATA6 0x170b9 204 MX6SLL_PAD_SD1_DATA7__SD1_DATA7 0x170b9 205 >; 206 }; 207 208 pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp { 209 fsl,pins = < 210 MX6SLL_PAD_SD1_CMD__SD1_CMD 0x170f9 211 MX6SLL_PAD_SD1_CLK__SD1_CLK 0x170f9 212 MX6SLL_PAD_SD1_DATA0__SD1_DATA0 0x170f9 213 MX6SLL_PAD_SD1_DATA1__SD1_DATA1 0x170f9 214 MX6SLL_PAD_SD1_DATA2__SD1_DATA2 0x170f9 215 MX6SLL_PAD_SD1_DATA3__SD1_DATA3 0x170f9 216 MX6SLL_PAD_SD1_DATA4__SD1_DATA4 0x170b9 217 MX6SLL_PAD_SD1_DATA5__SD1_DATA5 0x170b9 218 MX6SLL_PAD_SD1_DATA6__SD1_DATA6 0x170b9 219 MX6SLL_PAD_SD1_DATA7__SD1_DATA7 0x170b9 220 >; 221 }; 222 223 pinctrl_usdhc1_sleep: usdhc1-sleepgrp { 224 fsl,pins = < 225 MX6SLL_PAD_SD1_CMD__SD1_CMD 0x10059 226 MX6SLL_PAD_SD1_CLK__SD1_CLK 0x10059 227 MX6SLL_PAD_SD1_DATA0__SD1_DATA0 0x10059 228 MX6SLL_PAD_SD1_DATA1__SD1_DATA1 0x10059 229 MX6SLL_PAD_SD1_DATA2__SD1_DATA2 0x10059 230 MX6SLL_PAD_SD1_DATA3__SD1_DATA3 0x10059 231 MX6SLL_PAD_SD1_DATA4__SD1_DATA4 0x10059 232 MX6SLL_PAD_SD1_DATA5__SD1_DATA5 0x10059 233 MX6SLL_PAD_SD1_DATA6__SD1_DATA6 0x10059 234 MX6SLL_PAD_SD1_DATA7__SD1_DATA7 0x10059 235 >; 236 }; 237 238 pinctrl_usdhc3: usdhc3grp { 239 fsl,pins = < 240 MX6SLL_PAD_SD3_CMD__SD3_CMD 0x11059 241 MX6SLL_PAD_SD3_CLK__SD3_CLK 0x11059 242 MX6SLL_PAD_SD3_DATA0__SD3_DATA0 0x11059 243 MX6SLL_PAD_SD3_DATA1__SD3_DATA1 0x11059 244 MX6SLL_PAD_SD3_DATA2__SD3_DATA2 0x11059 245 MX6SLL_PAD_SD3_DATA3__SD3_DATA3 0x11059 246 >; 247 }; 248 249 pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp { 250 fsl,pins = < 251 MX6SLL_PAD_SD3_CMD__SD3_CMD 0x170b9 252 MX6SLL_PAD_SD3_CLK__SD3_CLK 0x170b9 253 MX6SLL_PAD_SD3_DATA0__SD3_DATA0 0x170b9 254 MX6SLL_PAD_SD3_DATA1__SD3_DATA1 0x170b9 255 MX6SLL_PAD_SD3_DATA2__SD3_DATA2 0x170b9 256 MX6SLL_PAD_SD3_DATA3__SD3_DATA3 0x170b9 257 >; 258 }; 259 260 pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp { 261 fsl,pins = < 262 MX6SLL_PAD_SD3_CMD__SD3_CMD 0x170f9 263 MX6SLL_PAD_SD3_CLK__SD3_CLK 0x170f9 264 MX6SLL_PAD_SD3_DATA0__SD3_DATA0 0x170f9 265 MX6SLL_PAD_SD3_DATA1__SD3_DATA1 0x170f9 266 MX6SLL_PAD_SD3_DATA2__SD3_DATA2 0x170f9 267 MX6SLL_PAD_SD3_DATA3__SD3_DATA3 0x170f9 268 >; 269 }; 270 271 pinctrl_usdhc3_sleep: usdhc3-sleepgrp { 272 fsl,pins = < 273 MX6SLL_PAD_SD3_CMD__GPIO5_IO21 0x100c1 274 MX6SLL_PAD_SD3_CLK__GPIO5_IO18 0x100c1 275 MX6SLL_PAD_SD3_DATA0__GPIO5_IO19 0x100c1 276 MX6SLL_PAD_SD3_DATA1__GPIO5_IO20 0x100c1 277 MX6SLL_PAD_SD3_DATA2__GPIO5_IO16 0x100c1 278 MX6SLL_PAD_SD3_DATA3__GPIO5_IO17 0x100c1 279 >; 280 }; 281 282 pinctrl_wifi_power: wifi-powergrp { 283 fsl,pins = < 284 MX6SLL_PAD_SD2_DATA6__GPIO4_IO29 0x10059 /* WIFI_3V3_ON */ 285 >; 286 }; 287 288 pinctrl_wifi_reset: wifi-resetgrp { 289 fsl,pins = < 290 MX6SLL_PAD_SD2_DATA7__GPIO5_IO00 0x10059 /* WIFI_RST */ 291 >; 292 }; 293 }; 294 295 &leds { 296 pinctrl-names = "default"; 297 pinctrl-0 = <&pinctrl_led>; 298 }; 299 300 &lm3630a { 301 pinctrl-names = "default"; 302 pinctrl-0 = <&pinctrl_lm3630a_bl_gpio>; 303 }; 304 305 ®_wifi { 306 pinctrl-names = "default"; 307 pinctrl-0 = <&pinctrl_wifi_power>; 308 }; 309 310 &ricoh619 { 311 pinctrl-names = "default"; 312 pinctrl-0 = <&pinctrl_ricoh_gpio>; 313 }; 314 315 &uart1 { 316 pinctrl-names = "default"; 317 pinctrl-0 = <&pinctrl_uart1>; 318 }; 319 320 &usdhc1 { 321 pinctrl-names = "default", "state_100mhz", "state_200mhz","sleep"; 322 pinctrl-0 = <&pinctrl_usdhc1>; 323 pinctrl-1 = <&pinctrl_usdhc1_100mhz>; 324 pinctrl-2 = <&pinctrl_usdhc1_200mhz>; 325 pinctrl-3 = <&pinctrl_usdhc1_sleep>; 326 }; 327 328 &usdhc3 { 329 pinctrl-names = "default", "state_100mhz", "state_200mhz","sleep"; 330 pinctrl-0 = <&pinctrl_usdhc3>; 331 pinctrl-1 = <&pinctrl_usdhc3_100mhz>; 332 pinctrl-2 = <&pinctrl_usdhc3_200mhz>; 333 pinctrl-3 = <&pinctrl_usdhc3_sleep>; 334 }; 335 336 &wifi_pwrseq { 337 pinctrl-names = "default"; 338 pinctrl-0 = <&pinctrl_wifi_reset>; 339 };
Cache object: 28c1e871fed836dc8307456762967b9d
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