Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/src/arm/imx6ulz-bsh-smm-m2.dts
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1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 2 /* 3 * Copyright (C) 2021 BSH Hausgeraete GmbH 4 */ 5 6 /dts-v1/; 7 8 #include <dt-bindings/input/input.h> 9 #include "imx6ulz.dtsi" 10 11 / { 12 model = "BSH SMM M2"; 13 compatible = "bsh,imx6ulz-bsh-smm-m2", "fsl,imx6ull", "fsl,imx6ulz"; 14 15 chosen { 16 stdout-path = &uart4; 17 }; 18 19 usdhc2_pwrseq: usdhc2-pwrseq { 20 compatible = "mmc-pwrseq-simple"; 21 reset-gpios = <&gpio2 21 GPIO_ACTIVE_LOW>; 22 }; 23 }; 24 25 &gpmi { 26 pinctrl-names = "default"; 27 pinctrl-0 = <&pinctrl_gpmi_nand>; 28 nand-on-flash-bbt; 29 status = "okay"; 30 }; 31 32 &snvs_poweroff { 33 status = "okay"; 34 }; 35 36 &uart3 { 37 pinctrl-names = "default"; 38 pinctrl-0 = <&pinctrl_uart3>; 39 uart-has-rtscts; 40 status = "okay"; 41 42 bluetooth { 43 compatible = "brcm,bcm4330-bt"; 44 max-speed = <3000000>; 45 shutdown-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>; 46 device-wakeup-gpios = <&gpio2 17 GPIO_ACTIVE_HIGH>; 47 host-wakeup-gpios = <&gpio2 13 GPIO_ACTIVE_HIGH>; 48 }; 49 }; 50 51 &uart4 { 52 pinctrl-names = "default"; 53 pinctrl-0 = <&pinctrl_uart4>; 54 status = "okay"; 55 }; 56 57 &usbotg1 { 58 dr_mode = "peripheral"; 59 srp-disable; 60 hnp-disable; 61 adp-disable; 62 status = "okay"; 63 }; 64 65 &usbphy1 { 66 fsl,tx-d-cal = <106>; 67 }; 68 69 &usdhc2 { 70 #address-cells = <1>; 71 #size-cells = <0>; 72 pinctrl-names = "default"; 73 pinctrl-0 = <&pinctrl_wlan>; 74 bus-width = <4>; 75 no-1-8-v; 76 non-removable; 77 cap-power-off-card; 78 keep-power-in-suspend; 79 cap-sdio-irq; 80 mmc-pwrseq = <&usdhc2_pwrseq>; 81 status = "okay"; 82 83 brcmf: wifi@1 { 84 reg = <1>; 85 compatible = "brcm,bcm4329-fmac"; 86 interrupt-parent = <&gpio1>; 87 interrupts = <18 IRQ_TYPE_LEVEL_HIGH>; 88 interrupt-names = "host-wake"; 89 }; 90 }; 91 92 &wdog1 { 93 status = "okay"; 94 }; 95 96 &iomuxc { 97 pinctrl_gpmi_nand: gpmi-nand { 98 fsl,pins = < 99 MX6UL_PAD_NAND_CLE__RAWNAND_CLE 0xb0b1 100 MX6UL_PAD_NAND_ALE__RAWNAND_ALE 0xb0b1 101 MX6UL_PAD_NAND_WP_B__RAWNAND_WP_B 0xb0b1 102 MX6UL_PAD_NAND_READY_B__RAWNAND_READY_B 0xb000 103 MX6UL_PAD_NAND_CE0_B__RAWNAND_CE0_B 0xb0b1 104 MX6UL_PAD_NAND_RE_B__RAWNAND_RE_B 0xb0b1 105 MX6UL_PAD_NAND_WE_B__RAWNAND_WE_B 0xb0b1 106 MX6UL_PAD_NAND_DATA00__RAWNAND_DATA00 0xb0b1 107 MX6UL_PAD_NAND_DATA01__RAWNAND_DATA01 0xb0b1 108 MX6UL_PAD_NAND_DATA02__RAWNAND_DATA02 0xb0b1 109 MX6UL_PAD_NAND_DATA03__RAWNAND_DATA03 0xb0b1 110 MX6UL_PAD_NAND_DATA04__RAWNAND_DATA04 0xb0b1 111 MX6UL_PAD_NAND_DATA05__RAWNAND_DATA05 0xb0b1 112 MX6UL_PAD_NAND_DATA06__RAWNAND_DATA06 0xb0b1 113 MX6UL_PAD_NAND_DATA07__RAWNAND_DATA07 0xb0b1 114 >; 115 }; 116 117 pinctrl_uart3: uart3grp { 118 fsl,pins = < 119 MX6UL_PAD_UART3_TX_DATA__UART3_DCE_TX 0x1b0b1 120 MX6UL_PAD_UART3_RX_DATA__UART3_DCE_RX 0x1b099 121 MX6UL_PAD_UART3_RTS_B__UART3_DCE_RTS 0x1b0b1 122 MX6UL_PAD_UART3_CTS_B__UART3_DCE_CTS 0x1b099 123 MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0x79 /* BT_REG_ON */ 124 MX6UL_PAD_SD1_CLK__GPIO2_IO17 0x100b1 /* BT_DEV_WAKE out */ 125 MX6UL_PAD_ENET2_TX_EN__GPIO2_IO13 0x1b0b0 /* BT_HOST_WAKE in */ 126 >; 127 }; 128 129 pinctrl_uart4: uart4grp { 130 fsl,pins = < 131 MX6UL_PAD_UART4_TX_DATA__UART4_DCE_TX 0x1b0b1 132 MX6UL_PAD_UART4_RX_DATA__UART4_DCE_RX 0x1b0b1 133 >; 134 }; 135 136 pinctrl_wlan: wlangrp { 137 fsl,pins = < 138 MX6UL_PAD_CSI_HSYNC__USDHC2_CMD 0x17059 139 MX6UL_PAD_CSI_VSYNC__USDHC2_CLK 0x10059 140 MX6UL_PAD_CSI_DATA00__USDHC2_DATA0 0x17059 141 MX6UL_PAD_CSI_DATA01__USDHC2_DATA1 0x17059 142 MX6UL_PAD_CSI_DATA02__USDHC2_DATA2 0x17059 143 MX6UL_PAD_CSI_DATA03__USDHC2_DATA3 0x17059 144 MX6UL_PAD_SD1_DATA3__GPIO2_IO21 0x79 /* WL_REG_ON */ 145 MX6UL_PAD_UART2_CTS_B__GPIO1_IO22 0x100b1 /* WL_DEV_WAKE - WiFi_GPIO_4 - WiFi FW UART */ 146 MX6UL_PAD_UART1_CTS_B__GPIO1_IO18 0x1b0b1 /* WL_HOST_WAKE - WIFI_GPIO_0 - OOB IRQ */ 147 MX6UL_PAD_ENET1_RX_EN__OSC32K_32K_OUT 0x4001b031 /* OSC 32Khz wifi clk in */ 148 >; 149 }; 150 };
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