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     1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
    2 /*
    3  * Copyright (C) 2019
    4  * Author(s): Giulio Benetti <giulio.benetti@benettiengineering.com>
    5  */
    6 
    7 /dts-v1/;
    8 #include "imxrt1050.dtsi"
    9 #include "imxrt1050-pinfunc.h"
   10 
   11 / {
   12         model = "NXP IMXRT1050-evk board";
   13         compatible = "fsl,imxrt1050-evk", "fsl,imxrt1050";
   14 
   15         chosen {
   16                 stdout-path = &lpuart1;
   17         };
   18 
   19         aliases {
   20                 gpio0 = &gpio1;
   21                 gpio1 = &gpio2;
   22                 gpio2 = &gpio3;
   23                 gpio3 = &gpio4;
   24                 gpio4 = &gpio5;
   25                 mmc0 = &usdhc1;
   26                 serial0 = &lpuart1;
   27         };
   28 
   29         memory@80000000 {
   30                 device_type = "memory";
   31                 reg = <0x80000000 0x2000000>;
   32         };
   33 };
   34 
   35 &lpuart1 {
   36         pinctrl-names = "default";
   37         pinctrl-0 = <&pinctrl_lpuart1>;
   38         status = "okay";
   39 };
   40 
   41 &iomuxc {
   42         pinctrl-names = "default";
   43         pinctrl_lpuart1: lpuart1grp {
   44                 fsl,pins = <
   45                         MXRT1050_IOMUXC_GPIO_AD_B0_12_LPUART1_TXD       0xf1
   46                         MXRT1050_IOMUXC_GPIO_AD_B0_13_LPUART1_RXD       0xf1
   47                 >;
   48         };
   49 
   50         pinctrl_usdhc0: usdhc0grp {
   51                 fsl,pins = <
   52                         MXRT1050_IOMUXC_GPIO_B1_12_USDHC1_CD_B          0x1B000
   53                         MXRT1050_IOMUXC_GPIO_B1_14_USDHC1_VSELECT       0xB069
   54                         MXRT1050_IOMUXC_GPIO_SD_B0_00_USDHC1_CMD        0x17061
   55                         MXRT1050_IOMUXC_GPIO_SD_B0_01_USDHC1_CLK        0x17061
   56                         MXRT1050_IOMUXC_GPIO_SD_B0_05_USDHC1_DATA3      0x17061
   57                         MXRT1050_IOMUXC_GPIO_SD_B0_04_USDHC1_DATA2      0x17061
   58                         MXRT1050_IOMUXC_GPIO_SD_B0_03_USDHC1_DATA1      0x17061
   59                         MXRT1050_IOMUXC_GPIO_SD_B0_02_USDHC1_DATA0      0x17061
   60                 >;
   61         };
   62 };
   63 
   64 &usdhc1 {
   65         pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
   66         pinctrl-0 = <&pinctrl_usdhc0>;
   67         pinctrl-1 = <&pinctrl_usdhc0>;
   68         pinctrl-2 = <&pinctrl_usdhc0>;
   69         pinctrl-3 = <&pinctrl_usdhc0>;
   70         cd-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>;
   71         status = "okay";
   72 };
Cache object: 4b70f51c1d8982c319fced55930ddea6 
 
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