keystone-k2hk-clocks.dtsi

Version: - FREEBSD - FREEBSD-13-STABLE - FREEBSD-13-0 - FREEBSD-12-STABLE - FREEBSD-12-0 - FREEBSD-11-STABLE - FREEBSD-11-0 - FREEBSD-10-STABLE - FREEBSD-10-0 - FREEBSD-9-STABLE - FREEBSD-9-0 - FREEBSD-8-STABLE - FREEBSD-8-0 - FREEBSD-7-STABLE - FREEBSD-7-0 - FREEBSD-6-STABLE - FREEBSD-6-0 - FREEBSD-5-STABLE - FREEBSD-5-0 - FREEBSD-4-STABLE - FREEBSD-3-STABLE - FREEBSD22 - l41 - OPENBSD - linux-2.6 - MK84 - PLAN9 - xnu-8792
SearchContext: - none - 3 - 10
    1 // SPDX-License-Identifier: GPL-2.0
    2 /*
    3  * Keystone 2 Kepler/Hawking SoC clock nodes
    4  *
    5  * Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/
    6  */
    7 
    8 clocks {
    9         armpllclk: armpllclk@2620370 {
   10                 #clock-cells = <0>;
   11                 compatible = "ti,keystone,pll-clock";
   12                 clocks = <&refclkarm>;
   13                 clock-output-names = "arm-pll-clk";
   14                 reg = <0x02620370 4>;
   15                 reg-names = "control";
   16         };
   17 
   18         mainpllclk: mainpllclk@2310110 {
   19                 #clock-cells = <0>;
   20                 compatible = "ti,keystone,main-pll-clock";
   21                 clocks = <&refclksys>;
   22                 reg = <0x02620350 4>, <0x02310110 4>, <0x02310108 4>;
   23                 reg-names = "control", "multiplier", "post-divider";
   24         };
   25 
   26         papllclk: papllclk@2620358 {
   27                 #clock-cells = <0>;
   28                 compatible = "ti,keystone,pll-clock";
   29                 clocks = <&refclkpass>;
   30                 clock-output-names = "papllclk";
   31                 reg = <0x02620358 4>;
   32                 reg-names = "control";
   33         };
   34 
   35         ddr3apllclk: ddr3apllclk@2620360 {
   36                 #clock-cells = <0>;
   37                 compatible = "ti,keystone,pll-clock";
   38                 clocks = <&refclkddr3a>;
   39                 clock-output-names = "ddr-3a-pll-clk";
   40                 reg = <0x02620360 4>;
   41                 reg-names = "control";
   42         };
   43 
   44         ddr3bpllclk: ddr3bpllclk@2620368 {
   45                 #clock-cells = <0>;
   46                 compatible = "ti,keystone,pll-clock";
   47                 clocks = <&refclkddr3b>;
   48                 clock-output-names = "ddr-3b-pll-clk";
   49                 reg = <0x02620368 4>;
   50                 reg-names = "control";
   51         };
   52 
   53         clktsip: clktsip@2350000 {
   54                 #clock-cells = <0>;
   55                 compatible = "ti,keystone,psc-clock";
   56                 clocks = <&chipclk16>;
   57                 clock-output-names = "tsip";
   58                 reg = <0x02350000 0xb00>, <0x02350000 0x400>;
   59                 reg-names = "control", "domain";
   60                 domain-id = <0>;
   61         };
   62 
   63         clksrio: clksrio@235002c {
   64                 #clock-cells = <0>;
   65                 compatible = "ti,keystone,psc-clock";
   66                 clocks = <&chipclk1rstiso13>;
   67                 clock-output-names = "srio";
   68                 reg = <0x0235002c 0xb00>, <0x02350010 0x400>;
   69                 reg-names = "control", "domain";
   70                 domain-id = <4>;
   71         };
   72 
   73         clkhyperlink0: clkhyperlink0@2350030 {
   74                 #clock-cells = <0>;
   75                 compatible = "ti,keystone,psc-clock";
   76                 clocks = <&chipclk12>;
   77                 clock-output-names = "hyperlink-0";
   78                 reg = <0x02350030 0xb00>, <0x02350014 0x400>;
   79                 reg-names = "control", "domain";
   80                 domain-id = <5>;
   81         };
   82 
   83         clkgem1: clkgem1@2350040 {
   84                 #clock-cells = <0>;
   85                 compatible = "ti,keystone,psc-clock";
   86                 clocks = <&chipclk1>;
   87                 clock-output-names = "gem1";
   88                 reg = <0x02350040 0xb00>, <0x02350024 0x400>;
   89                 reg-names = "control", "domain";
   90                 domain-id = <9>;
   91         };
   92 
   93         clkgem2: clkgem2@2350044 {
   94                 #clock-cells = <0>;
   95                 compatible = "ti,keystone,psc-clock";
   96                 clocks = <&chipclk1>;
   97                 clock-output-names = "gem2";
   98                 reg = <0x02350044 0xb00>, <0x02350028 0x400>;
   99                 reg-names = "control", "domain";
  100                 domain-id = <10>;
  101         };
  102 
  103         clkgem3: clkgem3@2350048 {
  104                 #clock-cells = <0>;
  105                 compatible = "ti,keystone,psc-clock";
  106                 clocks = <&chipclk1>;
  107                 clock-output-names = "gem3";
  108                 reg = <0x02350048 0xb00>, <0x0235002c 0x400>;
  109                 reg-names = "control", "domain";
  110                 domain-id = <11>;
  111         };
  112 
  113         clkgem4: clkgem4@235004c {
  114                 #clock-cells = <0>;
  115                 compatible = "ti,keystone,psc-clock";
  116                 clocks = <&chipclk1>;
  117                 clock-output-names = "gem4";
  118                 reg = <0x0235004c 0xb00>, <0x02350030 0x400>;
  119                 reg-names = "control", "domain";
  120                 domain-id = <12>;
  121         };
  122 
  123         clkgem5: clkgem5@2350050 {
  124                 #clock-cells = <0>;
  125                 compatible = "ti,keystone,psc-clock";
  126                 clocks = <&chipclk1>;
  127                 clock-output-names = "gem5";
  128                 reg = <0x02350050 0xb00>, <0x02350034 0x400>;
  129                 reg-names = "control", "domain";
  130                 domain-id = <13>;
  131         };
  132 
  133         clkgem6: clkgem6@2350054 {
  134                 #clock-cells = <0>;
  135                 compatible = "ti,keystone,psc-clock";
  136                 clocks = <&chipclk1>;
  137                 clock-output-names = "gem6";
  138                 reg = <0x02350054 0xb00>, <0x02350038 0x400>;
  139                 reg-names = "control", "domain";
  140                 domain-id = <14>;
  141         };
  142 
  143         clkgem7: clkgem7@2350058 {
  144                 #clock-cells = <0>;
  145                 compatible = "ti,keystone,psc-clock";
  146                 clocks = <&chipclk1>;
  147                 clock-output-names = "gem7";
  148                 reg = <0x02350058 0xb00>, <0x0235003c 0x400>;
  149                 reg-names = "control", "domain";
  150                 domain-id = <15>;
  151         };
  152 
  153         clkddr31: clkddr31@2350060 {
  154                 #clock-cells = <0>;
  155                 compatible = "ti,keystone,psc-clock";
  156                 clocks = <&chipclk13>;
  157                 clock-output-names = "ddr3-1";
  158                 reg = <0x02350060 0xb00>, <0x02350040 0x400>;
  159                 reg-names = "control", "domain";
  160                 domain-id = <16>;
  161         };
  162 
  163         clktac: clktac@2350064 {
  164                 #clock-cells = <0>;
  165                 compatible = "ti,keystone,psc-clock";
  166                 clocks = <&chipclk13>;
  167                 clock-output-names = "tac";
  168                 reg = <0x02350064 0xb00>, <0x02350044 0x400>;
  169                 reg-names = "control", "domain";
  170                 domain-id = <17>;
  171         };
  172 
  173         clkrac01: clkrac01@2350068 {
  174                 #clock-cells = <0>;
  175                 compatible = "ti,keystone,psc-clock";
  176                 clocks = <&chipclk13>;
  177                 clock-output-names = "rac-01";
  178                 reg = <0x02350068 0xb00>, <0x02350044 0x400>;
  179                 reg-names = "control", "domain";
  180                 domain-id = <17>;
  181         };
  182 
  183         clkrac23: clkrac23@235006c {
  184                 #clock-cells = <0>;
  185                 compatible = "ti,keystone,psc-clock";
  186                 clocks = <&chipclk13>;
  187                 clock-output-names = "rac-23";
  188                 reg = <0x0235006c 0xb00>, <0x02350048 0x400>;
  189                 reg-names = "control", "domain";
  190                 domain-id = <18>;
  191         };
  192 
  193         clkfftc0: clkfftc0@2350070 {
  194                 #clock-cells = <0>;
  195                 compatible = "ti,keystone,psc-clock";
  196                 clocks = <&chipclk13>;
  197                 clock-output-names = "fftc-0";
  198                 reg = <0x02350070 0xb00>, <0x0235004c 0x400>;
  199                 reg-names = "control", "domain";
  200                 domain-id = <19>;
  201         };
  202 
  203         clkfftc1: clkfftc1@2350074 {
  204                 #clock-cells = <0>;
  205                 compatible = "ti,keystone,psc-clock";
  206                 clocks = <&chipclk13>;
  207                 clock-output-names = "fftc-1";
  208                 reg = <0x02350074 0xb00>, <0x0235004c 0x400>;
  209                 reg-names = "control", "domain";
  210                 domain-id = <19>;
  211         };
  212 
  213         clkfftc2: clkfftc2@2350078 {
  214                 #clock-cells = <0>;
  215                 compatible = "ti,keystone,psc-clock";
  216                 clocks = <&chipclk13>;
  217                 clock-output-names = "fftc-2";
  218                 reg = <0x02350078 0xb00>, <0x02350050 0x400>;
  219                 reg-names = "control", "domain";
  220                 domain-id = <20>;
  221         };
  222 
  223         clkfftc3: clkfftc3@235007c {
  224                 #clock-cells = <0>;
  225                 compatible = "ti,keystone,psc-clock";
  226                 clocks = <&chipclk13>;
  227                 clock-output-names = "fftc-3";
  228                 reg = <0x0235007c 0xb00>, <0x02350050 0x400>;
  229                 reg-names = "control", "domain";
  230                 domain-id = <20>;
  231         };
  232 
  233         clkfftc4: clkfftc4@2350080 {
  234                 #clock-cells = <0>;
  235                 compatible = "ti,keystone,psc-clock";
  236                 clocks = <&chipclk13>;
  237                 clock-output-names = "fftc-4";
  238                 reg = <0x02350080 0xb00>, <0x02350050 0x400>;
  239                 reg-names = "control", "domain";
  240                 domain-id = <20>;
  241         };
  242 
  243         clkfftc5: clkfftc5@2350084 {
  244                 #clock-cells = <0>;
  245                 compatible = "ti,keystone,psc-clock";
  246                 clocks = <&chipclk13>;
  247                 clock-output-names = "fftc-5";
  248                 reg = <0x02350084 0xb00>, <0x02350050 0x400>;
  249                 reg-names = "control", "domain";
  250                 domain-id = <20>;
  251         };
  252 
  253         clkaif: clkaif@2350088 {
  254                 #clock-cells = <0>;
  255                 compatible = "ti,keystone,psc-clock";
  256                 clocks = <&chipclk13>;
  257                 clock-output-names = "aif";
  258                 reg = <0x02350088 0xb00>, <0x02350054 0x400>;
  259                 reg-names = "control", "domain";
  260                 domain-id = <21>;
  261         };
  262 
  263         clktcp3d0: clktcp3d0@235008c {
  264                 #clock-cells = <0>;
  265                 compatible = "ti,keystone,psc-clock";
  266                 clocks = <&chipclk13>;
  267                 clock-output-names = "tcp3d-0";
  268                 reg = <0x0235008c 0xb00>, <0x02350058 0x400>;
  269                 reg-names = "control", "domain";
  270                 domain-id = <22>;
  271         };
  272 
  273         clktcp3d1: clktcp3d1@2350090 {
  274                 #clock-cells = <0>;
  275                 compatible = "ti,keystone,psc-clock";
  276                 clocks = <&chipclk13>;
  277                 clock-output-names = "tcp3d-1";
  278                 reg = <0x02350090 0xb00>, <0x02350058 0x400>;
  279                 reg-names = "control", "domain";
  280                 domain-id = <22>;
  281         };
  282 
  283         clktcp3d2: clktcp3d2@2350094 {
  284                 #clock-cells = <0>;
  285                 compatible = "ti,keystone,psc-clock";
  286                 clocks = <&chipclk13>;
  287                 clock-output-names = "tcp3d-2";
  288                 reg = <0x02350094 0xb00>, <0x0235005c 0x400>;
  289                 reg-names = "control", "domain";
  290                 domain-id = <23>;
  291         };
  292 
  293         clktcp3d3: clktcp3d3@2350098 {
  294                 #clock-cells = <0>;
  295                 compatible = "ti,keystone,psc-clock";
  296                 clocks = <&chipclk13>;
  297                 clock-output-names = "tcp3d-3";
  298                 reg = <0x02350098 0xb00>, <0x0235005c 0x400>;
  299                 reg-names = "control", "domain";
  300                 domain-id = <23>;
  301         };
  302 
  303         clkvcp0: clkvcp0@235009c {
  304                 #clock-cells = <0>;
  305                 compatible = "ti,keystone,psc-clock";
  306                 clocks = <&chipclk13>;
  307                 clock-output-names = "vcp-0";
  308                 reg = <0x0235009c 0xb00>, <0x02350060 0x400>;
  309                 reg-names = "control", "domain";
  310                 domain-id = <24>;
  311         };
  312 
  313         clkvcp1: clkvcp1@23500a0 {
  314                 #clock-cells = <0>;
  315                 compatible = "ti,keystone,psc-clock";
  316                 clocks = <&chipclk13>;
  317                 clock-output-names = "vcp-1";
  318                 reg = <0x023500a0 0xb00>, <0x02350060 0x400>;
  319                 reg-names = "control", "domain";
  320                 domain-id = <24>;
  321         };
  322 
  323         clkvcp2: clkvcp2@23500a4 {
  324                 #clock-cells = <0>;
  325                 compatible = "ti,keystone,psc-clock";
  326                 clocks = <&chipclk13>;
  327                 clock-output-names = "vcp-2";
  328                 reg = <0x023500a4 0xb00>, <0x02350060 0x400>;
  329                 reg-names = "control", "domain";
  330                 domain-id = <24>;
  331         };
  332 
  333         clkvcp3: clkvcp3@23500a8 {
  334                 #clock-cells = <0>;
  335                 compatible = "ti,keystone,psc-clock";
  336                 clocks = <&chipclk13>;
  337                 clock-output-names = "vcp-3";
  338                 reg = <0x023500a8 0xb00>, <0x02350060 0x400>;
  339                 reg-names = "control", "domain";
  340                 domain-id = <24>;
  341         };
  342 
  343         clkvcp4: clkvcp4@23500ac {
  344                 #clock-cells = <0>;
  345                 compatible = "ti,keystone,psc-clock";
  346                 clocks = <&chipclk13>;
  347                 clock-output-names = "vcp-4";
  348                 reg = <0x023500ac 0xb00>, <0x02350064 0x400>;
  349                 reg-names = "control", "domain";
  350                 domain-id = <25>;
  351         };
  352 
  353         clkvcp5: clkvcp5@23500b0 {
  354                 #clock-cells = <0>;
  355                 compatible = "ti,keystone,psc-clock";
  356                 clocks = <&chipclk13>;
  357                 clock-output-names = "vcp-5";
  358                 reg = <0x023500b0 0xb00>, <0x02350064 0x400>;
  359                 reg-names = "control", "domain";
  360                 domain-id = <25>;
  361         };
  362 
  363         clkvcp6: clkvcp6@23500b4 {
  364                 #clock-cells = <0>;
  365                 compatible = "ti,keystone,psc-clock";
  366                 clocks = <&chipclk13>;
  367                 clock-output-names = "vcp-6";
  368                 reg = <0x023500b4 0xb00>, <0x02350064 0x400>;
  369                 reg-names = "control", "domain";
  370                 domain-id = <25>;
  371         };
  372 
  373         clkvcp7: clkvcp7@23500b8 {
  374                 #clock-cells = <0>;
  375                 compatible = "ti,keystone,psc-clock";
  376                 clocks = <&chipclk13>;
  377                 clock-output-names = "vcp-7";
  378                 reg = <0x023500b8 0xb00>, <0x02350064 0x400>;
  379                 reg-names = "control", "domain";
  380                 domain-id = <25>;
  381         };
  382 
  383         clkbcp: clkbcp@23500bc {
  384                 #clock-cells = <0>;
  385                 compatible = "ti,keystone,psc-clock";
  386                 clocks = <&chipclk13>;
  387                 clock-output-names = "bcp";
  388                 reg = <0x023500bc 0xb00>, <0x02350068 0x400>;
  389                 reg-names = "control", "domain";
  390                 domain-id = <26>;
  391         };
  392 
  393         clkdxb: clkdxb@23500c0 {
  394                 #clock-cells = <0>;
  395                 compatible = "ti,keystone,psc-clock";
  396                 clocks = <&chipclk13>;
  397                 clock-output-names = "dxb";
  398                 reg = <0x023500c0 0xb00>, <0x0235006c 0x400>;
  399                 reg-names = "control", "domain";
  400                 domain-id = <27>;
  401         };
  402 
  403         clkhyperlink1: clkhyperlink1@23500c4 {
  404                 #clock-cells = <0>;
  405                 compatible = "ti,keystone,psc-clock";
  406                 clocks = <&chipclk12>;
  407                 clock-output-names = "hyperlink-1";
  408                 reg = <0x023500c4 0xb00>, <0x02350070 0x400>;
  409                 reg-names = "control", "domain";
  410                 domain-id = <28>;
  411         };
  412 
  413         clkxge: clkxge@23500c8 {
  414                 #clock-cells = <0>;
  415                 compatible = "ti,keystone,psc-clock";
  416                 clocks = <&chipclk13>;
  417                 clock-output-names = "xge";
  418                 reg = <0x023500c8 0xb00>, <0x02350074 0x400>;
  419                 reg-names = "control", "domain";
  420                 domain-id = <29>;
  421         };
  422 };
Cache object: 2e4b2f982ce18aa3f62a914f70919b9f
[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]
This page is part of the FreeBSD/Linux Linux Kernel Cross-Reference, and was automatically generated using a modified version of the LXR engine.
FreeBSD/Linux Kernel Cross Reference sys/contrib/device-tree/src/arm/keystone-k2hk-clocks.dtsi

FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/src/arm/keystone-k2hk-clocks.dtsi
