1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3 * lan966x_pcb8291.dts - Device Tree file for PCB8291
4 */
5 /dts-v1/;
6 #include "lan966x.dtsi"
7 #include "dt-bindings/phy/phy-lan966x-serdes.h"
8
9 / {
10 model = "Microchip EVB - LAN9662";
11 compatible = "microchip,lan9662-pcb8291", "microchip,lan9662", "microchip,lan966";
12
13 chosen {
14 stdout-path = "serial0:115200n8";
15 };
16
17 aliases {
18 serial0 = &usart3;
19 };
20
21 gpio-restart {
22 compatible = "gpio-restart";
23 gpios = <&gpio 56 GPIO_ACTIVE_LOW>;
24 priority = <200>;
25 };
26 };
27
28 &gpio {
29 fc3_b_pins: fc3-b-pins {
30 /* RX, TX */
31 pins = "GPIO_52", "GPIO_53";
32 function = "fc3_b";
33 };
34
35 can0_b_pins: can0-b-pins {
36 /* RX, TX */
37 pins = "GPIO_35", "GPIO_36";
38 function = "can0_b";
39 };
40 };
41
42 &can0 {
43 pinctrl-0 = <&can0_b_pins>;
44 pinctrl-names = "default";
45 status = "disabled"; /* Conflict with switch */
46 };
47
48 &flx3 {
49 atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>;
50 status = "okay";
51
52 usart3: serial@200 {
53 pinctrl-0 = <&fc3_b_pins>;
54 pinctrl-names = "default";
55 status = "okay";
56 };
57 };
58
59 &mdio1 {
60 status = "okay";
61 };
62
63 &phy0 {
64 status = "okay";
65 };
66
67 &phy1 {
68 status = "okay";
69 };
70
71 &port0 {
72 phy-handle = <&phy0>;
73 phy-mode = "gmii";
74 phys = <&serdes 0 CU(0)>;
75 status = "okay";
76 };
77
78 &port1 {
79 phy-handle = <&phy1>;
80 phy-mode = "gmii";
81 phys = <&serdes 1 CU(1)>;
82 status = "okay";
83 };
84
85 &serdes {
86 status = "okay";
87 };
88
89 &switch {
90 status = "okay";
91 };
92
93 &watchdog {
94 status = "okay";
95 };
Cache object: f642f5e72ec82f633409a6c81baa6640
|