lan966x.dtsi

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    1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
    2 /*
    3  * lan966x.dtsi - Device Tree Include file for Microchip LAN966 family SoC
    4  *
    5  * Copyright (C) 2021 Microchip Technology, Inc. and its subsidiaries
    6  *
    7  * Author: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com>
    8  *
    9  */
   10 
   11 #include <dt-bindings/interrupt-controller/irq.h>
   12 #include <dt-bindings/interrupt-controller/arm-gic.h>
   13 #include <dt-bindings/mfd/atmel-flexcom.h>
   14 #include <dt-bindings/dma/at91.h>
   15 #include <dt-bindings/gpio/gpio.h>
   16 #include <dt-bindings/clock/microchip,lan966x.h>
   17 
   18 / {
   19         model = "Microchip LAN966 family SoC";
   20         compatible = "microchip,lan966";
   21         interrupt-parent = <&gic>;
   22         #address-cells = <1>;
   23         #size-cells = <1>;
   24 
   25         cpus {
   26                 #address-cells = <1>;
   27                 #size-cells = <0>;
   28 
   29                 cpu@0 {
   30                         device_type = "cpu";
   31                         compatible = "arm,cortex-a7";
   32                         clock-frequency = <600000000>;
   33                         reg = <0x0>;
   34                 };
   35         };
   36 
   37         clocks {
   38                 sys_clk: sys_clk {
   39                         compatible = "fixed-clock";
   40                         #clock-cells = <0>;
   41                         clock-frequency = <165625000>;
   42                 };
   43 
   44                 cpu_clk: cpu_clk {
   45                         compatible = "fixed-clock";
   46                         #clock-cells = <0>;
   47                         clock-frequency = <600000000>;
   48                 };
   49 
   50                 ddr_clk: ddr_clk {
   51                         compatible = "fixed-clock";
   52                         #clock-cells = <0>;
   53                         clock-frequency = <300000000>;
   54                 };
   55 
   56                 nic_clk: nic_clk {
   57                         compatible = "fixed-clock";
   58                         #clock-cells = <0>;
   59                         clock-frequency = <200000000>;
   60                 };
   61         };
   62 
   63         clks: clock-controller@e00c00a8 {
   64                 compatible = "microchip,lan966x-gck";
   65                 #clock-cells = <1>;
   66                 clocks = <&cpu_clk>, <&ddr_clk>, <&sys_clk>;
   67                 clock-names = "cpu", "ddr", "sys";
   68                 reg = <0xe00c00a8 0x38>, <0xe00c02cc 0x4>;
   69         };
   70 
   71         timer {
   72                 compatible = "arm,armv7-timer";
   73                 interrupt-parent = <&gic>;
   74                 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
   75                              <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
   76                              <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
   77                              <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>;
   78                 clock-frequency = <37500000>;
   79         };
   80 
   81         soc {
   82                 compatible = "simple-bus";
   83                 #address-cells = <1>;
   84                 #size-cells = <1>;
   85                 ranges;
   86 
   87                 udc: usb@200000 {
   88                         compatible = "microchip,lan9662-udc",
   89                                      "atmel,sama5d3-udc";
   90                         reg = <0x00200000 0x80000>,
   91                               <0xe0808000 0x400>;
   92                         interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
   93                         clocks = <&clks GCK_GATE_UDPHS>, <&nic_clk>;
   94                         clock-names = "pclk", "hclk";
   95                         status = "disabled";
   96                 };
   97 
   98                 switch: switch@e0000000 {
   99                         compatible = "microchip,lan966x-switch";
  100                         reg = <0xe0000000 0x0100000>,
  101                               <0xe2000000 0x0800000>;
  102                         reg-names = "cpu", "gcb";
  103                         interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
  104                                      <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
  105                                      <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
  106                                      <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
  107                                      <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
  108                         interrupt-names = "xtr", "fdma", "ana", "ptp",
  109                                           "ptp-ext";
  110                         resets = <&reset 0>;
  111                         reset-names = "switch";
  112                         status = "disabled";
  113 
  114                         ethernet-ports {
  115                                 #address-cells = <1>;
  116                                 #size-cells = <0>;
  117 
  118                                 port0: port@0 {
  119                                         reg = <0>;
  120                                         status = "disabled";
  121                                 };
  122 
  123                                 port1: port@1 {
  124                                         reg = <1>;
  125                                         status = "disabled";
  126                                 };
  127 
  128                                 port2: port@2 {
  129                                         reg = <2>;
  130                                         status = "disabled";
  131                                 };
  132 
  133                                 port3: port@3 {
  134                                         reg = <3>;
  135                                         status = "disabled";
  136                                 };
  137 
  138                                 port4: port@4 {
  139                                         reg = <4>;
  140                                         status = "disabled";
  141                                 };
  142 
  143                                 port5: port@5 {
  144                                         reg = <5>;
  145                                         status = "disabled";
  146                                 };
  147 
  148                                 port6: port@6 {
  149                                         reg = <6>;
  150                                         status = "disabled";
  151                                 };
  152 
  153                                 port7: port@7 {
  154                                         reg = <7>;
  155                                         status = "disabled";
  156                                 };
  157                         };
  158                 };
  159 
  160                 flx0: flexcom@e0040000 {
  161                         compatible = "atmel,sama5d2-flexcom";
  162                         reg = <0xe0040000 0x100>;
  163                         clocks = <&clks GCK_ID_FLEXCOM0>;
  164                         #address-cells = <1>;
  165                         #size-cells = <1>;
  166                         ranges = <0x0 0xe0040000 0x800>;
  167                         status = "disabled";
  168 
  169                         usart0: serial@200 {
  170                                 compatible = "atmel,at91sam9260-usart";
  171                                 reg = <0x200 0x200>;
  172                                 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
  173                                 dmas = <&dma0 AT91_XDMAC_DT_PERID(3)>,
  174                                        <&dma0 AT91_XDMAC_DT_PERID(2)>;
  175                                 dma-names = "tx", "rx";
  176                                 clocks = <&nic_clk>;
  177                                 clock-names = "usart";
  178                                 atmel,fifo-size = <32>;
  179                                 status = "disabled";
  180                         };
  181 
  182                         spi0: spi@400 {
  183                                 compatible = "atmel,at91rm9200-spi";
  184                                 reg = <0x400 0x200>;
  185                                 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
  186                                 dmas = <&dma0 AT91_XDMAC_DT_PERID(3)>,
  187                                        <&dma0 AT91_XDMAC_DT_PERID(2)>;
  188                                 dma-names = "tx", "rx";
  189                                 clocks = <&nic_clk>;
  190                                 clock-names = "spi_clk";
  191                                 atmel,fifo-size = <32>;
  192                                 #address-cells = <1>;
  193                                 #size-cells = <0>;
  194                                 status = "disabled";
  195                         };
  196 
  197                         i2c0: i2c@600 {
  198                                 compatible = "microchip,sam9x60-i2c";
  199                                 reg = <0x600 0x200>;
  200                                 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
  201                                 dmas = <&dma0 AT91_XDMAC_DT_PERID(3)>,
  202                                        <&dma0 AT91_XDMAC_DT_PERID(2)>;
  203                                 dma-names = "tx", "rx";
  204                                 clocks = <&nic_clk>;
  205                                 #address-cells = <1>;
  206                                 #size-cells = <0>;
  207                                 status = "disabled";
  208                         };
  209                 };
  210 
  211                 flx1: flexcom@e0044000 {
  212                         compatible = "atmel,sama5d2-flexcom";
  213                         reg = <0xe0044000 0x100>;
  214                         clocks = <&clks GCK_ID_FLEXCOM1>;
  215                         #address-cells = <1>;
  216                         #size-cells = <1>;
  217                         ranges = <0x0 0xe0044000 0x800>;
  218                         status = "disabled";
  219 
  220                         usart1: serial@200 {
  221                                 compatible = "atmel,at91sam9260-usart";
  222                                 reg = <0x200 0x200>;
  223                                 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
  224                                 dmas = <&dma0 AT91_XDMAC_DT_PERID(5)>,
  225                                        <&dma0 AT91_XDMAC_DT_PERID(4)>;
  226                                 dma-names = "tx", "rx";
  227                                 clocks = <&nic_clk>;
  228                                 clock-names = "usart";
  229                                 atmel,fifo-size = <32>;
  230                                 status = "disabled";
  231                         };
  232 
  233                         spi1: spi@400 {
  234                                 compatible = "atmel,at91rm9200-spi";
  235                                 reg = <0x400 0x200>;
  236                                 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
  237                                 dmas = <&dma0 AT91_XDMAC_DT_PERID(5)>,
  238                                        <&dma0 AT91_XDMAC_DT_PERID(4)>;
  239                                 dma-names = "tx", "rx";
  240                                 clocks = <&nic_clk>;
  241                                 clock-names = "spi_clk";
  242                                 atmel,fifo-size = <32>;
  243                                 #address-cells = <1>;
  244                                 #size-cells = <0>;
  245                                 status = "disabled";
  246                         };
  247 
  248                         i2c1: i2c@600 {
  249                                 compatible = "microchip,sam9x60-i2c";
  250                                 reg = <0x600 0x200>;
  251                                 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
  252                                 dmas = <&dma0 AT91_XDMAC_DT_PERID(5)>,
  253                                        <&dma0 AT91_XDMAC_DT_PERID(4)>;
  254                                 dma-names = "tx", "rx";
  255                                 clocks = <&nic_clk>;
  256                                 #address-cells = <1>;
  257                                 #size-cells = <0>;
  258                                 status = "disabled";
  259                         };
  260                 };
  261 
  262                 trng: rng@e0048000 {
  263                         compatible = "atmel,at91sam9g45-trng";
  264                         reg = <0xe0048000 0x100>;
  265                         clocks = <&nic_clk>;
  266                 };
  267 
  268                 aes: crypto@e004c000 {
  269                         compatible = "atmel,at91sam9g46-aes";
  270                         reg = <0xe004c000 0x100>;
  271                         interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
  272                         dmas = <&dma0 AT91_XDMAC_DT_PERID(12)>,
  273                                <&dma0 AT91_XDMAC_DT_PERID(13)>;
  274                         dma-names = "tx", "rx";
  275                         clocks = <&nic_clk>;
  276                         clock-names = "aes_clk";
  277                 };
  278 
  279                 flx2: flexcom@e0060000 {
  280                         compatible = "atmel,sama5d2-flexcom";
  281                         reg = <0xe0060000 0x100>;
  282                         clocks = <&clks GCK_ID_FLEXCOM2>;
  283                         #address-cells = <1>;
  284                         #size-cells = <1>;
  285                         ranges = <0x0 0xe0060000 0x800>;
  286                         status = "disabled";
  287 
  288                         usart2: serial@200 {
  289                                 compatible = "atmel,at91sam9260-usart";
  290                                 reg = <0x200 0x200>;
  291                                 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
  292                                 dmas = <&dma0 AT91_XDMAC_DT_PERID(7)>,
  293                                        <&dma0 AT91_XDMAC_DT_PERID(6)>;
  294                                 dma-names = "tx", "rx";
  295                                 clocks = <&nic_clk>;
  296                                 clock-names = "usart";
  297                                 atmel,fifo-size = <32>;
  298                                 status = "disabled";
  299                         };
  300 
  301                         spi2: spi@400 {
  302                                 compatible = "atmel,at91rm9200-spi";
  303                                 reg = <0x400 0x200>;
  304                                 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
  305                                 dmas = <&dma0 AT91_XDMAC_DT_PERID(7)>,
  306                                        <&dma0 AT91_XDMAC_DT_PERID(6)>;
  307                                 dma-names = "tx", "rx";
  308                                 clocks = <&nic_clk>;
  309                                 clock-names = "spi_clk";
  310                                 atmel,fifo-size = <32>;
  311                                 #address-cells = <1>;
  312                                 #size-cells = <0>;
  313                                 status = "disabled";
  314                         };
  315 
  316                         i2c2: i2c@600 {
  317                                 compatible = "microchip,sam9x60-i2c";
  318                                 reg = <0x600 0x200>;
  319                                 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
  320                                 dmas = <&dma0 AT91_XDMAC_DT_PERID(7)>,
  321                                        <&dma0 AT91_XDMAC_DT_PERID(6)>;
  322                                 dma-names = "tx", "rx";
  323                                 clocks = <&nic_clk>;
  324                                 #address-cells = <1>;
  325                                 #size-cells = <0>;
  326                                 status = "disabled";
  327                         };
  328                 };
  329 
  330                 flx3: flexcom@e0064000 {
  331                         compatible = "atmel,sama5d2-flexcom";
  332                         reg = <0xe0064000 0x100>;
  333                         clocks = <&clks GCK_ID_FLEXCOM3>;
  334                         #address-cells = <1>;
  335                         #size-cells = <1>;
  336                         ranges = <0x0 0xe0064000 0x800>;
  337                         status = "disabled";
  338 
  339                         usart3: serial@200 {
  340                                 compatible = "atmel,at91sam9260-usart";
  341                                 reg = <0x200 0x200>;
  342                                 interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
  343                                 dmas = <&dma0 AT91_XDMAC_DT_PERID(9)>,
  344                                        <&dma0 AT91_XDMAC_DT_PERID(8)>;
  345                                 dma-names = "tx", "rx";
  346                                 clocks = <&nic_clk>;
  347                                 clock-names = "usart";
  348                                 atmel,fifo-size = <32>;
  349                                 status = "disabled";
  350                         };
  351 
  352                         spi3: spi@400 {
  353                                 compatible = "atmel,at91rm9200-spi";
  354                                 reg = <0x400 0x200>;
  355                                 interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
  356                                 dmas = <&dma0 AT91_XDMAC_DT_PERID(9)>,
  357                                        <&dma0 AT91_XDMAC_DT_PERID(8)>;
  358                                 dma-names = "tx", "rx";
  359                                 clocks = <&nic_clk>;
  360                                 clock-names = "spi_clk";
  361                                 atmel,fifo-size = <32>;
  362                                 #address-cells = <1>;
  363                                 #size-cells = <0>;
  364                                 status = "disabled";
  365                         };
  366 
  367                         i2c3: i2c@600 {
  368                                 compatible = "microchip,sam9x60-i2c";
  369                                 reg = <0x600 0x200>;
  370                                 interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
  371                                 dmas = <&dma0 AT91_XDMAC_DT_PERID(9)>,
  372                                        <&dma0 AT91_XDMAC_DT_PERID(8)>;
  373                                 dma-names = "tx", "rx";
  374                                 clocks = <&nic_clk>;
  375                                 #address-cells = <1>;
  376                                 #size-cells = <0>;
  377                                 status = "disabled";
  378                         };
  379                 };
  380 
  381                 dma0: dma-controller@e0068000 {
  382                         compatible = "microchip,sama7g5-dma";
  383                         reg = <0xe0068000 0x1000>;
  384                         interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
  385                         #dma-cells = <1>;
  386                         clocks = <&nic_clk>;
  387                         clock-names = "dma_clk";
  388                 };
  389 
  390                 sha: crypto@e006c000 {
  391                         compatible = "atmel,at91sam9g46-sha";
  392                         reg = <0xe006c000 0xec>;
  393                         interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
  394                         dmas = <&dma0 AT91_XDMAC_DT_PERID(14)>;
  395                         dma-names = "tx";
  396                         clocks = <&nic_clk>;
  397                         clock-names = "sha_clk";
  398                 };
  399 
  400                 flx4: flexcom@e0070000 {
  401                         compatible = "atmel,sama5d2-flexcom";
  402                         reg = <0xe0070000 0x100>;
  403                         clocks = <&clks GCK_ID_FLEXCOM4>;
  404                         #address-cells = <1>;
  405                         #size-cells = <1>;
  406                         ranges = <0x0 0xe0070000 0x800>;
  407                         status = "disabled";
  408 
  409                         usart4: serial@200 {
  410                                 compatible = "atmel,at91sam9260-usart";
  411                                 reg = <0x200 0x200>;
  412                                 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
  413                                 dmas = <&dma0 AT91_XDMAC_DT_PERID(11)>,
  414                                        <&dma0 AT91_XDMAC_DT_PERID(10)>;
  415                                 dma-names = "tx", "rx";
  416                                 clocks = <&nic_clk>;
  417                                 clock-names = "usart";
  418                                 atmel,fifo-size = <32>;
  419                                 status = "disabled";
  420                         };
  421 
  422                         spi4: spi@400 {
  423                                 compatible = "atmel,at91rm9200-spi";
  424                                 reg = <0x400 0x200>;
  425                                 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
  426                                 dmas = <&dma0 AT91_XDMAC_DT_PERID(11)>,
  427                                        <&dma0 AT91_XDMAC_DT_PERID(10)>;
  428                                 dma-names = "tx", "rx";
  429                                 clocks = <&nic_clk>;
  430                                 clock-names = "spi_clk";
  431                                 atmel,fifo-size = <32>;
  432                                 #address-cells = <1>;
  433                                 #size-cells = <0>;
  434                                 status = "disabled";
  435                         };
  436 
  437                         i2c4: i2c@600 {
  438                                 compatible = "microchip,sam9x60-i2c";
  439                                 reg = <0x600 0x200>;
  440                                 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
  441                                 dmas = <&dma0 AT91_XDMAC_DT_PERID(11)>,
  442                                        <&dma0 AT91_XDMAC_DT_PERID(10)>;
  443                                 dma-names = "tx", "rx";
  444                                 clocks = <&nic_clk>;
  445                                 #address-cells = <1>;
  446                                 #size-cells = <0>;
  447                                 status = "disabled";
  448                         };
  449                 };
  450 
  451                 timer0: timer@e008c000 {
  452                         compatible = "snps,dw-apb-timer";
  453                         reg = <0xe008c000 0x400>;
  454                         clocks = <&nic_clk>;
  455                         clock-names = "timer";
  456                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
  457                 };
  458 
  459                 watchdog: watchdog@e0090000 {
  460                         compatible = "snps,dw-wdt";
  461                         reg = <0xe0090000 0x1000>;
  462                         interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
  463                         clocks = <&nic_clk>;
  464                         status = "disabled";
  465                 };
  466 
  467                 cpu_ctrl: syscon@e00c0000 {
  468                         compatible = "microchip,lan966x-cpu-syscon", "syscon";
  469                         reg = <0xe00c0000 0x350>;
  470                 };
  471 
  472                 can0: can@e081c000 {
  473                         compatible = "bosch,m_can";
  474                         reg = <0xe081c000 0xfc>, <0x00100000 0x4000>;
  475                         reg-names = "m_can", "message_ram";
  476                         interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
  477                                      <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
  478                         interrupt-names = "int0", "int1";
  479                         clocks = <&clks GCK_ID_MCAN0>, <&clks GCK_ID_MCAN0>;
  480                         clock-names = "hclk", "cclk";
  481                         assigned-clocks = <&clks GCK_ID_MCAN0>;
  482                         assigned-clock-rates = <40000000>;
  483                         bosch,mram-cfg = <0x0 0 0 64 0 0 32 32>;
  484                         status = "disabled";
  485                 };
  486 
  487                 can1: can@e0820000 {
  488                         compatible = "bosch,m_can";
  489                         reg = <0xe0820000 0xfc>, <0x00100000 0x8000>;
  490                         reg-names = "m_can", "message_ram";
  491                         interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
  492                                      <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
  493                         interrupt-names = "int0", "int1";
  494                         clocks = <&clks GCK_ID_MCAN1>, <&clks GCK_ID_MCAN1>;
  495                         clock-names = "hclk", "cclk";
  496                         assigned-clocks = <&clks GCK_ID_MCAN1>;
  497                         assigned-clock-rates = <40000000>;
  498                         bosch,mram-cfg = <0x4000 0 0 64 0 0 32 32>;
  499                         status = "disabled";
  500                 };
  501 
  502                 reset: reset-controller@e200400c {
  503                         compatible = "microchip,lan966x-switch-reset";
  504                         reg = <0xe200400c 0x4>;
  505                         reg-names = "gcb";
  506                         #reset-cells = <1>;
  507                         cpu-syscon = <&cpu_ctrl>;
  508                 };
  509 
  510                 gpio: pinctrl@e2004064 {
  511                         compatible = "microchip,lan966x-pinctrl";
  512                         reg = <0xe2004064 0xb4>,
  513                             <0xe2010024 0x138>;
  514                         resets = <&reset 0>;
  515                         reset-names = "switch";
  516                         gpio-controller;
  517                         #gpio-cells = <2>;
  518                         gpio-ranges = <&gpio 0 0 78>;
  519                         interrupt-controller;
  520                         interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
  521                         #interrupt-cells = <2>;
  522                 };
  523 
  524                 mdio0: mdio@e2004118 {
  525                         compatible = "microchip,lan966x-miim";
  526                         #address-cells = <1>;
  527                         #size-cells = <0>;
  528                         reg = <0xe2004118 0x24>;
  529                         clocks = <&sys_clk>;
  530                         status = "disabled";
  531                 };
  532 
  533                 mdio1: mdio@e200413c {
  534                         compatible = "microchip,lan966x-miim";
  535                         #address-cells = <1>;
  536                         #size-cells = <0>;
  537                         reg = <0xe200413c 0x24>,
  538                               <0xe2010020 0x4>;
  539                         clocks = <&sys_clk>;
  540                         status = "disabled";
  541 
  542                         phy0: ethernet-phy@1 {
  543                                 reg = <1>;
  544                                 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
  545                                 status = "disabled";
  546                         };
  547 
  548                         phy1: ethernet-phy@2 {
  549                                 reg = <2>;
  550                                 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
  551                                 status = "disabled";
  552                         };
  553                 };
  554 
  555                 sgpio: gpio@e2004190 {
  556                         compatible = "microchip,sparx5-sgpio";
  557                         reg = <0xe2004190 0x118>;
  558                         clocks = <&sys_clk>;
  559                         resets = <&reset 0>;
  560                         reset-names = "switch";
  561                         #address-cells = <1>;
  562                         #size-cells = <0>;
  563                         status = "disabled";
  564 
  565                         sgpio_in: gpio@0 {
  566                                 compatible = "microchip,sparx5-sgpio-bank";
  567                                 reg = <0>;
  568                                 gpio-controller;
  569                                 #gpio-cells = <3>;
  570                                 interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
  571                                 interrupt-controller;
  572                                 #interrupt-cells = <3>;
  573                         };
  574 
  575                         sgpio_out: gpio@1 {
  576                                 compatible = "microchip,sparx5-sgpio-bank";
  577                                 reg = <1>;
  578                                 gpio-controller;
  579                                 #gpio-cells = <3>;
  580                         };
  581                 };
  582 
  583                 hwmon: hwmon@e2010180 {
  584                         compatible = "microchip,lan9668-hwmon";
  585                         reg = <0xe2010180 0xc>,
  586                               <0xe20042a8 0xc>;
  587                         reg-names = "pvt", "fan";
  588                         clocks = <&sys_clk>;
  589                 };
  590 
  591                 serdes: serdes@e202c000 {
  592                         compatible = "microchip,lan966x-serdes";
  593                         reg = <0xe202c000 0x9c>,
  594                               <0xe2004010 0x4>;
  595                         #phy-cells = <2>;
  596                         status = "disabled";
  597                 };
  598 
  599                 gic: interrupt-controller@e8c11000 {
  600                         compatible = "arm,gic-400", "arm,cortex-a7-gic";
  601                         #interrupt-cells = <3>;
  602                         interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
  603                         interrupt-controller;
  604                         reg = <0xe8c11000 0x1000>,
  605                               <0xe8c12000 0x2000>,
  606                               <0xe8c14000 0x2000>,
  607                               <0xe8c16000 0x2000>;
  608                 };
  609         };
  610 };
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FreeBSD/Linux Kernel Cross Reference sys/contrib/device-tree/src/arm/lan966x.dtsi

FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/src/arm/lan966x.dtsi
