The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/src/arm/lpc4337-ciaa.dts

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    1 /*
    2  * CIAA NXP LPC4337 (http://www.proyecto-ciaa.com.ar)
    3  *
    4  * Copyright (C) 2015 VanguardiaSur - www.vanguardiasur.com.ar
    5  *
    6  * This code is released using a dual license strategy: BSD/GPL
    7  * You can choose the licence that better fits your requirements.
    8  *
    9  * Released under the terms of 3-clause BSD License
   10  * Released under the terms of GNU General Public License Version 2.0
   11  */
   12 /dts-v1/;
   13 
   14 #include "lpc18xx.dtsi"
   15 #include "lpc4357.dtsi"
   16 
   17 #include "dt-bindings/gpio/gpio.h"
   18 
   19 / {
   20         model = "CIAA NXP LPC4337";
   21         compatible = "ciaa,lpc4337", "nxp,lpc4337", "nxp,lpc4350";
   22 
   23         aliases {
   24                 serial0 = &uart2;
   25                 serial1 = &uart3;
   26         };
   27 
   28         chosen {
   29                 bootargs = "console=ttyS0,115200 earlyprintk";
   30                 stdout-path = &uart2;
   31         };
   32 
   33         memory@28000000 {
   34                 device_type = "memory";
   35                 reg = <0x28000000 0x0800000>; /* 8 MB */
   36         };
   37 };
   38 
   39 &pinctrl {
   40         enet_rmii_pins: enet-rmii-pins {
   41                 enet_rmii_rxd_cfg {
   42                         pins = "p1_15", "p0_0";
   43                         function = "enet";
   44                         slew-rate = <1>;
   45                         bias-disable;
   46                         input-enable;
   47                         input-schmitt-disable;
   48                 };
   49 
   50                 enet_rmii_txd_cfg {
   51                         pins = "p1_18", "p1_20";
   52                         function = "enet";
   53                         slew-rate = <1>;
   54                         bias-disable;
   55                         input-enable;
   56                         input-schmitt-disable;
   57                 };
   58 
   59                 enet_rmii_rx_dv_cfg {
   60                         pins = "p1_16";
   61                         function = "enet";
   62                         bias-disable;
   63                         input-enable;
   64                         input-schmitt-disable;
   65                 };
   66 
   67                 enet_rmii_tx_en_cfg {
   68                         pins = "p0_1";
   69                         function = "enet";
   70                         bias-disable;
   71                         input-enable;
   72                         input-schmitt-disable;
   73                 };
   74 
   75                 enet_ref_clk_cfg {
   76                         pins = "p1_19";
   77                         function = "enet";
   78                         slew-rate = <1>;
   79                         bias-disable;
   80                         input-enable;
   81                         input-schmitt-disable;
   82                 };
   83 
   84                 enet_mdio_cfg {
   85                         pins = "p1_17";
   86                         function = "enet";
   87                         bias-disable;
   88                         input-enable;
   89                         input-schmitt-disable;
   90                 };
   91 
   92                 enet_mdc_cfg {
   93                         pins = "p7_7";
   94                         function = "enet";
   95                         slew-rate = <1>;
   96                         bias-disable;
   97                         input-enable;
   98                         input-schmitt-disable;
   99                 };
  100         };
  101 
  102         i2c0_pins: i2c0-pins {
  103                 i2c0_pins_cfg {
  104                         pins = "i2c0_scl", "i2c0_sda";
  105                         function = "i2c0";
  106                         input-enable;
  107                 };
  108         };
  109 
  110         ssp_pins: ssp-pins {
  111                 ssp1_cs {
  112                         pins = "p6_7";
  113                         function = "gpio";
  114                         bias-pull-up;
  115                         bias-disable;
  116                 };
  117 
  118                 ssp1_miso_mosi {
  119                         pins = "p1_3", "p1_4";
  120                         function = "ssp1";
  121                         slew-rate = <1>;
  122                         bias-pull-down;
  123                         input-enable;
  124                         input-schmitt-disable;
  125                 };
  126 
  127                 ssp1_sck {
  128                         pins = "pf_4";
  129                         function = "ssp1";
  130                         slew-rate = <1>;
  131                         bias-disable;
  132                 };
  133         };
  134 
  135         uart2_pins: uart2-pins {
  136                 uart2_rx_cfg {
  137                         pins = "p7_2";
  138                         function = "uart2";
  139                         bias-disable;
  140                         input-enable;
  141                 };
  142 
  143                 uart2_tx_cfg {
  144                         pins = "p7_1";
  145                         function = "uart2";
  146                         bias-disable;
  147                 };
  148         };
  149 
  150         uart3_pins: uart3-pins {
  151                 uart3_rx_cfg {
  152                         pins = "p2_4";
  153                         function = "uart3";
  154                         bias-disable;
  155                         input-enable;
  156                 };
  157 
  158                 uart3_tx_cfg {
  159                         pins = "p2_3";
  160                         function = "uart3";
  161                         bias-disable;
  162                 };
  163         };
  164 };
  165 
  166 &enet_tx_clk {
  167         clock-frequency = <50000000>;
  168 };
  169 
  170 &i2c0 {
  171         status = "okay";
  172         pinctrl-names = "default";
  173         pinctrl-0 = <&i2c0_pins>;
  174         clock-frequency = <400000>;
  175 
  176         eeprom@50 {
  177                 compatible = "microchip,24c512", "atmel,24c512";
  178                 reg = <0x50>;
  179         };
  180 
  181         eeprom@51 {
  182                 compatible = "microchip,24c02", "atmel,24c02";
  183                 reg = <0x51>;
  184         };
  185 
  186         eeprom@54 {
  187                 compatible = "microchip,24c512", "atmel,24c512";
  188                 reg = <0x54>;
  189         };
  190 };
  191 
  192 &mac {
  193         status = "okay";
  194         phy-mode = "rmii";
  195         pinctrl-names = "default";
  196         pinctrl-0 = <&enet_rmii_pins>;
  197 };
  198 
  199 &sct_pwm {
  200         status = "okay";
  201 };
  202 
  203 &ssp1 {
  204         status = "okay";
  205         pinctrl-names = "default";
  206         pinctrl-0 = <&ssp_pins>;
  207         cs-gpios = <&gpio LPC_GPIO(5,15) GPIO_ACTIVE_HIGH>;
  208         num-cs = <1>;
  209 };
  210 
  211 &uart2 {
  212         status = "okay";
  213         pinctrl-names = "default";
  214         pinctrl-0 = <&uart2_pins>;
  215 };
  216 
  217 &uart3 {
  218         status = "okay";
  219         pinctrl-names = "default";
  220         pinctrl-0 = <&uart3_pins>;
  221 };

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