The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/src/arm/moxart.dtsi

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    1 // SPDX-License-Identifier: GPL-2.0-or-later
    2 /* moxart.dtsi - Device Tree Include file for MOXA ART family SoC
    3  *
    4  * Copyright (C) 2013 Jonas Jensen <jonas.jensen@gmail.com>
    5  */
    6 
    7 #include <dt-bindings/interrupt-controller/irq.h>
    8 
    9 / {
   10         #address-cells = <1>;
   11         #size-cells = <1>;
   12         compatible = "moxa,moxart";
   13         model = "MOXART";
   14         interrupt-parent = <&intc>;
   15 
   16         cpus {
   17                 #address-cells = <1>;
   18                 #size-cells = <0>;
   19 
   20                 cpu@0 {
   21                         device_type = "cpu";
   22                         compatible = "faraday,fa526";
   23                         reg = <0>;
   24                 };
   25         };
   26 
   27         clocks {
   28                 #address-cells = <1>;
   29                 #size-cells = <0>;
   30         };
   31 
   32         soc {
   33                 compatible = "simple-bus";
   34                 #address-cells = <1>;
   35                 #size-cells = <1>;
   36                 reg = <0x90000000 0x10000000>;
   37                 ranges;
   38 
   39                 intc: interrupt-controller@98800000 {
   40                         compatible = "moxa,moxart-ic", "faraday,ftintc010";
   41                         reg = <0x98800000 0x100>;
   42                         interrupt-controller;
   43                         #interrupt-cells = <2>;
   44                         interrupt-mask = <0x00080000>;
   45                 };
   46 
   47                 clk_pll: clk_pll@98100000 {
   48                         compatible = "moxa,moxart-pll-clock";
   49                         #clock-cells = <0>;
   50                         reg = <0x98100000 0x34>;
   51                 };
   52 
   53                 clk_apb: clk_apb@98100000 {
   54                         compatible = "moxa,moxart-apb-clock";
   55                         #clock-cells = <0>;
   56                         reg = <0x98100000 0x34>;
   57                         clocks = <&clk_pll>;
   58                 };
   59 
   60                 timer: timer@98400000 {
   61                         compatible = "moxa,moxart-timer", "faraday,fttmr010";
   62                         reg = <0x98400000 0x42>;
   63                         interrupts = <19 IRQ_TYPE_EDGE_FALLING>;
   64                         clocks = <&clk_apb>;
   65                         clock-names = "PCLK";
   66                 };
   67 
   68                 gpio: gpio@98700000 {
   69                         gpio-controller;
   70                         #gpio-cells = <2>;
   71                         compatible = "moxa,moxart-gpio", "faraday,ftgpio010";
   72                         reg = <0x98700000 0x100>;
   73                 };
   74 
   75                 rtc: rtc {
   76                         compatible = "moxa,moxart-rtc";
   77                         gpio-rtc-sclk = <&gpio 5 0>;
   78                         gpio-rtc-data = <&gpio 6 0>;
   79                         gpio-rtc-reset = <&gpio 7 0>;
   80                 };
   81 
   82                 dma: dma@90500000 {
   83                         compatible = "moxa,moxart-dma";
   84                         reg = <0x90500080 0x40>;
   85                         interrupts = <24 IRQ_TYPE_LEVEL_HIGH>;
   86                         #dma-cells = <1>;
   87                 };
   88 
   89                 watchdog: watchdog@98500000 {
   90                         compatible = "moxa,moxart-watchdog", "faraday,ftwdt010";
   91                         reg = <0x98500000 0x10>;
   92                         clocks = <&clk_apb>;
   93                         clock-names = "PCLK";
   94                 };
   95 
   96                 mmc: mmc@98e00000 {
   97                         compatible = "moxa,moxart-mmc";
   98                         reg = <0x98e00000 0x5C>;
   99                         interrupts = <5 IRQ_TYPE_LEVEL_HIGH>;
  100                         clocks = <&clk_apb>;
  101                         dmas =  <&dma 5>,
  102                                 <&dma 5>;
  103                         dma-names = "tx", "rx";
  104                         status = "disabled";
  105                 };
  106 
  107                 mdio0: mdio@90900090 {
  108                         compatible = "moxa,moxart-mdio";
  109                         reg = <0x90900090 0x8>;
  110                         #address-cells = <1>;
  111                         #size-cells = <0>;
  112                         status = "disabled";
  113                 };
  114 
  115                 mdio1: mdio@92000090 {
  116                         compatible = "moxa,moxart-mdio";
  117                         reg = <0x92000090 0x8>;
  118                         #address-cells = <1>;
  119                         #size-cells = <0>;
  120                         status = "disabled";
  121                 };
  122 
  123                 mac0: mac@90900000 {
  124                         compatible = "moxa,moxart-mac";
  125                         reg = <0x90900000 0x90>;
  126                         interrupts = <25 IRQ_TYPE_LEVEL_HIGH>;
  127                         phy-handle = <&ethphy0>;
  128                         phy-mode = "mii";
  129                         status = "disabled";
  130                 };
  131 
  132                 mac1: mac@92000000 {
  133                         compatible = "moxa,moxart-mac";
  134                         reg = <0x92000000 0x90>;
  135                         interrupts = <27 IRQ_TYPE_LEVEL_HIGH>;
  136                         phy-handle = <&ethphy1>;
  137                         phy-mode = "mii";
  138                         status = "disabled";
  139                 };
  140 
  141                 uart0: uart@98200000 {
  142                         compatible = "ns16550a";
  143                         reg = <0x98200000 0x20>;
  144                         interrupts = <31 IRQ_TYPE_LEVEL_HIGH>;
  145                         reg-shift = <2>;
  146                         reg-io-width = <4>;
  147                         clock-frequency = <14745600>;
  148                         status = "disabled";
  149                 };
  150         };
  151 };

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