Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/src/arm/omap3-ha-lcd.dts
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1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ 4 * Copyright (C) 2014 Stefan Roese <sr@denx.de> 5 */ 6 7 #include "omap3-ha-common.dtsi" 8 9 / { 10 model = "TI OMAP3 HEAD acoustics LCD-baseboard with TAO3530 SOM"; 11 compatible = "headacoustics,omap3-ha-lcd", "technexion,omap3-tao3530", "ti,omap3430", "ti,omap34xx", "ti,omap3"; 12 }; 13 14 &omap3_pmx_core { 15 pinctrl-names = "default"; 16 pinctrl-0 = < 17 &hsusbb2_pins 18 &powerdown_input_pins 19 &fpga_boot0_pins 20 &fpga_boot1_pins 21 &led_blue_pins 22 &led_green_pins 23 &led_red_pins 24 &touchscreen_wake_pins 25 >; 26 27 touchscreen_irq_pins: pinmux_touchscreen_irq_pins { 28 pinctrl-single,pins = < 29 OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT_PULLUP | MUX_MODE4) /* gpio_136, Touchscreen IRQ */ 30 >; 31 }; 32 33 touchscreen_wake_pins: pinmux_touchscreen_wake_pins { 34 pinctrl-single,pins = < 35 OMAP3_CORE1_IOPAD(0x212c, PIN_OUTPUT_PULLUP | MUX_MODE4) /* gpio_110, Touchscreen Wake */ 36 >; 37 }; 38 39 dss_dpi_pins: pinmux_dss_dpi_pins { 40 pinctrl-single,pins = < 41 OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */ 42 OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */ 43 OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */ 44 OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */ 45 OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0) /* dss_data0.dss_data0 */ 46 OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0) /* dss_data1.dss_data1 */ 47 OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0) /* dss_data2.dss_data2 */ 48 OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0) /* dss_data3.dss_data3 */ 49 OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0) /* dss_data4.dss_data4 */ 50 OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0) /* dss_data5.dss_data5 */ 51 OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */ 52 OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */ 53 OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */ 54 OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */ 55 OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */ 56 OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */ 57 OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */ 58 OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */ 59 OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */ 60 OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */ 61 OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0) /* dss_data16.dss_data16 */ 62 OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0) /* dss_data17.dss_data17 */ 63 OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE0) /* dss_data18.dss_data18 */ 64 OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE0) /* dss_data19.dss_data19 */ 65 OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE0) /* dss_data20.dss_data20 */ 66 OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE0) /* dss_data21.dss_data21 */ 67 OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE0) /* dss_data22.dss_data22 */ 68 OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE0) /* dss_data23.dss_data23 */ 69 >; 70 }; 71 72 lte430_pins: pinmux_lte430_pins { 73 pinctrl-single,pins = < 74 OMAP3_CORE1_IOPAD(0x2168, PIN_OUTPUT | MUX_MODE4) /* sdmmc2_dat6.gpio_138 */ 75 >; 76 }; 77 78 backlight_pins: pinmux_backlight_pins { 79 pinctrl-single,pins = < 80 OMAP3_CORE1_IOPAD(0x216a, PIN_OUTPUT | MUX_MODE4) /* sdmmc2_dat7.gpio_139 */ 81 >; 82 }; 83 }; 84 85 /* I2C2: mux'ed with GPIO168 which is connected to nKILL_POWER */ 86 &i2c2 { 87 status = "disabled"; 88 }; 89 90 &i2c3 { 91 clock-frequency = <100000>; 92 93 pinctrl-names = "default"; 94 pinctrl-0 = <&i2c3_pins>; 95 }; 96 97 /* Needed to power the DPI pins */ 98 &vpll2 { 99 regulator-always-on; 100 }; 101 102 &dss { 103 status = "okay"; 104 105 pinctrl-names = "default"; 106 pinctrl-0 = <&dss_dpi_pins>; 107 108 port { 109 dpi_out: endpoint { 110 remote-endpoint = <&lcd_in>; 111 data-lines = <24>; 112 }; 113 }; 114 }; 115 116 / { 117 aliases { 118 display0 = &lcd0; 119 }; 120 121 lcd0: display { 122 compatible = "panel-dpi"; 123 label = "lcd"; 124 125 pinctrl-names = "default"; 126 pinctrl-0 = <<e430_pins>; 127 enable-gpios = <&gpio5 10 GPIO_ACTIVE_LOW>; /* gpio_138 */ 128 129 port { 130 lcd_in: endpoint { 131 remote-endpoint = <&dpi_out>; 132 }; 133 }; 134 135 panel-timing { 136 clock-frequency = <31250000>; 137 hactive = <800>; 138 vactive = <480>; 139 hfront-porch = <40>; 140 hback-porch = <86>; 141 hsync-len = <1>; 142 vback-porch = <30>; 143 vfront-porch = <13>; 144 vsync-len = <3>; 145 146 hsync-active = <0>; 147 vsync-active = <0>; 148 de-active = <1>; 149 pixelclk-active = <1>; 150 }; 151 }; 152 153 backlight { 154 compatible = "gpio-backlight"; 155 156 pinctrl-names = "default"; 157 pinctrl-0 = <&backlight_pins>; 158 gpios = <&gpio5 11 GPIO_ACTIVE_HIGH>; /* gpio_139 */ 159 160 default-on; 161 }; 162 };
Cache object: 09cce90a68653086c950f3a00ca192bf
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