omap3-overo-base.dtsi

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    1 // SPDX-License-Identifier: GPL-2.0-only
    2 /*
    3  * Copyright (C) 2012 Florian Vaussard, EPFL Mobots group
    4  */
    5 
    6 /*
    7  * The Gumstix Overo must be combined with an expansion board.
    8  */
    9 
   10 / {
   11 
   12         memory@0 {
   13                 device_type = "memory";
   14                 reg = <0 0>;
   15         };
   16 
   17         led-controller {
   18                 compatible = "pwm-leds";
   19 
   20                 led-1 {
   21                         label = "overo:blue:COM";
   22                         pwms = <&twl_pwmled 1 7812500>;
   23                         max-brightness = <127>;
   24                         linux,default-trigger = "mmc0";
   25                 };
   26         };
   27 
   28         sound {
   29                 compatible = "ti,omap-twl4030";
   30                 ti,model = "overo";
   31 
   32                 ti,mcbsp = <&mcbsp2>;
   33         };
   34 
   35         /* HS USB Port 2 Power */
   36         hsusb2_power: hsusb2_power_reg {
   37                 compatible = "regulator-fixed";
   38                 regulator-name = "hsusb2_vbus";
   39                 regulator-min-microvolt = <5000000>;
   40                 regulator-max-microvolt = <5000000>;
   41                 gpio = <&gpio6 8 GPIO_ACTIVE_HIGH>;             /* gpio_168: vbus enable */
   42                 startup-delay-us = <70000>;
   43                 enable-active-high;
   44         };
   45 
   46         /* HS USB Host PHY on PORT 2 */
   47         hsusb2_phy: hsusb2_phy {
   48                 compatible = "usb-nop-xceiv";
   49                 reset-gpios = <&gpio6 23 GPIO_ACTIVE_LOW>;      /* gpio_183 */
   50                 vcc-supply = <&hsusb2_power>;
   51                 #phy-cells = <0>;
   52         };
   53 
   54         /* Regulator to trigger the nPoweron signal of the Wifi module */
   55         w3cbw003c_npoweron: regulator-w3cbw003c-npoweron {
   56                 compatible = "regulator-fixed";
   57                 regulator-name = "regulator-w3cbw003c-npoweron";
   58                 regulator-min-microvolt = <3300000>;
   59                 regulator-max-microvolt = <3300000>;
   60                 gpio = <&gpio2 22 GPIO_ACTIVE_HIGH>;            /* gpio_54: nPoweron */
   61                 enable-active-high;
   62         };
   63 
   64         /* Regulator to trigger the nReset signal of the Wifi module */
   65         w3cbw003c_wifi_nreset: regulator-w3cbw003c-wifi-nreset {
   66                 pinctrl-names = "default";
   67                 pinctrl-0 = <&w3cbw003c_pins &w3cbw003c_2_pins>;
   68                 compatible = "regulator-fixed";
   69                 regulator-name = "regulator-w3cbw003c-wifi-nreset";
   70                 regulator-min-microvolt = <3300000>;
   71                 regulator-max-microvolt = <3300000>;
   72                 gpio = <&gpio1 16 GPIO_ACTIVE_HIGH>;            /* gpio_16: WiFi nReset */
   73                 startup-delay-us = <10000>;
   74         };
   75 };
   76 
   77 &omap3_pmx_core {
   78         pinctrl-names = "default";
   79         pinctrl-0 = <
   80                         &hsusb2_pins
   81         >;
   82 
   83         uart2_pins: pinmux_uart2_pins {
   84                 pinctrl-single,pins = <
   85                         OMAP3_CORE1_IOPAD(0x216c, PIN_INPUT | MUX_MODE1)        /* mcbsp3_dx.uart2_cts */
   86                         OMAP3_CORE1_IOPAD(0x216e, PIN_OUTPUT | MUX_MODE1)       /* mcbsp3_dr.uart2_rts */
   87                         OMAP3_CORE1_IOPAD(0x2170, PIN_OUTPUT | MUX_MODE1)       /* mcbsp3_clk.uart2_tx */
   88                         OMAP3_CORE1_IOPAD(0x2172, PIN_INPUT | MUX_MODE1)        /* mcbsp3_fsx.uart2_rx */
   89                 >;
   90         };
   91 
   92         i2c1_pins: pinmux_i2c1_pins {
   93                 pinctrl-single,pins = <
   94                         OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0)                /* i2c1_scl.i2c1_scl */
   95                         OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0)                /* i2c1_sda.i2c1_sda */
   96                 >;
   97         };
   98 
   99         mmc1_pins: pinmux_mmc1_pins {
  100                 pinctrl-single,pins = <
  101                         OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc1_clk.sdmmc1_clk */
  102                         OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc1_cmd.sdmmc1_cmd */
  103                         OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc1_dat0.sdmmc1_dat0 */
  104                         OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc1_dat1.sdmmc1_dat1 */
  105                         OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc1_dat2.sdmmc1_dat2 */
  106                         OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc1_dat3.sdmmc1_dat3 */
  107                 >;
  108         };
  109 
  110         mmc2_pins: pinmux_mmc2_pins {
  111                 pinctrl-single,pins = <
  112                         OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc2_clk.sdmmc2_clk */
  113                         OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc2_cmd.sdmmc2_cmd */
  114                         OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc2_dat0.sdmmc2_dat0 */
  115                         OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc2_dat1.sdmmc2_dat1 */
  116                         OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc2_dat2.sdmmc2_dat2 */
  117                         OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc2_dat3.sdmmc2_dat3 */
  118                 >;
  119         };
  120 
  121         /* WiFi/BT combo */
  122         w3cbw003c_pins: pinmux_w3cbw003c_pins {
  123                 pinctrl-single,pins = <
  124                         OMAP3_CORE1_IOPAD(0x20b4, PIN_OUTPUT | MUX_MODE4)               /* gpmc_ncs3.gpio_54 */
  125                         OMAP3_CORE1_IOPAD(0x219c, PIN_OUTPUT | MUX_MODE4)               /* uart3_rts_sd.gpio_164 */
  126                 >;
  127         };
  128 
  129         hsusb2_pins: pinmux_hsusb2_pins {
  130                 pinctrl-single,pins = <
  131                         OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* mcspi1_cs3.hsusb2_data2 */
  132                         OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* mcspi2_clk.hsusb2_data7 */
  133                         OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* mcspi2_simo.hsusb2_data4 */
  134                         OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* mcspi2_somi.hsusb2_data5 */
  135                         OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* mcspi2_cs0.hsusb2_data6 */
  136                         OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* mcspi2_cs1.hsusb2_data3 */
  137                         OMAP3_CORE1_IOPAD(0x21be, PIN_OUTPUT | MUX_MODE4)               /* i2c2_scl.gpio_168 */
  138                         OMAP3_CORE1_IOPAD(0x21c0, PIN_OUTPUT | MUX_MODE4)               /* i2c2_sda.gpio_183 */
  139                 >;
  140         };
  141 };
  142 
  143 &i2c1 {
  144         pinctrl-names = "default";
  145         pinctrl-0 = <&i2c1_pins>;
  146         clock-frequency = <2600000>;
  147 
  148         twl: twl@48 {
  149                 reg = <0x48>;
  150                 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
  151                 interrupt-parent = <&intc>;
  152 
  153                 twl_audio: audio {
  154                         compatible = "ti,twl4030-audio";
  155                         codec {
  156                         };
  157                 };
  158         };
  159 };
  160 
  161 #include "twl4030.dtsi"
  162 #include "twl4030_omap3.dtsi"
  163 
  164 /* i2c2 pins are used for gpio */
  165 &i2c2 {
  166         status = "disabled";
  167 };
  168 
  169 /* on board microSD slot */
  170 &mmc1 {
  171         pinctrl-names = "default";
  172         pinctrl-0 = <&mmc1_pins>;
  173         vmmc-supply = <&vmmc1>;
  174         bus-width = <4>;
  175 };
  176 
  177 /* optional on board WiFi */
  178 &mmc2 {
  179         pinctrl-names = "default";
  180         pinctrl-0 = <&mmc2_pins>;
  181         vmmc-supply = <&w3cbw003c_npoweron>;
  182         vqmmc-supply = <&w3cbw003c_wifi_nreset>;
  183         bus-width = <4>;
  184         cap-sdio-irq;
  185         non-removable;
  186 };
  187 
  188 &twl_gpio {
  189         ti,use-leds;
  190 };
  191 
  192 &usb_otg_hs {
  193         interface-type = <0>;
  194         usb-phy = <&usb2_phy>;
  195         phys = <&usb2_phy>;
  196         phy-names = "usb2-phy";
  197         mode = <3>;
  198         power = <50>;
  199 };
  200 
  201 &usbhshost {
  202         port2-mode = "ehci-phy";
  203 };
  204 
  205 &usbhsehci {
  206         phys = <0 &hsusb2_phy>;
  207 };
  208 
  209 &uart2 {
  210         pinctrl-names = "default";
  211         pinctrl-0 = <&uart2_pins>;
  212 };
  213 
  214 &mcbsp2 {
  215         status = "okay";
  216 };
  217 
  218 &gpmc {
  219         ranges = <0 0 0x30000000 0x1000000>,    /* CS0 */
  220                  <4 0 0x2b000000 0x1000000>,    /* CS4 */
  221                  <5 0 0x2c000000 0x1000000>;    /* CS5 */
  222 
  223         nand@0,0 {
  224                 compatible = "ti,omap2-nand";
  225                 linux,mtd-name = "micron,mt29c4g96maz";
  226                 reg = <0 0 4>;  /* CS0, offset 0, IO size 4 */
  227                 interrupt-parent = <&gpmc>;
  228                 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
  229                              <1 IRQ_TYPE_NONE>; /* termcount */
  230                 nand-bus-width = <16>;
  231                 gpmc,device-width = <2>;
  232                 ti,nand-ecc-opt = "bch8";
  233 
  234                 gpmc,sync-clk-ps = <0>;
  235                 gpmc,cs-on-ns = <0>;
  236                 gpmc,cs-rd-off-ns = <44>;
  237                 gpmc,cs-wr-off-ns = <44>;
  238                 gpmc,adv-on-ns = <6>;
  239                 gpmc,adv-rd-off-ns = <34>;
  240                 gpmc,adv-wr-off-ns = <44>;
  241                 gpmc,we-off-ns = <40>;
  242                 gpmc,oe-off-ns = <54>;
  243                 gpmc,access-ns = <64>;
  244                 gpmc,rd-cycle-ns = <82>;
  245                 gpmc,wr-cycle-ns = <82>;
  246                 gpmc,wr-access-ns = <40>;
  247                 gpmc,wr-data-mux-bus-ns = <0>;
  248 
  249                 #address-cells = <1>;
  250                 #size-cells = <1>;
  251 
  252                 partition@0 {
  253                         label = "SPL";
  254                         reg = <0 0x80000>; /* 512KiB */
  255                 };
  256                 partition@80000 {
  257                         label = "U-Boot";
  258                         reg = <0x80000 0x1C0000>; /* 1792KiB */
  259                 };
  260                 partition@1c0000 {
  261                         label = "Environment";
  262                         reg = <0x240000 0x40000>; /* 256KiB */
  263                 };
  264                 partition@280000 {
  265                         label = "Kernel";
  266                         reg = <0x280000 0x800000>; /* 8192KiB */
  267                 };
  268                 partition@780000 {
  269                         label = "Filesystem";
  270                         reg = <0xA80000 0>;
  271                         /* HACK: MTDPART_SIZ_FULL=0 so fill to end */
  272                 };
  273         };
  274 };
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FreeBSD/Linux Kernel Cross Reference sys/contrib/device-tree/src/arm/omap3-overo-base.dtsi

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sys/contrib/device-tree/src/arm/omap3-overo-base.dtsi
