omap34xx-omap36xx-clocks.dtsi

Version: - FREEBSD - FREEBSD-13-STABLE - FREEBSD-13-0 - FREEBSD-12-STABLE - FREEBSD-12-0 - FREEBSD-11-STABLE - FREEBSD-11-0 - FREEBSD-10-STABLE - FREEBSD-10-0 - FREEBSD-9-STABLE - FREEBSD-9-0 - FREEBSD-8-STABLE - FREEBSD-8-0 - FREEBSD-7-STABLE - FREEBSD-7-0 - FREEBSD-6-STABLE - FREEBSD-6-0 - FREEBSD-5-STABLE - FREEBSD-5-0 - FREEBSD-4-STABLE - FREEBSD-3-STABLE - FREEBSD22 - l41 - OPENBSD - linux-2.6 - MK84 - PLAN9 - xnu-8792
SearchContext: - none - 3 - 10
    1 // SPDX-License-Identifier: GPL-2.0-only
    2 /*
    3  * Device Tree Source for OMAP34XX/OMAP36XX clock data
    4  *
    5  * Copyright (C) 2013 Texas Instruments, Inc.
    6  */
    7 &cm_clocks {
    8         security_l4_ick2: security_l4_ick2 {
    9                 #clock-cells = <0>;
   10                 compatible = "fixed-factor-clock";
   11                 clocks = <&l4_ick>;
   12                 clock-mult = <1>;
   13                 clock-div = <1>;
   14         };
   15 
   16         clock@a14 {
   17                 compatible = "ti,clksel";
   18                 reg = <0xa14>;
   19                 #clock-cells = <2>;
   20                 #address-cells = <0>;
   21 
   22                 aes1_ick: clock-aes1-ick {
   23                         #clock-cells = <0>;
   24                         compatible = "ti,omap3-interface-clock";
   25                         clock-output-names = "aes1_ick";
   26                         clocks = <&security_l4_ick2>;
   27                         ti,bit-shift = <3>;
   28                 };
   29 
   30                 rng_ick: clock-rng-ick {
   31                         #clock-cells = <0>;
   32                         compatible = "ti,omap3-interface-clock";
   33                         clock-output-names = "rng_ick";
   34                         clocks = <&security_l4_ick2>;
   35                         ti,bit-shift = <2>;
   36                 };
   37 
   38                 sha11_ick: clock-sha11-ick {
   39                         #clock-cells = <0>;
   40                         compatible = "ti,omap3-interface-clock";
   41                         clock-output-names = "sha11_ick";
   42                         clocks = <&security_l4_ick2>;
   43                         ti,bit-shift = <1>;
   44                 };
   45 
   46                 des1_ick: clock-des1-ick {
   47                         #clock-cells = <0>;
   48                         compatible = "ti,omap3-interface-clock";
   49                         clock-output-names = "des1_ick";
   50                         clocks = <&security_l4_ick2>;
   51                         ti,bit-shift = <0>;
   52                 };
   53 
   54                 pka_ick: clock-pka-ick {
   55                         #clock-cells = <0>;
   56                         compatible = "ti,omap3-interface-clock";
   57                         clock-output-names = "pka_ick";
   58                         clocks = <&security_l3_ick>;
   59                         ti,bit-shift = <4>;
   60                 };
   61         };
   62 
   63         /* CM_FCLKEN_CAM */
   64         clock@f00 {
   65                 compatible = "ti,clksel";
   66                 reg = <0xf00>;
   67                 #clock-cells = <2>;
   68                 #address-cells = <0>;
   69 
   70                 cam_mclk: clock-cam-mclk {
   71                         #clock-cells = <0>;
   72                         compatible = "ti,gate-clock";
   73                         clock-output-names = "cam_mclk";
   74                         clocks = <&dpll4_m5x2_ck>;
   75                         ti,bit-shift = <0>;
   76                         ti,set-rate-parent;
   77                 };
   78 
   79                 csi2_96m_fck: clock-csi2-96m-fck {
   80                         #clock-cells = <0>;
   81                         compatible = "ti,gate-clock";
   82                         clock-output-names = "csi2_96m_fck";
   83                         clocks = <&core_96m_fck>;
   84                         ti,bit-shift = <1>;
   85                 };
   86         };
   87 
   88         cam_ick: cam_ick@f10 {
   89                 #clock-cells = <0>;
   90                 compatible = "ti,omap3-no-wait-interface-clock";
   91                 clocks = <&l4_ick>;
   92                 reg = <0x0f10>;
   93                 ti,bit-shift = <0>;
   94         };
   95 
   96         security_l3_ick: security_l3_ick {
   97                 #clock-cells = <0>;
   98                 compatible = "fixed-factor-clock";
   99                 clocks = <&l3_ick>;
  100                 clock-mult = <1>;
  101                 clock-div = <1>;
  102         };
  103 
  104         clock@a10 {
  105                 compatible = "ti,clksel";
  106                 reg = <0xa10>;
  107                 #clock-cells = <2>;
  108                 #address-cells = <0>;
  109 
  110                 icr_ick: clock-icr-ick {
  111                         #clock-cells = <0>;
  112                         compatible = "ti,omap3-interface-clock";
  113                         clock-output-names = "icr_ick";
  114                         clocks = <&core_l4_ick>;
  115                         ti,bit-shift = <29>;
  116                 };
  117 
  118                 des2_ick: clock-des2-ick {
  119                         #clock-cells = <0>;
  120                         compatible = "ti,omap3-interface-clock";
  121                         clock-output-names = "des2_ick";
  122                         clocks = <&core_l4_ick>;
  123                         ti,bit-shift = <26>;
  124                 };
  125 
  126                 mspro_ick: clock-mspro-ick {
  127                         #clock-cells = <0>;
  128                         compatible = "ti,omap3-interface-clock";
  129                         clock-output-names = "mspro_ick";
  130                         clocks = <&core_l4_ick>;
  131                         ti,bit-shift = <23>;
  132                 };
  133 
  134                 mailboxes_ick: clock-mailboxes-ick {
  135                         #clock-cells = <0>;
  136                         compatible = "ti,omap3-interface-clock";
  137                         clock-output-names = "mailboxes_ick";
  138                         clocks = <&core_l4_ick>;
  139                         ti,bit-shift = <7>;
  140                 };
  141 
  142                 sad2d_ick: clock-sad2d-ick {
  143                         #clock-cells = <0>;
  144                         compatible = "ti,omap3-interface-clock";
  145                         clock-output-names = "sad2d_ick";
  146                         clocks = <&l3_ick>;
  147                         ti,bit-shift = <3>;
  148                 };
  149         };
  150 
  151         ssi_l4_ick: ssi_l4_ick {
  152                 #clock-cells = <0>;
  153                 compatible = "fixed-factor-clock";
  154                 clocks = <&l4_ick>;
  155                 clock-mult = <1>;
  156                 clock-div = <1>;
  157         };
  158 
  159         clock@c00 {
  160                 compatible = "ti,clksel";
  161                 reg = <0xc00>;
  162                 #clock-cells = <2>;
  163                 #address-cells = <0>;
  164 
  165                 sr1_fck: clock-sr1-fck {
  166                         #clock-cells = <0>;
  167                         compatible = "ti,wait-gate-clock";
  168                         clock-output-names = "sr1_fck";
  169                         clocks = <&sys_ck>;
  170                         ti,bit-shift = <6>;
  171                 };
  172 
  173                 sr2_fck: clock-sr2-fck {
  174                         #clock-cells = <0>;
  175                         compatible = "ti,wait-gate-clock";
  176                         clock-output-names = "sr2_fck";
  177                         clocks = <&sys_ck>;
  178                         ti,bit-shift = <7>;
  179                 };
  180         };
  181 
  182         sr_l4_ick: sr_l4_ick {
  183                 #clock-cells = <0>;
  184                 compatible = "fixed-factor-clock";
  185                 clocks = <&l4_ick>;
  186                 clock-mult = <1>;
  187                 clock-div = <1>;
  188         };
  189 
  190         dpll2_fck: dpll2_fck@40 {
  191                 #clock-cells = <0>;
  192                 compatible = "ti,divider-clock";
  193                 clocks = <&core_ck>;
  194                 ti,bit-shift = <19>;
  195                 ti,max-div = <7>;
  196                 reg = <0x0040>;
  197                 ti,index-starts-at-one;
  198         };
  199 
  200         dpll2_ck: dpll2_ck@4 {
  201                 #clock-cells = <0>;
  202                 compatible = "ti,omap3-dpll-clock";
  203                 clocks = <&sys_ck>, <&dpll2_fck>;
  204                 reg = <0x0004>, <0x0024>, <0x0040>, <0x0034>;
  205                 ti,low-power-stop;
  206                 ti,lock;
  207                 ti,low-power-bypass;
  208         };
  209 
  210         dpll2_m2_ck: dpll2_m2_ck@44 {
  211                 #clock-cells = <0>;
  212                 compatible = "ti,divider-clock";
  213                 clocks = <&dpll2_ck>;
  214                 ti,max-div = <31>;
  215                 reg = <0x0044>;
  216                 ti,index-starts-at-one;
  217         };
  218 
  219         iva2_ck: iva2_ck@0 {
  220                 #clock-cells = <0>;
  221                 compatible = "ti,wait-gate-clock";
  222                 clocks = <&dpll2_m2_ck>;
  223                 reg = <0x0000>;
  224                 ti,bit-shift = <0>;
  225         };
  226 
  227         clock@a00 {
  228                 compatible = "ti,clksel";
  229                 reg = <0xa00>;
  230                 #clock-cells = <2>;
  231                 #address-cells = <0>;
  232 
  233                 modem_fck: clock-modem-fck {
  234                         #clock-cells = <0>;
  235                         compatible = "ti,omap3-interface-clock";
  236                         clock-output-names = "modem_fck";
  237                         clocks = <&sys_ck>;
  238                         ti,bit-shift = <31>;
  239                 };
  240 
  241                 mspro_fck: clock-mspro-fck {
  242                         #clock-cells = <0>;
  243                         compatible = "ti,wait-gate-clock";
  244                         clock-output-names = "mspro_fck";
  245                         clocks = <&core_96m_fck>;
  246                         ti,bit-shift = <23>;
  247                 };
  248         };
  249 
  250         /* CM_ICLKEN3_CORE */
  251         clock@a18 {
  252                 compatible = "ti,clksel";
  253                 reg = <0xa18>;
  254                 #clock-cells = <2>;
  255                 #address-cells = <0>;
  256 
  257                 mad2d_ick: clock-mad2d-ick {
  258                         #clock-cells = <0>;
  259                         compatible = "ti,omap3-interface-clock";
  260                         clock-output-names = "mad2d_ick";
  261                         clocks = <&l3_ick>;
  262                         ti,bit-shift = <3>;
  263                 };
  264         };
  265 
  266 };
  267 
  268 &cm_clockdomains {
  269         cam_clkdm: cam_clkdm {
  270                 compatible = "ti,clockdomain";
  271                 clocks = <&cam_ick>, <&csi2_96m_fck>;
  272         };
  273 
  274         iva2_clkdm: iva2_clkdm {
  275                 compatible = "ti,clockdomain";
  276                 clocks = <&iva2_ck>;
  277         };
  278 
  279         dpll2_clkdm: dpll2_clkdm {
  280                 compatible = "ti,clockdomain";
  281                 clocks = <&dpll2_ck>;
  282         };
  283 
  284         wkup_clkdm: wkup_clkdm {
  285                 compatible = "ti,clockdomain";
  286                 clocks = <&gpio1_dbck>, <&wdt2_fck>, <&wdt2_ick>, <&wdt1_ick>,
  287                          <&gpio1_ick>, <&omap_32ksync_ick>, <&gpt12_ick>,
  288                          <&gpt1_ick>, <&sr1_fck>, <&sr2_fck>;
  289         };
  290 
  291         d2d_clkdm: d2d_clkdm {
  292                 compatible = "ti,clockdomain";
  293                 clocks = <&modem_fck>, <&sad2d_ick>, <&mad2d_ick>;
  294         };
  295 
  296         core_l4_clkdm: core_l4_clkdm {
  297                 compatible = "ti,clockdomain";
  298                 clocks = <&mmchs2_fck>, <&mmchs1_fck>, <&i2c3_fck>, <&i2c2_fck>,
  299                          <&i2c1_fck>, <&mcspi4_fck>, <&mcspi3_fck>,
  300                          <&mcspi2_fck>, <&mcspi1_fck>, <&uart2_fck>,
  301                          <&uart1_fck>, <&hdq_fck>, <&mmchs2_ick>, <&mmchs1_ick>,
  302                          <&hdq_ick>, <&mcspi4_ick>, <&mcspi3_ick>,
  303                          <&mcspi2_ick>, <&mcspi1_ick>, <&i2c3_ick>, <&i2c2_ick>,
  304                          <&i2c1_ick>, <&uart2_ick>, <&uart1_ick>, <&gpt11_ick>,
  305                          <&gpt10_ick>, <&mcbsp5_ick>, <&mcbsp1_ick>,
  306                          <&omapctrl_ick>, <&aes2_ick>, <&sha12_ick>, <&icr_ick>,
  307                          <&des2_ick>, <&mspro_ick>, <&mailboxes_ick>,
  308                          <&rng_ick>, <&mspro_fck>;
  309         };
  310 };
Cache object: 6530c65a58ee22ce55b68ab594be6971
[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]
This page is part of the FreeBSD/Linux Linux Kernel Cross-Reference, and was automatically generated using a modified version of the LXR engine.
FreeBSD/Linux Kernel Cross Reference sys/contrib/device-tree/src/arm/omap34xx-omap36xx-clocks.dtsi

FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/src/arm/omap34xx-omap36xx-clocks.dtsi
