r8a7742-iwg21d-q7-dbcm-ca.dts

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    1 // SPDX-License-Identifier: GPL-2.0
    2 /*
    3  * Device Tree Source for the iWave-RZ/G1H Qseven board development
    4  * platform with camera daughter board
    5  *
    6  * Copyright (C) 2020 Renesas Electronics Corp.
    7  */
    8 
    9 /dts-v1/;
   10 #include "r8a7742-iwg21d-q7.dts"
   11 
   12 / {
   13         model = "iWave Systems RZ/G1H Qseven development platform with camera add-on";
   14         compatible = "iwave,g21d", "iwave,g21m", "renesas,r8a7742";
   15 
   16         aliases {
   17                 serial0 = &scif0;
   18                 serial1 = &scif1;
   19                 serial3 = &scifb1;
   20                 serial5 = &hscif0;
   21                 ethernet1 = &ether;
   22         };
   23 
   24         mclk_cam1: mclk-cam1 {
   25                 compatible = "fixed-clock";
   26                 #clock-cells = <0>;
   27                 clock-frequency = <26000000>;
   28         };
   29 
   30         mclk_cam2: mclk-cam2 {
   31                 compatible = "fixed-clock";
   32                 #clock-cells = <0>;
   33                 clock-frequency = <26000000>;
   34         };
   35 
   36         mclk_cam3: mclk-cam3 {
   37                 compatible = "fixed-clock";
   38                 #clock-cells = <0>;
   39                 clock-frequency = <26000000>;
   40         };
   41 
   42         mclk_cam4: mclk-cam4 {
   43                 compatible = "fixed-clock";
   44                 #clock-cells = <0>;
   45                 clock-frequency = <26000000>;
   46         };
   47 
   48         reg_1p8v: 1p8v {
   49                 compatible = "regulator-fixed";
   50                 regulator-name = "1P8V";
   51                 regulator-min-microvolt = <1800000>;
   52                 regulator-max-microvolt = <1800000>;
   53                 regulator-always-on;
   54         };
   55 
   56         reg_2p8v: 2p8v {
   57                 compatible = "regulator-fixed";
   58                 regulator-name = "2P8V";
   59                 regulator-min-microvolt = <2800000>;
   60                 regulator-max-microvolt = <2800000>;
   61                 regulator-always-on;
   62         };
   63 };
   64 
   65 &avb {
   66         /* Pins shared with VIN0, keep status disabled */
   67         status = "disabled";
   68 };
   69 
   70 &can0 {
   71         pinctrl-0 = <&can0_pins>;
   72         pinctrl-names = "default";
   73         status = "okay";
   74 };
   75 
   76 &ether {
   77         pinctrl-0 = <&ether_pins>;
   78         pinctrl-names = "default";
   79 
   80         phy-handle = <&phy1>;
   81         renesas,ether-link-active-low;
   82         status = "okay";
   83 
   84         phy1: ethernet-phy@1 {
   85                 compatible = "ethernet-phy-id0022.1560",
   86                              "ethernet-phy-ieee802.3-c22";
   87                 reg = <1>;
   88                 micrel,led-mode = <1>;
   89         };
   90 };
   91 
   92 &gpio0 {
   93         /* Disable hogging GP0_18 to output LOW */
   94         /delete-node/ qspi-en-hog;
   95 
   96         /* Hog GP0_18 to output HIGH to enable VIN2 */
   97         vin2-en-hog {
   98                 gpio-hog;
   99                 gpios = <18 GPIO_ACTIVE_HIGH>;
  100                 output-high;
  101                 line-name = "VIN2_EN";
  102         };
  103 };
  104 
  105 &hscif0 {
  106         pinctrl-0 = <&hscif0_pins>;
  107         pinctrl-names = "default";
  108         uart-has-rtscts;
  109         status = "okay";
  110 };
  111 
  112 &i2c1 {
  113         pinctrl-0 = <&i2c1_pins>;
  114         pinctrl-names = "default";
  115 
  116         /* status set to "okay" when needed by camera configuration below */
  117         clock-frequency = <400000>;
  118 };
  119 
  120 &i2c3 {
  121         pinctrl-0 = <&i2c3_pins>;
  122         pinctrl-names = "default";
  123 
  124         /* status set to "okay" when needed by camera configuration below */
  125         clock-frequency = <400000>;
  126 };
  127 
  128 &pfc {
  129         can0_pins: can0 {
  130                 groups = "can0_data_d";
  131                 function = "can0";
  132         };
  133 
  134         ether_pins: ether {
  135                 groups = "eth_mdio", "eth_rmii";
  136                 function = "eth";
  137         };
  138 
  139         hscif0_pins: hscif0 {
  140                 groups = "hscif0_data", "hscif0_ctrl";
  141                 function = "hscif0";
  142         };
  143 
  144         i2c1_pins: i2c1 {
  145                 groups = "i2c1_c";
  146                 function = "i2c1";
  147         };
  148 
  149         i2c3_pins: i2c3 {
  150                 groups = "i2c3";
  151                 function = "i2c3";
  152         };
  153 
  154         scif0_pins: scif0 {
  155                 groups = "scif0_data";
  156                 function = "scif0";
  157         };
  158 
  159         scif1_pins: scif1 {
  160                 groups = "scif1_data";
  161                 function = "scif1";
  162         };
  163 
  164         scifb1_pins: scifb1 {
  165                 groups = "scifb1_data";
  166                 function = "scifb1";
  167         };
  168 
  169         vin0_8bit_pins: vin0 {
  170                 groups = "vin0_data8", "vin0_clk", "vin0_sync";
  171                 function = "vin0";
  172         };
  173 
  174         vin1_8bit_pins: vin1 {
  175                 groups = "vin1_data8_b", "vin1_clk_b", "vin1_sync_b";
  176                 function = "vin1";
  177         };
  178 
  179         vin2_pins: vin2 {
  180                 groups = "vin2_g8", "vin2_clk";
  181                 function = "vin2";
  182         };
  183 
  184         vin3_pins: vin3 {
  185                 groups = "vin3_data8", "vin3_clk", "vin3_sync";
  186                 function = "vin3";
  187         };
  188 };
  189 
  190 &qspi {
  191         /* Pins shared with VIN2, keep status disabled */
  192         status = "disabled";
  193 };
  194 
  195 &scif0 {
  196         pinctrl-0 = <&scif0_pins>;
  197         pinctrl-names = "default";
  198         status = "okay";
  199 };
  200 
  201 &scif1 {
  202         pinctrl-0 = <&scif1_pins>;
  203         pinctrl-names = "default";
  204         status = "okay";
  205 };
  206 
  207 &scifb1 {
  208         pinctrl-0 = <&scifb1_pins>;
  209         pinctrl-names = "default";
  210         status = "okay";
  211 
  212         rts-gpios = <&gpio4 21 GPIO_ACTIVE_LOW>;
  213         cts-gpios = <&gpio4 17 GPIO_ACTIVE_LOW>;
  214 };
  215 
  216 /*
  217  * Below configuration ties VINx endpoints to ov5640/ov7725 camera endpoints
  218  *
  219  * (un)comment the #include statements to change configuration
  220  */
  221 
  222 /* 8bit CMOS Camera 1 (J13) */
  223 #define CAM_PARENT_I2C          i2c0
  224 #define MCLK_CAM                mclk_cam1
  225 #define CAM_EP                  cam0ep
  226 #define VIN_EP                  vin0ep
  227 #undef CAM_ENABLED
  228 #include "r8a7742-iwg21d-q7-dbcm-ov5640-single.dtsi"
  229 //#include "r8a7742-iwg21d-q7-dbcm-ov7725-single.dtsi"
  230 
  231 #ifdef CAM_ENABLED
  232 &vin0 {
  233         /*
  234          * Set SW2 switch on the SOM to 'ON'
  235          * Set SW1 switch on camera board to 'OFF' as we are using 8bit mode
  236          */
  237         status = "okay";
  238         pinctrl-0 = <&vin0_8bit_pins>;
  239         pinctrl-names = "default";
  240 
  241         port {
  242                 vin0ep: endpoint {
  243                         remote-endpoint = <&cam0ep>;
  244                         bus-width = <8>;
  245                         bus-type = <6>;
  246                 };
  247         };
  248 };
  249 #endif /* CAM_ENABLED */
  250 
  251 #undef CAM_PARENT_I2C
  252 #undef MCLK_CAM
  253 #undef CAM_EP
  254 #undef VIN_EP
  255 
  256 /* 8bit CMOS Camera 2 (J14) */
  257 #define CAM_PARENT_I2C          i2c1
  258 #define MCLK_CAM                mclk_cam2
  259 #define CAM_EP                  cam1ep
  260 #define VIN_EP                  vin1ep
  261 #undef CAM_ENABLED
  262 #include "r8a7742-iwg21d-q7-dbcm-ov5640-single.dtsi"
  263 //#include "r8a7742-iwg21d-q7-dbcm-ov7725-single.dtsi"
  264 
  265 #ifdef CAM_ENABLED
  266 &vin1 {
  267         /* Set SW1 switch on the SOM to 'ON' */
  268         status = "okay";
  269         pinctrl-0 = <&vin1_8bit_pins>;
  270         pinctrl-names = "default";
  271 
  272         port {
  273                 vin1ep: endpoint {
  274                         remote-endpoint = <&cam1ep>;
  275                         bus-width = <8>;
  276                         bus-type = <6>;
  277                 };
  278         };
  279 };
  280 
  281 #endif /* CAM_ENABLED */
  282 
  283 #undef CAM_PARENT_I2C
  284 #undef MCLK_CAM
  285 #undef CAM_EP
  286 #undef VIN_EP
  287 
  288 /* 8bit CMOS Camera 3 (J12) */
  289 #define CAM_PARENT_I2C          i2c2
  290 #define MCLK_CAM                mclk_cam3
  291 #define CAM_EP                  cam2ep
  292 #define VIN_EP                  vin2ep
  293 #undef CAM_ENABLED
  294 #include "r8a7742-iwg21d-q7-dbcm-ov5640-single.dtsi"
  295 //#include "r8a7742-iwg21d-q7-dbcm-ov7725-single.dtsi"
  296 
  297 #ifdef CAM_ENABLED
  298 &vin2 {
  299         status = "okay";
  300         pinctrl-0 = <&vin2_pins>;
  301         pinctrl-names = "default";
  302 
  303         port {
  304                 vin2ep: endpoint {
  305                         remote-endpoint = <&cam2ep>;
  306                         bus-width = <8>;
  307                         data-shift = <8>;
  308                         bus-type = <6>;
  309                 };
  310         };
  311 };
  312 #endif /* CAM_ENABLED */
  313 
  314 #undef CAM_PARENT_I2C
  315 #undef MCLK_CAM
  316 #undef CAM_EP
  317 #undef VIN_EP
  318 
  319 /* 8bit CMOS Camera 4 (J11) */
  320 #define CAM_PARENT_I2C          i2c3
  321 #define MCLK_CAM                mclk_cam4
  322 #define CAM_EP                  cam3ep
  323 #define VIN_EP                  vin3ep
  324 #undef CAM_ENABLED
  325 #include "r8a7742-iwg21d-q7-dbcm-ov5640-single.dtsi"
  326 //#include "r8a7742-iwg21d-q7-dbcm-ov7725-single.dtsi"
  327 
  328 #ifdef CAM_ENABLED
  329 &vin3 {
  330         status = "okay";
  331         pinctrl-0 = <&vin3_pins>;
  332         pinctrl-names = "default";
  333 
  334         port {
  335                 vin3ep: endpoint {
  336                         remote-endpoint = <&cam3ep>;
  337                         bus-width = <8>;
  338                         bus-type = <6>;
  339                 };
  340         };
  341 };
  342 #endif /* CAM_ENABLED */
  343 
  344 #undef CAM_PARENT_I2C
  345 #undef MCLK_CAM
  346 #undef CAM_EP
  347 #undef VIN_EP

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FreeBSD/Linux Kernel Cross Reference sys/contrib/device-tree/src/arm/r8a7742-iwg21d-q7-dbcm-ca.dts

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sys/contrib/device-tree/src/arm/r8a7742-iwg21d-q7-dbcm-ca.dts