The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/src/arm/r8a7743-sk-rzg1m.dts

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    1 // SPDX-License-Identifier: GPL-2.0
    2 /*
    3  * Device Tree Source for the SK-RZG1M board
    4  *
    5  * Copyright (C) 2016-2017 Cogent Embedded, Inc.
    6  */
    7 
    8 /dts-v1/;
    9 #include "r8a7743.dtsi"
   10 #include <dt-bindings/gpio/gpio.h>
   11 
   12 / {
   13         model = "SK-RZG1M";
   14         compatible = "renesas,sk-rzg1m", "renesas,r8a7743";
   15 
   16         aliases {
   17                 serial0 = &scif0;
   18         };
   19 
   20         chosen {
   21                 bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
   22                 stdout-path = "serial0:115200n8";
   23         };
   24 
   25         memory@40000000 {
   26                 device_type = "memory";
   27                 reg = <0 0x40000000 0 0x40000000>;
   28         };
   29 
   30         memory@200000000 {
   31                 device_type = "memory";
   32                 reg = <2 0x00000000 0 0x40000000>;
   33         };
   34 };
   35 
   36 &extal_clk {
   37         clock-frequency = <20000000>;
   38 };
   39 
   40 &pfc {
   41         scif0_pins: scif0 {
   42                 groups = "scif0_data_d";
   43                 function = "scif0";
   44         };
   45 
   46         ether_pins: ether {
   47                 groups = "eth_link", "eth_mdio", "eth_rmii";
   48                 function = "eth";
   49         };
   50 
   51         phy1_pins: phy1 {
   52                 groups = "intc_irq0";
   53                 function = "intc";
   54         };
   55 };
   56 
   57 &scif0 {
   58         pinctrl-0 = <&scif0_pins>;
   59         pinctrl-names = "default";
   60 
   61         status = "okay";
   62 };
   63 
   64 &ether {
   65         pinctrl-0 = <&ether_pins>, <&phy1_pins>;
   66         pinctrl-names = "default";
   67 
   68         phy-handle = <&phy1>;
   69         renesas,ether-link-active-low;
   70         status = "okay";
   71 
   72         phy1: ethernet-phy@1 {
   73                 compatible = "ethernet-phy-id0022.1537",
   74                              "ethernet-phy-ieee802.3-c22";
   75                 reg = <1>;
   76                 interrupt-parent = <&irqc>;
   77                 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
   78                 micrel,led-mode = <1>;
   79                 reset-gpios = <&gpio5 22 GPIO_ACTIVE_LOW>;
   80         };
   81 };

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