1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2
3 /dts-v1/;
4
5 #include "rk3036.dtsi"
6
7 / {
8 model = "Rockchip RK3036 Evaluation board";
9 compatible = "rockchip,rk3036-evb", "rockchip,rk3036";
10
11 memory@60000000 {
12 device_type = "memory";
13 reg = <0x60000000 0x40000000>;
14 };
15 };
16
17 &emac {
18 pinctrl-names = "default";
19 pinctrl-0 = <&emac_xfer>, <&emac_mdio>;
20 phy = <&phy0>;
21 phy-reset-gpios = <&gpio2 RK_PC6 GPIO_ACTIVE_LOW>; /* PHY_RST */
22 phy-reset-duration = <10>; /* millisecond */
23
24 status = "okay";
25
26 phy0: ethernet-phy@0 {
27 reg = <0>;
28 };
29 };
30
31 &i2c1 {
32 status = "okay";
33
34 hym8563: hym8563@51 {
35 compatible = "haoyu,hym8563";
36 reg = <0x51>;
37 #clock-cells = <0>;
38 clock-frequency = <32768>;
39 clock-output-names = "xin32k";
40 };
41 };
42
43 &uart2 {
44 status = "okay";
45 };
Cache object: bd20c05ae5e021e046f038ab5baee640
|