Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/src/arm/rk3288-firefly-reload-core.dtsi
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1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 /* 3 * Device tree file for Firefly Rockchip RK3288 Core board 4 * Copyright (c) 2016 Randy Li <ayaka@soulik.info> 5 */ 6 7 #include <dt-bindings/input/input.h> 8 #include "rk3288.dtsi" 9 10 / { 11 memory@0 { 12 device_type = "memory"; 13 reg = <0x0 0x0 0x0 0x80000000>; 14 }; 15 16 ext_gmac: external-gmac-clock { 17 compatible = "fixed-clock"; 18 #clock-cells = <0>; 19 clock-frequency = <125000000>; 20 clock-output-names = "ext_gmac"; 21 }; 22 23 24 vcc_flash: flash-regulator { 25 compatible = "regulator-fixed"; 26 regulator-name = "vcc_flash"; 27 regulator-min-microvolt = <1800000>; 28 regulator-max-microvolt = <1800000>; 29 vin-supply = <&vcc_io>; 30 }; 31 }; 32 33 &cpu0 { 34 cpu0-supply = <&vdd_cpu>; 35 }; 36 37 &emmc { 38 bus-width = <8>; 39 cap-mmc-highspeed; 40 disable-wp; 41 mmc-ddr-1_8v; 42 mmc-hs200-1_8v; 43 non-removable; 44 pinctrl-names = "default"; 45 pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_pwr>, <&emmc_bus8>; 46 vmmc-supply = <&vcc_io>; 47 vqmmc-supply = <&vcc_flash>; 48 status = "okay"; 49 }; 50 51 &gmac { 52 assigned-clocks = <&cru SCLK_MAC>; 53 assigned-clock-parents = <&ext_gmac>; 54 clock_in_out = "input"; 55 pinctrl-names = "default"; 56 pinctrl-0 = <&rgmii_pins>, <&phy_rst>, <&phy_pmeb>, <&phy_int>; 57 phy-supply = <&vcc_lan>; 58 phy-mode = "rgmii"; 59 snps,reset-active-low; 60 snps,reset-delays-us = <0 10000 1000000>; 61 snps,reset-gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_LOW>; 62 tx_delay = <0x30>; 63 rx_delay = <0x10>; 64 status = "okay"; 65 }; 66 67 &i2c0 { 68 clock-frequency = <400000>; 69 status = "okay"; 70 71 vdd_cpu: syr827@40 { 72 compatible = "silergy,syr827"; 73 fcs,suspend-voltage-selector = <1>; 74 reg = <0x40>; 75 regulator-name = "vdd_cpu"; 76 regulator-min-microvolt = <850000>; 77 regulator-max-microvolt = <1350000>; 78 regulator-always-on; 79 regulator-boot-on; 80 regulator-enable-ramp-delay = <300>; 81 regulator-ramp-delay = <8000>; 82 vin-supply = <&vcc_sys>; 83 }; 84 85 vdd_gpu: syr828@41 { 86 compatible = "silergy,syr828"; 87 fcs,suspend-voltage-selector = <1>; 88 reg = <0x41>; 89 regulator-name = "vdd_gpu"; 90 regulator-min-microvolt = <850000>; 91 regulator-max-microvolt = <1350000>; 92 regulator-always-on; 93 vin-supply = <&vcc_sys>; 94 }; 95 96 act8846: act8846@5a { 97 compatible = "active-semi,act8846"; 98 reg = <0x5a>; 99 pinctrl-names = "default"; 100 pinctrl-0 = <&pmic_vsel>, <&pwr_hold>; 101 system-power-controller; 102 103 vp1-supply = <&vcc_sys>; 104 vp2-supply = <&vcc_sys>; 105 vp3-supply = <&vcc_sys>; 106 vp4-supply = <&vcc_sys>; 107 inl1-supply = <&vcc_sys>; 108 inl2-supply = <&vcc_sys>; 109 inl3-supply = <&vcc_20>; 110 111 regulators { 112 vcc_ddr: REG1 { 113 regulator-name = "vcc_ddr"; 114 regulator-min-microvolt = <1200000>; 115 regulator-max-microvolt = <1200000>; 116 regulator-always-on; 117 }; 118 119 vcc_io: REG2 { 120 regulator-name = "vcc_io"; 121 regulator-min-microvolt = <3300000>; 122 regulator-max-microvolt = <3300000>; 123 regulator-always-on; 124 }; 125 126 vdd_log: REG3 { 127 regulator-name = "vdd_log"; 128 regulator-min-microvolt = <1100000>; 129 regulator-max-microvolt = <1100000>; 130 regulator-always-on; 131 }; 132 133 vcc_20: REG4 { 134 regulator-name = "vcc_20"; 135 regulator-min-microvolt = <2000000>; 136 regulator-max-microvolt = <2000000>; 137 regulator-always-on; 138 }; 139 140 vccio_sd: REG5 { 141 regulator-name = "vccio_sd"; 142 regulator-min-microvolt = <3300000>; 143 regulator-max-microvolt = <3300000>; 144 }; 145 146 vdd10_lcd: REG6 { 147 regulator-name = "vdd10_lcd"; 148 regulator-min-microvolt = <1000000>; 149 regulator-max-microvolt = <1000000>; 150 regulator-always-on; 151 }; 152 153 vcca_18: REG7 { 154 regulator-name = "vcca_18"; 155 regulator-min-microvolt = <1800000>; 156 regulator-max-microvolt = <1800000>; 157 regulator-always-on; 158 }; 159 160 vcca_33: REG8 { 161 regulator-name = "vcca_33"; 162 regulator-min-microvolt = <3300000>; 163 regulator-max-microvolt = <3300000>; 164 regulator-always-on; 165 }; 166 167 vcc_lan: REG9 { 168 regulator-name = "vcca_lan"; 169 regulator-min-microvolt = <3300000>; 170 regulator-max-microvolt = <3300000>; 171 }; 172 173 vdd_10: REG10 { 174 regulator-name = "vdd_10"; 175 regulator-min-microvolt = <1000000>; 176 regulator-max-microvolt = <1000000>; 177 regulator-always-on; 178 }; 179 180 vccio_wl: vcc_18: REG11 { 181 regulator-name = "vcc_18"; 182 regulator-min-microvolt = <1800000>; 183 regulator-max-microvolt = <1800000>; 184 }; 185 186 vcc18_lcd: REG12 { 187 regulator-name = "vcc18_lcd"; 188 regulator-min-microvolt = <1800000>; 189 regulator-max-microvolt = <1800000>; 190 regulator-always-on; 191 }; 192 }; 193 }; 194 }; 195 196 &io_domains { 197 status = "okay"; 198 199 audio-supply = <&vccio_wl>; 200 bb-supply = <&vcc_io>; 201 dvp-supply = <&dovdd_1v8>; 202 flash0-supply = <&vcc_flash>; 203 flash1-supply = <&vcc_lan>; 204 gpio30-supply = <&vcc_io>; 205 gpio1830-supply = <&vcc_io>; 206 lcdc-supply = <&vcc_io>; 207 sdcard-supply = <&vccio_sd>; 208 wifi-supply = <&vccio_wl>; 209 }; 210 211 &pinctrl { 212 pcfg_output_high: pcfg-output-high { 213 output-high; 214 }; 215 216 pcfg_output_low: pcfg-output-low { 217 output-low; 218 }; 219 220 pcfg_pull_up_drv_12ma: pcfg-pull-up-drv-12ma { 221 bias-pull-up; 222 drive-strength = <12>; 223 }; 224 225 act8846 { 226 pwr_hold: pwr-hold { 227 rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_output_high>; 228 }; 229 230 pmic_vsel: pmic-vsel { 231 rockchip,pins = <7 RK_PB6 RK_FUNC_GPIO &pcfg_output_low>; 232 }; 233 }; 234 235 gmac { 236 phy_int: phy-int { 237 rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>; 238 }; 239 240 phy_pmeb: phy-pmeb { 241 rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; 242 }; 243 244 phy_rst: phy-rst { 245 rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_output_high>; 246 }; 247 }; 248 }; 249 250 &tsadc { 251 rockchip,hw-tshut-mode = <0>; 252 rockchip,hw-tshut-polarity = <0>; 253 status = "okay"; 254 }; 255 256 &vopb { 257 status = "okay"; 258 }; 259 260 &vopb_mmu { 261 status = "okay"; 262 }; 263 264 &vopl { 265 status = "okay"; 266 }; 267 268 &vopl_mmu { 269 status = "okay"; 270 }; 271 272 &wdt { 273 status = "okay"; 274 };
Cache object: 7304d272b5a078c53abff25f51530883
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