socfpga_arria5_socdk.dts

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    1 // SPDX-License-Identifier: GPL-2.0+
    2 /*
    3  * Copyright (C) 2013 Altera Corporation <www.altera.com>
    4  */
    5 
    6 #include "socfpga_arria5.dtsi"
    7 
    8 / {
    9         model = "Altera SOCFPGA Arria V SoC Development Kit";
   10         compatible = "altr,socfpga-arria5-socdk", "altr,socfpga-arria5", "altr,socfpga";
   11 
   12         chosen {
   13                 bootargs = "earlyprintk";
   14                 stdout-path = "serial0:115200n8";
   15         };
   16 
   17         memory@0 {
   18                 name = "memory";
   19                 device_type = "memory";
   20                 reg = <0x0 0x40000000>; /* 1GB */
   21         };
   22 
   23         aliases {
   24                 /* this allow the ethaddr uboot environmnet variable contents
   25                 * to be added to the gmac1 device tree blob.
   26                 */
   27                 ethernet0 = &gmac1;
   28         };
   29 
   30         leds {
   31                 compatible = "gpio-leds";
   32                 hps0 {
   33                         label = "hps_led0";
   34                         gpios = <&porta 0 1>;
   35                 };
   36 
   37                 hps1 {
   38                         label = "hps_led1";
   39                         gpios = <&portb 11 1>;
   40                 };
   41 
   42                 hps2 {
   43                         label = "hps_led2";
   44                         gpios = <&porta 17 1>;
   45                 };
   46 
   47                 hps3 {
   48                         label = "hps_led3";
   49                         gpios = <&porta 18 1>;
   50                 };
   51         };
   52 
   53         regulator_3_3v: regulator {
   54                 compatible = "regulator-fixed";
   55                 regulator-name = "3.3V";
   56                 regulator-min-microvolt = <3300000>;
   57                 regulator-max-microvolt = <3300000>;
   58         };
   59 };
   60 
   61 &gmac1 {
   62         status = "okay";
   63         phy-mode = "rgmii";
   64 
   65         rxd0-skew-ps = <0>;
   66         rxd1-skew-ps = <0>;
   67         rxd2-skew-ps = <0>;
   68         rxd3-skew-ps = <0>;
   69         txen-skew-ps = <0>;
   70         txc-skew-ps = <2600>;
   71         rxdv-skew-ps = <0>;
   72         rxc-skew-ps = <2000>;
   73 };
   74 
   75 &gpio0 {
   76         status = "okay";
   77 };
   78 
   79 &gpio1 {
   80         status = "okay";
   81 };
   82 
   83 &gpio2 {
   84         status = "okay";
   85 };
   86 
   87 &i2c0 {
   88         status = "okay";
   89         clock-frequency = <100000>;
   90 
   91         /*
   92          * adjust the falling times to decrease the i2c frequency to 50Khz
   93          * because the LCD module does not work at the standard 100Khz
   94          */
   95         i2c-sda-falling-time-ns = <5000>;
   96         i2c-scl-falling-time-ns = <5000>;
   97 
   98         eeprom@51 {
   99                 compatible = "atmel,24c32";
  100                 reg = <0x51>;
  101                 pagesize = <32>;
  102         };
  103 
  104         rtc@68 {
  105                 compatible = "dallas,ds1339";
  106                 reg = <0x68>;
  107         };
  108 };
  109 
  110 &mmc0 {
  111         vmmc-supply = <&regulator_3_3v>;
  112         vqmmc-supply = <&regulator_3_3v>;
  113         status = "okay";
  114 };
  115 
  116 &qspi {
  117         status = "okay";
  118 
  119         flash: flash@0 {
  120                 #address-cells = <1>;
  121                 #size-cells = <1>;
  122                 compatible = "micron,n25q256a", "jedec,spi-nor";
  123                 reg = <0>;
  124                 spi-max-frequency = <100000000>;
  125 
  126                 m25p,fast-read;
  127                 cdns,page-size = <256>;
  128                 cdns,block-size = <16>;
  129                 cdns,read-delay = <4>;
  130                 cdns,tshsl-ns = <50>;
  131                 cdns,tsd2d-ns = <50>;
  132                 cdns,tchsh-ns = <4>;
  133                 cdns,tslch-ns = <4>;
  134 
  135                 partition@qspi-boot {
  136                         /* 8MB for raw data. */
  137                         label = "Flash 0 Raw Data";
  138                         reg = <0x0 0x800000>;
  139                 };
  140 
  141                 partition@qspi-rootfs {
  142                         /* 120MB for jffs2 data. */
  143                         label = "Flash 0 jffs2 Filesystem";
  144                         reg = <0x800000 0x7800000>;
  145                 };
  146         };
  147 };
  148 
  149 &usb1 {
  150         status = "okay";
  151 };

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FreeBSD/Linux Kernel Cross Reference sys/contrib/device-tree/src/arm/socfpga_arria5_socdk.dts

FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/src/arm/socfpga_arria5_socdk.dts