The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/src/arm/ste-href-family-pinctrl.dtsi

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    1 // SPDX-License-Identifier: GPL-2.0-or-later
    2 /*
    3  * Copyright 2013 Linaro Ltd.
    4  */
    5 
    6 #include "ste-dbx5x0-pinctrl.dtsi"
    7 
    8 / {
    9         soc {
   10                 pinctrl {
   11                         /* Settings for all SPI default and sleep states */
   12                         spi2 {
   13                                 spi2_default_mode: spi_default {
   14                                         default_mux {
   15                                                 function = "spi2";
   16                                                 groups = "spi2_oc1_2";
   17                                         };
   18                                         default_cfg1 {
   19                                                 pins = "GPIO216_AG12"; /* FRM */
   20                                                 ste,config = <&gpio_out_hi>;
   21                                         };
   22                                         default_cfg2 {
   23                                                 pins = "GPIO218_AH11"; /* RXD */
   24                                                 ste,config = <&in_pd>;
   25                                         };
   26                                         default_cfg3 {
   27                                                 pins =
   28                                                 "GPIO215_AH13", /* TXD */
   29                                                 "GPIO217_AH12"; /* CLK */
   30                                                 ste,config = <&out_lo>;
   31                                         };
   32                                 };
   33 
   34                                 spi2_idle_mode: spi_idle {
   35                                         /*
   36                                          * The idle mode is basically sleep mode sans wakeups. Also
   37                                          * note that we have muxes the pins off the function here
   38                                          * as we do not state any muxing.
   39                                          */
   40                                         idle_cfg1 {
   41                                                 pins = "GPIO218_AH11"; /* RXD */
   42                                                 ste,config = <&slpm_in_pdis>;
   43                                         };
   44                                         idle_cfg2 {
   45                                                 pins = "GPIO215_AH13"; /* TXD */
   46                                                 ste,config = <&slpm_out_lo_pdis>;
   47                                         };
   48                                         idle_cfg3 {
   49                                                 pins = "GPIO217_AH12"; /* CLK */
   50                                                 ste,config = <&slpm_pdis>;
   51                                         };
   52                                 };
   53 
   54                                 spi2_sleep_mode: spi_sleep {
   55                                         sleep_cfg1 {
   56                                                 pins =
   57                                                 "GPIO216_AG12", /* FRM */
   58                                                 "GPIO218_AH11"; /* RXD */
   59                                                 ste,config = <&slpm_in_wkup_pdis>;
   60                                         };
   61                                         sleep_cfg2 {
   62                                                 pins = "GPIO215_AH13"; /* TXD */
   63                                                 ste,config = <&slpm_out_lo_wkup_pdis>;
   64                                         };
   65                                         sleep_cfg3 {
   66                                                 pins = "GPIO217_AH12"; /* CLK */
   67                                                 ste,config = <&slpm_wkup_pdis>;
   68                                         };
   69                                 };
   70                         };
   71 
   72                         mcde {
   73                                 lcd_default_mode: lcd_default {
   74                                         default_mux1 {
   75                                                 /* Mux in VSI0 and all the data lines */
   76                                                 function = "lcd";
   77                                                 groups =
   78                                                 "lcdvsi0_a_1", /* VSI0 for LCD */
   79                                                 "lcd_d0_d7_a_1", /* Data lines */
   80                                                 "lcdvsi1_a_1"; /* VSI1 for HDMI */
   81                                         };
   82                                         default_mux2 {
   83                                                 function = "lcda";
   84                                                 groups =
   85                                                 "lcdaclk_b_1"; /* Clock line for TV-out */
   86                                         };
   87                                         default_cfg1 {
   88                                                 pins =
   89                                                 "GPIO68_E1", /* VSI0 */
   90                                                 "GPIO69_E2"; /* VSI1 */
   91                                                 ste,config = <&in_pu>;
   92                                         };
   93                                 };
   94                                 lcd_sleep_mode: lcd_sleep {
   95                                         sleep_cfg1 {
   96                                                 pins = "GPIO69_E2"; /* VSI1 */
   97                                                 ste,config = <&slpm_in_wkup_pdis>;
   98                                         };
   99                                 };
  100                         };
  101 
  102                         ske {
  103                                 /* SKE keys on position 2 in an 8x8 matrix */
  104                                 ske_kpa2_default_mode: ske_kpa2_default {
  105                                         default_mux {
  106                                                 function = "kp";
  107                                                 groups = "kp_a_2";
  108                                         };
  109                                         default_cfg1 {
  110                                                 pins =
  111                                                 "GPIO153_B17", /* I7 */
  112                                                 "GPIO154_C16", /* I6 */
  113                                                 "GPIO155_C19", /* I5 */
  114                                                 "GPIO156_C17", /* I4 */
  115                                                 "GPIO161_D21", /* I3 */
  116                                                 "GPIO162_D20", /* I2 */
  117                                                 "GPIO163_C20", /* I1 */
  118                                                 "GPIO164_B21"; /* I0 */
  119                                                 ste,config = <&in_pd>;
  120                                         };
  121                                         default_cfg2 {
  122                                                 pins =
  123                                                 "GPIO157_A18", /* O7 */
  124                                                 "GPIO158_C18", /* O6 */
  125                                                 "GPIO159_B19", /* O5 */
  126                                                 "GPIO160_B20", /* O4 */
  127                                                 "GPIO165_C21", /* O3 */
  128                                                 "GPIO166_A22", /* O2 */
  129                                                 "GPIO167_B24", /* O1 */
  130                                                 "GPIO168_C22"; /* O0 */
  131                                                 ste,config = <&out_lo>;
  132                                         };
  133                                 };
  134                                 ske_kpa2_sleep_mode: ske_kpa2_sleep {
  135                                         sleep_cfg1 {
  136                                                 pins =
  137                                                 "GPIO153_B17", /* I7 */
  138                                                 "GPIO154_C16", /* I6 */
  139                                                 "GPIO155_C19", /* I5 */
  140                                                 "GPIO156_C17", /* I4 */
  141                                                 "GPIO161_D21", /* I3 */
  142                                                 "GPIO162_D20", /* I2 */
  143                                                 "GPIO163_C20", /* I1 */
  144                                                 "GPIO164_B21"; /* I0 */
  145                                                 ste,config = <&slpm_in_pu_wkup_pdis_en>;
  146                                         };
  147                                         sleep_cfg2 {
  148                                                 pins =
  149                                                 "GPIO157_A18", /* O7 */
  150                                                 "GPIO158_C18", /* O6 */
  151                                                 "GPIO159_B19", /* O5 */
  152                                                 "GPIO160_B20", /* O4 */
  153                                                 "GPIO165_C21", /* O3 */
  154                                                 "GPIO166_A22", /* O2 */
  155                                                 "GPIO167_B24", /* O1 */
  156                                                 "GPIO168_C22"; /* O0 */
  157                                                 ste,config = <&slpm_out_lo_pdis>;
  158                                         };
  159                                 };
  160                                 /*
  161                                  * SKE keys on position 1 and "other C1" combi giving
  162                                  * six rows of six keys.
  163                                  */
  164                                 ske_kpaoc1_default_mode: ske_kpaoc1_default {
  165                                         default_mux {
  166                                                 function = "kp";
  167                                                 groups = "kp_a_1", "kp_oc1_1";
  168                                         };
  169                                         default_cfg1 {
  170                                                 pins =
  171                                                 "GPIO91_B6", /* KP_O0 */
  172                                                 "GPIO90_A3", /* KP_O1 */
  173                                                 "GPIO87_B3", /* KP_O2 */
  174                                                 "GPIO86_C6", /* KP_O3 */
  175                                                 "GPIO96_D8", /* KP_O6 */
  176                                                 "GPIO94_D7"; /* KP_O7 */
  177                                                 ste,config = <&out_lo>;
  178                                         };
  179                                         default_cfg2 {
  180                                                 pins =
  181                                                 "GPIO93_B7", /* KP_I0 */
  182                                                 "GPIO92_D6", /* KP_I1 */
  183                                                 "GPIO89_E6", /* KP_I2 */
  184                                                 "GPIO88_C4", /* KP_I3 */
  185                                                 "GPIO97_D9", /* KP_I6 */
  186                                                 "GPIO95_E8"; /* KP_I7 */
  187                                                 ste,config = <&in_pu>;
  188                                         };
  189                                 };
  190                         };
  191 
  192                         wlan {
  193                                 wlan_default_mode: wlan_default {
  194                                         /*
  195                                          * Activate this mode with the WLAN chip.
  196                                          * These are plain GPIO pins used by WLAN
  197                                          */
  198                                         default_cfg1 {
  199                                                 pins =
  200                                                 "GPIO226_AF8", /* WLAN_PMU_EN */
  201                                                 "GPIO85_D5"; /* WLAN_ENA */
  202                                                 ste,config = <&gpio_out_lo>;
  203                                         };
  204                                         default_cfg2 {
  205                                                 pins = "GPIO4_AH6"; /* WLAN_IRQ on UART1 */
  206                                                 ste,config = <&gpio_in_pu>;
  207                                         };
  208                                 };
  209                         };
  210                 };
  211         };
  212 };

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