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     1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
    2 /*
    3  * Copyright (C) STMicroelectronics 2022 - All Rights Reserved
    4  * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
    5  */
    6 
    7 /dts-v1/;
    8 
    9 #include "stm32mp157c-ev1.dts"
   10 #include "stm32mp15-scmi.dtsi"
   11 
   12 / {
   13         model = "STMicroelectronics STM32MP157C-EV1 SCMI eval daughter on eval mother";
   14         compatible = "st,stm32mp157c-ev1-scmi", "st,stm32mp157c-ev1", "st,stm32mp157c-ed1",
   15                      "st,stm32mp157";
   16 
   17         reserved-memory {
   18                 optee@fe000000 {
   19                         reg = <0xfe000000 0x2000000>;
   20                         no-map;
   21                 };
   22         };
   23 };
   24 
   25 &cpu0 {
   26         clocks = <&scmi_clk CK_SCMI_MPU>;
   27 };
   28 
   29 &cpu1 {
   30         clocks = <&scmi_clk CK_SCMI_MPU>;
   31 };
   32 
   33 &cryp1 {
   34         clocks = <&scmi_clk CK_SCMI_CRYP1>;
   35         resets = <&scmi_reset RST_SCMI_CRYP1>;
   36 };
   37 
   38 &dsi {
   39         phy-dsi-supply = <&scmi_reg18>;
   40         clocks = <&rcc DSI_K>, <&scmi_clk CK_SCMI_HSE>, <&rcc DSI_PX>;
   41 };
   42 
   43 &gpioz {
   44         clocks = <&scmi_clk CK_SCMI_GPIOZ>;
   45 };
   46 
   47 &hash1 {
   48         clocks = <&scmi_clk CK_SCMI_HASH1>;
   49         resets = <&scmi_reset RST_SCMI_HASH1>;
   50 };
   51 
   52 &i2c4 {
   53         clocks = <&scmi_clk CK_SCMI_I2C4>;
   54         resets = <&scmi_reset RST_SCMI_I2C4>;
   55 };
   56 
   57 &iwdg2 {
   58         clocks = <&rcc IWDG2>, <&scmi_clk CK_SCMI_LSI>;
   59 };
   60 
   61 &m_can1 {
   62         clocks = <&scmi_clk CK_SCMI_HSE>, <&rcc FDCAN_K>;
   63 };
   64 
   65 &mdma1 {
   66         resets = <&scmi_reset RST_SCMI_MDMA>;
   67 };
   68 
   69 &mlahb {
   70         resets = <&scmi_reset RST_SCMI_MCU>;
   71 };
   72 
   73 &rcc {
   74         compatible = "st,stm32mp1-rcc-secure", "syscon";
   75         clock-names = "hse", "hsi", "csi", "lse", "lsi";
   76         clocks = <&scmi_clk CK_SCMI_HSE>,
   77                  <&scmi_clk CK_SCMI_HSI>,
   78                  <&scmi_clk CK_SCMI_CSI>,
   79                  <&scmi_clk CK_SCMI_LSE>,
   80                  <&scmi_clk CK_SCMI_LSI>;
   81 };
   82 
   83 &rng1 {
   84         clocks = <&scmi_clk CK_SCMI_RNG1>;
   85         resets = <&scmi_reset RST_SCMI_RNG1>;
   86 };
   87 
   88 &rtc {
   89         clocks = <&scmi_clk CK_SCMI_RTCAPB>, <&scmi_clk CK_SCMI_RTC>;
   90 };
Cache object: e0a25c36836a88ac31e0c999ce24471c 
 
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