The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/src/arm/stm32mp15xx-dhcom-som.dtsi

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    1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
    2 /*
    3  * Copyright (C) 2019-2020 Marek Vasut <marex@denx.de>
    4  */
    5 
    6 #include "stm32mp15-pinctrl.dtsi"
    7 #include "stm32mp15xxaa-pinctrl.dtsi"
    8 #include <dt-bindings/gpio/gpio.h>
    9 #include <dt-bindings/mfd/st,stpmic1.h>
   10 
   11 / {
   12         aliases {
   13                 ethernet0 = &ethernet0;
   14                 ethernet1 = &ksz8851;
   15                 rtc0 = &hwrtc;
   16                 rtc1 = &rtc;
   17         };
   18 
   19         memory@c0000000 {
   20                 device_type = "memory";
   21                 reg = <0xC0000000 0x40000000>;
   22         };
   23 
   24         reserved-memory {
   25                 #address-cells = <1>;
   26                 #size-cells = <1>;
   27                 ranges;
   28 
   29                 mcuram2: mcuram2@10000000 {
   30                         compatible = "shared-dma-pool";
   31                         reg = <0x10000000 0x40000>;
   32                         no-map;
   33                 };
   34 
   35                 vdev0vring0: vdev0vring0@10040000 {
   36                         compatible = "shared-dma-pool";
   37                         reg = <0x10040000 0x1000>;
   38                         no-map;
   39                 };
   40 
   41                 vdev0vring1: vdev0vring1@10041000 {
   42                         compatible = "shared-dma-pool";
   43                         reg = <0x10041000 0x1000>;
   44                         no-map;
   45                 };
   46 
   47                 vdev0buffer: vdev0buffer@10042000 {
   48                         compatible = "shared-dma-pool";
   49                         reg = <0x10042000 0x4000>;
   50                         no-map;
   51                 };
   52 
   53                 mcuram: mcuram@30000000 {
   54                         compatible = "shared-dma-pool";
   55                         reg = <0x30000000 0x40000>;
   56                         no-map;
   57                 };
   58 
   59                 retram: retram@38000000 {
   60                         compatible = "shared-dma-pool";
   61                         reg = <0x38000000 0x10000>;
   62                         no-map;
   63                 };
   64         };
   65 
   66         ethernet_vio: vioregulator {
   67                 compatible = "regulator-fixed";
   68                 regulator-name = "vio";
   69                 regulator-min-microvolt = <3300000>;
   70                 regulator-max-microvolt = <3300000>;
   71                 gpio = <&gpiog 3 GPIO_ACTIVE_LOW>;
   72                 regulator-always-on;
   73                 regulator-boot-on;
   74                 vin-supply = <&vdd>;
   75         };
   76 };
   77 
   78 &adc {
   79         vdd-supply = <&vdd>;
   80         vdda-supply = <&vdda>;
   81         vref-supply = <&vdda>;
   82         status = "okay";
   83 
   84         adc1: adc@0 {
   85                 st,min-sample-time-nsecs = <5000>;
   86                 st,adc-channels = <0>;
   87                 status = "okay";
   88         };
   89 
   90         adc2: adc@100 {
   91                 st,adc-channels = <1>;
   92                 st,min-sample-time-nsecs = <5000>;
   93                 status = "okay";
   94         };
   95 };
   96 
   97 &crc1 {
   98         status = "okay";
   99 };
  100 
  101 &dac {
  102         pinctrl-names = "default";
  103         pinctrl-0 = <&dac_ch1_pins_a &dac_ch2_pins_a>;
  104         vref-supply = <&vdda>;
  105         status = "okay";
  106 
  107         dac1: dac@1 {
  108                 status = "okay";
  109         };
  110         dac2: dac@2 {
  111                 status = "okay";
  112         };
  113 };
  114 
  115 &dts {
  116         status = "okay";
  117 };
  118 
  119 &ethernet0 {
  120         status = "okay";
  121         pinctrl-0 = <&ethernet0_rmii_pins_c &mco2_pins_a>;
  122         pinctrl-1 = <&ethernet0_rmii_sleep_pins_c &mco2_sleep_pins_a>;
  123         pinctrl-names = "default", "sleep";
  124         phy-mode = "rmii";
  125         max-speed = <100>;
  126         phy-handle = <&phy0>;
  127 
  128         mdio0 {
  129                 #address-cells = <1>;
  130                 #size-cells = <0>;
  131                 compatible = "snps,dwmac-mdio";
  132 
  133                 phy0: ethernet-phy@1 {
  134                         reg = <1>;
  135                         /* LAN8710Ai */
  136                         compatible = "ethernet-phy-id0007.c0f0",
  137                                      "ethernet-phy-ieee802.3-c22";
  138                         clocks = <&rcc CK_MCO2>;
  139                         reset-gpios = <&gpioh 3 GPIO_ACTIVE_LOW>;
  140                         reset-assert-us = <500>;
  141                         reset-deassert-us = <500>;
  142                         smsc,disable-energy-detect;
  143                         interrupt-parent = <&gpioi>;
  144                         interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
  145                 };
  146         };
  147 };
  148 
  149 &fmc {
  150         pinctrl-names = "default", "sleep";
  151         pinctrl-0 = <&fmc_pins_b>;
  152         pinctrl-1 = <&fmc_sleep_pins_b>;
  153         status = "okay";
  154 
  155         ksz8851: ethernet@1,0 {
  156                 compatible = "micrel,ks8851-mll";
  157                 reg = <1 0x0 0x2>, <1 0x2 0x20000>;
  158                 interrupt-parent = <&gpioc>;
  159                 interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
  160                 bank-width = <2>;
  161 
  162                 /* Timing values are in nS */
  163                 st,fmc2-ebi-cs-mux-enable;
  164                 st,fmc2-ebi-cs-transaction-type = <4>;
  165                 st,fmc2-ebi-cs-buswidth = <16>;
  166                 st,fmc2-ebi-cs-address-setup-ns = <5>;
  167                 st,fmc2-ebi-cs-address-hold-ns = <5>;
  168                 st,fmc2-ebi-cs-bus-turnaround-ns = <5>;
  169                 st,fmc2-ebi-cs-data-setup-ns = <45>;
  170                 st,fmc2-ebi-cs-data-hold-ns = <1>;
  171                 st,fmc2-ebi-cs-write-address-setup-ns = <5>;
  172                 st,fmc2-ebi-cs-write-address-hold-ns = <5>;
  173                 st,fmc2-ebi-cs-write-bus-turnaround-ns = <5>;
  174                 st,fmc2-ebi-cs-write-data-setup-ns = <45>;
  175                 st,fmc2-ebi-cs-write-data-hold-ns = <1>;
  176         };
  177 };
  178 
  179 &gpioa {
  180         gpio-line-names = "", "", "", "",
  181                           "", "", "DHCOM-K", "",
  182                           "", "", "", "",
  183                           "", "", "", "";
  184 };
  185 
  186 &gpiob {
  187         gpio-line-names = "", "", "", "",
  188                           "", "", "", "",
  189                           "DHCOM-Q", "", "", "",
  190                           "", "", "", "";
  191 };
  192 
  193 &gpioc {
  194         gpio-line-names = "", "", "", "",
  195                           "", "", "DHCOM-E", "",
  196                           "", "", "", "",
  197                           "", "", "", "";
  198 };
  199 
  200 &gpiod {
  201         gpio-line-names = "", "", "", "",
  202                           "", "", "DHCOM-B", "",
  203                           "", "", "", "DHCOM-F",
  204                           "DHCOM-D", "", "", "";
  205 };
  206 
  207 &gpioe {
  208         gpio-line-names = "", "", "", "",
  209                           "", "", "DHCOM-P", "",
  210                           "", "", "", "",
  211                           "", "", "", "";
  212 };
  213 
  214 &gpiof {
  215         gpio-line-names = "", "", "", "DHCOM-A",
  216                           "", "", "", "",
  217                           "", "", "", "",
  218                           "", "", "", "";
  219 };
  220 
  221 &gpiog {
  222         gpio-line-names = "DHCOM-C", "", "", "",
  223                           "", "", "", "",
  224                           "DHCOM-L", "", "", "",
  225                           "", "", "", "";
  226 };
  227 
  228 &gpioh {
  229         gpio-line-names = "", "", "", "",
  230                           "", "", "", "DHCOM-N",
  231                           "DHCOM-J", "DHCOM-W", "DHCOM-V", "DHCOM-U",
  232                           "DHCOM-T", "", "DHCOM-S", "";
  233 };
  234 
  235 &gpioi {
  236         gpio-line-names = "DHCOM-G", "DHCOM-O", "DHCOM-H", "DHCOM-I",
  237                           "DHCOM-R", "DHCOM-M", "", "",
  238                           "", "", "", "",
  239                           "", "", "", "";
  240 };
  241 
  242 &i2c4 {
  243         pinctrl-names = "default";
  244         pinctrl-0 = <&i2c4_pins_a>;
  245         i2c-scl-rising-time-ns = <185>;
  246         i2c-scl-falling-time-ns = <20>;
  247         status = "okay";
  248         /* spare dmas for other usage */
  249         /delete-property/dmas;
  250         /delete-property/dma-names;
  251 
  252         hwrtc: rtc@32 {
  253                 compatible = "microcrystal,rv8803";
  254                 reg = <0x32>;
  255         };
  256 
  257         pmic: stpmic@33 {
  258                 compatible = "st,stpmic1";
  259                 reg = <0x33>;
  260                 interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
  261                 interrupt-controller;
  262                 #interrupt-cells = <2>;
  263                 status = "okay";
  264 
  265                 regulators {
  266                         compatible = "st,stpmic1-regulators";
  267                         ldo1-supply = <&v3v3>;
  268                         ldo2-supply = <&v3v3>;
  269                         ldo3-supply = <&vdd_ddr>;
  270                         ldo5-supply = <&v3v3>;
  271                         ldo6-supply = <&v3v3>;
  272                         pwr_sw1-supply = <&bst_out>;
  273                         pwr_sw2-supply = <&bst_out>;
  274 
  275                         vddcore: buck1 {
  276                                 regulator-name = "vddcore";
  277                                 regulator-min-microvolt = <800000>;
  278                                 regulator-max-microvolt = <1350000>;
  279                                 regulator-always-on;
  280                                 regulator-initial-mode = <0>;
  281                                 regulator-over-current-protection;
  282                         };
  283 
  284                         vdd_ddr: buck2 {
  285                                 regulator-name = "vdd_ddr";
  286                                 regulator-min-microvolt = <1350000>;
  287                                 regulator-max-microvolt = <1350000>;
  288                                 regulator-always-on;
  289                                 regulator-initial-mode = <0>;
  290                                 regulator-over-current-protection;
  291                         };
  292 
  293                         vdd: buck3 {
  294                                 regulator-name = "vdd";
  295                                 regulator-min-microvolt = <3300000>;
  296                                 regulator-max-microvolt = <3300000>;
  297                                 regulator-always-on;
  298                                 st,mask-reset;
  299                                 regulator-initial-mode = <0>;
  300                                 regulator-over-current-protection;
  301                         };
  302 
  303                         v3v3: buck4 {
  304                                 regulator-name = "v3v3";
  305                                 regulator-min-microvolt = <3300000>;
  306                                 regulator-max-microvolt = <3300000>;
  307                                 regulator-always-on;
  308                                 regulator-over-current-protection;
  309                                 regulator-initial-mode = <0>;
  310                         };
  311 
  312                         vdda: ldo1 {
  313                                 regulator-name = "vdda";
  314                                 regulator-always-on;
  315                                 regulator-min-microvolt = <2900000>;
  316                                 regulator-max-microvolt = <2900000>;
  317                                 interrupts = <IT_CURLIM_LDO1 0>;
  318                         };
  319 
  320                         v2v8: ldo2 {
  321                                 regulator-name = "v2v8";
  322                                 regulator-min-microvolt = <2800000>;
  323                                 regulator-max-microvolt = <2800000>;
  324                                 interrupts = <IT_CURLIM_LDO2 0>;
  325                         };
  326 
  327                         vtt_ddr: ldo3 {
  328                                 regulator-name = "vtt_ddr";
  329                                 regulator-min-microvolt = <500000>;
  330                                 regulator-max-microvolt = <750000>;
  331                                 regulator-always-on;
  332                                 regulator-over-current-protection;
  333                         };
  334 
  335                         vdd_usb: ldo4 {
  336                                 regulator-name = "vdd_usb";
  337                                 interrupts = <IT_CURLIM_LDO4 0>;
  338                         };
  339 
  340                         vdd_sd: ldo5 {
  341                                 regulator-name = "vdd_sd";
  342                                 regulator-min-microvolt = <2900000>;
  343                                 regulator-max-microvolt = <2900000>;
  344                                 interrupts = <IT_CURLIM_LDO5 0>;
  345                                 regulator-boot-on;
  346                         };
  347 
  348                         v1v8: ldo6 {
  349                                 regulator-name = "v1v8";
  350                                 regulator-min-microvolt = <1800000>;
  351                                 regulator-max-microvolt = <1800000>;
  352                                 interrupts = <IT_CURLIM_LDO6 0>;
  353                         };
  354 
  355                         vref_ddr: vref_ddr {
  356                                 regulator-name = "vref_ddr";
  357                                 regulator-always-on;
  358                         };
  359 
  360                         bst_out: boost {
  361                                 regulator-name = "bst_out";
  362                                 interrupts = <IT_OCP_BOOST 0>;
  363                         };
  364 
  365                         vbus_otg: pwr_sw1 {
  366                                 regulator-name = "vbus_otg";
  367                                 interrupts = <IT_OCP_OTG 0>;
  368                         };
  369 
  370                         vbus_sw: pwr_sw2 {
  371                                 regulator-name = "vbus_sw";
  372                                 interrupts = <IT_OCP_SWOUT 0>;
  373                                 regulator-active-discharge = <1>;
  374                         };
  375                 };
  376 
  377                 onkey {
  378                         compatible = "st,stpmic1-onkey";
  379                         interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 0>;
  380                         interrupt-names = "onkey-falling", "onkey-rising";
  381                         power-off-time-sec = <10>;
  382                         status = "okay";
  383                 };
  384 
  385                 watchdog {
  386                         compatible = "st,stpmic1-wdt";
  387                         status = "disabled";
  388                 };
  389         };
  390 
  391         touchscreen@49 {
  392                 compatible = "ti,tsc2004";
  393                 reg = <0x49>;
  394                 vio-supply = <&v3v3>;
  395                 interrupts-extended = <&gpioh 15 IRQ_TYPE_EDGE_FALLING>;
  396         };
  397 
  398         eeprom@50 {
  399                 compatible = "atmel,24c02";
  400                 reg = <0x50>;
  401                 pagesize = <16>;
  402         };
  403 };
  404 
  405 &ipcc {
  406         status = "okay";
  407 };
  408 
  409 &iwdg2 {
  410         timeout-sec = <32>;
  411         status = "okay";
  412 };
  413 
  414 &m4_rproc {
  415         memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
  416                         <&vdev0vring1>, <&vdev0buffer>;
  417         mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
  418         mbox-names = "vq0", "vq1", "shutdown";
  419         interrupt-parent = <&exti>;
  420         interrupts = <68 1>;
  421         status = "okay";
  422 };
  423 
  424 &pwr_regulators {
  425         vdd-supply = <&vdd>;
  426         vdd_3v3_usbfs-supply = <&vdd_usb>;
  427 };
  428 
  429 &qspi {
  430         pinctrl-names = "default", "sleep";
  431         pinctrl-0 = <&qspi_clk_pins_a &qspi_bk1_pins_a>;
  432         pinctrl-1 = <&qspi_clk_sleep_pins_a &qspi_bk1_sleep_pins_a>;
  433         reg = <0x58003000 0x1000>, <0x70000000 0x4000000>;
  434         #address-cells = <1>;
  435         #size-cells = <0>;
  436         status = "okay";
  437 
  438         flash0: flash@0 {
  439                 compatible = "jedec,spi-nor";
  440                 reg = <0>;
  441                 spi-rx-bus-width = <4>;
  442                 spi-max-frequency = <108000000>;
  443                 #address-cells = <1>;
  444                 #size-cells = <1>;
  445         };
  446 };
  447 
  448 &rcc {
  449         /* Connect MCO2 output to ETH_RX_CLK input via pad-pad connection */
  450         clocks = <&rcc CK_MCO2>;
  451         clock-names = "ETH_RX_CLK/ETH_REF_CLK";
  452 
  453         /*
  454          * Set PLL4P output to 100 MHz to supply SDMMC with faster clock,
  455          * set MCO2 output to 50 MHz to supply ETHRX clock with PLL4P/2,
  456          * so that MCO2 behaves as a divider for the ETHRX clock here.
  457          */
  458         assigned-clocks = <&rcc CK_MCO2>, <&rcc PLL4_P>;
  459         assigned-clock-parents = <&rcc PLL4_P>;
  460         assigned-clock-rates = <50000000>, <100000000>;
  461 };
  462 
  463 &rng1 {
  464         status = "okay";
  465 };
  466 
  467 &rtc {
  468         status = "okay";
  469 };
  470 
  471 &sdmmc1 {
  472         pinctrl-names = "default", "opendrain", "sleep", "init";
  473         pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>;
  474         pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_dir_pins_a>;
  475         pinctrl-2 = <&sdmmc1_b4_sleep_pins_a &sdmmc1_dir_sleep_pins_a>;
  476         pinctrl-3 = <&sdmmc1_b4_init_pins_a &sdmmc1_dir_init_pins_a>;
  477         cd-gpios = <&gpiog 1 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
  478         disable-wp;
  479         st,sig-dir;
  480         st,neg-edge;
  481         st,use-ckin;
  482         st,cmd-gpios = <&gpiod 2 0>;
  483         st,ck-gpios = <&gpioc 12 0>;
  484         st,ckin-gpios = <&gpioe 4 0>;
  485         bus-width = <4>;
  486         vmmc-supply = <&vdd_sd>;
  487         status = "okay";
  488 };
  489 
  490 &sdmmc1_b4_pins_a {
  491         /*
  492          * SD bus pull-up resistors:
  493          * - optional on SoMs with SD voltage translator
  494          * - mandatory on SoMs without SD voltage translator
  495          */
  496         pins1 {
  497                 bias-pull-up;
  498         };
  499         pins2 {
  500                 bias-pull-up;
  501         };
  502 };
  503 
  504 &sdmmc2 {
  505         pinctrl-names = "default", "opendrain", "sleep";
  506         pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a>;
  507         pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_a>;
  508         pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_a>;
  509         non-removable;
  510         no-sd;
  511         no-sdio;
  512         st,neg-edge;
  513         bus-width = <8>;
  514         vmmc-supply = <&v3v3>;
  515         vqmmc-supply = <&v3v3>;
  516         mmc-ddr-3_3v;
  517         status = "okay";
  518 };
  519 
  520 &sdmmc3 {
  521         pinctrl-names = "default", "opendrain", "sleep";
  522         pinctrl-0 = <&sdmmc3_b4_pins_a>;
  523         pinctrl-1 = <&sdmmc3_b4_od_pins_a>;
  524         pinctrl-2 = <&sdmmc3_b4_sleep_pins_a>;
  525         broken-cd;
  526         st,neg-edge;
  527         bus-width = <4>;
  528         vmmc-supply = <&v3v3>;
  529         vqmmc-supply = <&v3v3>;
  530         mmc-ddr-3_3v;
  531         status = "okay";
  532 };
  533 
  534 &uart4 {
  535         pinctrl-names = "default";
  536         pinctrl-0 = <&uart4_pins_a>;
  537         /delete-property/dmas;
  538         /delete-property/dma-names;
  539         status = "okay";
  540 };

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