The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/src/arm/sun8i-a83t-bananapi-m3.dts

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    1 /*
    2  * Copyright 2017 Chen-Yu Tsai
    3  *
    4  * Chen-Yu Tsai <wens@csie.org>
    5  *
    6  * This file is dual-licensed: you can use it either under the terms
    7  * of the GPL or the X11 license, at your option. Note that this dual
    8  * licensing only applies to this file, and not this project as a
    9  * whole.
   10  *
   11  *  a) This file is free software; you can redistribute it and/or
   12  *     modify it under the terms of the GNU General Public License as
   13  *     published by the Free Software Foundation; either version 2 of the
   14  *     License, or (at your option) any later version.
   15  *
   16  *     This file is distributed in the hope that it will be useful,
   17  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
   18  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   19  *     GNU General Public License for more details.
   20  *
   21  * Or, alternatively,
   22  *
   23  *  b) Permission is hereby granted, free of charge, to any person
   24  *     obtaining a copy of this software and associated documentation
   25  *     files (the "Software"), to deal in the Software without
   26  *     restriction, including without limitation the rights to use,
   27  *     copy, modify, merge, publish, distribute, sublicense, and/or
   28  *     sell copies of the Software, and to permit persons to whom the
   29  *     Software is furnished to do so, subject to the following
   30  *     conditions:
   31  *
   32  *     The above copyright notice and this permission notice shall be
   33  *     included in all copies or substantial portions of the Software.
   34  *
   35  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
   36  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
   37  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
   38  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
   39  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
   40  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
   41  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
   42  *     OTHER DEALINGS IN THE SOFTWARE.
   43  */
   44 
   45 /dts-v1/;
   46 #include "sun8i-a83t.dtsi"
   47 
   48 #include <dt-bindings/gpio/gpio.h>
   49 
   50 / {
   51         model = "Banana Pi BPI-M3";
   52         compatible = "sinovoip,bpi-m3", "allwinner,sun8i-a83t";
   53 
   54         aliases {
   55                 ethernet0 = &emac;
   56                 serial0 = &uart0;
   57         };
   58 
   59         chosen {
   60                 stdout-path = "serial0:115200n8";
   61         };
   62 
   63         connector {
   64                 compatible = "hdmi-connector";
   65                 type = "a";
   66 
   67                 port {
   68                         hdmi_con_in: endpoint {
   69                                 remote-endpoint = <&hdmi_out_con>;
   70                         };
   71                 };
   72         };
   73 
   74         leds {
   75                 compatible = "gpio-leds";
   76 
   77                 led-0 {
   78                         label = "bananapi-m3:blue:usr";
   79                         gpios = <&axp_gpio 1 GPIO_ACTIVE_HIGH>;
   80                 };
   81 
   82                 led-1 {
   83                         label = "bananapi-m3:green:usr";
   84                         gpios = <&axp_gpio 0 GPIO_ACTIVE_HIGH>;
   85                 };
   86         };
   87 
   88         reg_usb1_vbus: reg-usb1-vbus {
   89                 compatible = "regulator-fixed";
   90                 regulator-name = "usb1-vbus";
   91                 regulator-min-microvolt = <5000000>;
   92                 regulator-max-microvolt = <5000000>;
   93                 regulator-boot-on;
   94                 enable-active-high;
   95                 gpio = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */
   96         };
   97 
   98         wifi_pwrseq: wifi_pwrseq {
   99                 compatible = "mmc-pwrseq-simple";
  100                 clocks = <&ac100_rtc 1>;
  101                 clock-names = "ext_clock";
  102                 /* The WiFi low power clock must be 32768 Hz */
  103                 assigned-clocks = <&ac100_rtc 1>;
  104                 assigned-clock-rates = <32768>;
  105                 /* enables internal regulator and de-asserts reset */
  106                 reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 WL-PMU-EN */
  107         };
  108 };
  109 
  110 &cpu0 {
  111         cpu-supply = <&reg_dcdc2>;
  112 };
  113 
  114 &cpu100 {
  115         cpu-supply = <&reg_dcdc3>;
  116 };
  117 
  118 &de {
  119         status = "okay";
  120 };
  121 
  122 &ehci0 {
  123         /* Terminus Tech FE 1.1s 4-port USB 2.0 hub here */
  124         status = "okay";
  125 
  126         /* TODO GL830 USB-to-SATA bridge downstream w/ GPIO power controls */
  127 };
  128 
  129 &emac {
  130         pinctrl-names = "default";
  131         pinctrl-0 = <&emac_rgmii_pins>;
  132         phy-supply = <&reg_sw>;
  133         phy-handle = <&rgmii_phy>;
  134         phy-mode = "rgmii-id";
  135         allwinner,rx-delay-ps = <700>;
  136         allwinner,tx-delay-ps = <700>;
  137         status = "okay";
  138 };
  139 
  140 &hdmi {
  141         status = "okay";
  142 };
  143 
  144 &hdmi_out {
  145         hdmi_out_con: endpoint {
  146                 remote-endpoint = <&hdmi_con_in>;
  147         };
  148 };
  149 
  150 &mdio {
  151         rgmii_phy: ethernet-phy@1 {
  152                 compatible = "ethernet-phy-ieee802.3-c22";
  153                 reg = <1>;
  154         };
  155 };
  156 
  157 &mmc0 {
  158         pinctrl-names = "default";
  159         pinctrl-0 = <&mmc0_pins>;
  160         vmmc-supply = <&reg_dcdc1>;
  161         bus-width = <4>;
  162         cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
  163         status = "okay";
  164 };
  165 
  166 &mmc1 {
  167         vmmc-supply = <&reg_dldo1>;
  168         vqmmc-supply = <&reg_dldo1>;
  169         mmc-pwrseq = <&wifi_pwrseq>;
  170         bus-width = <4>;
  171         non-removable;
  172         status = "okay";
  173 
  174         brcmf: wifi@1 {
  175                 reg = <1>;
  176                 compatible = "brcm,bcm4329-fmac";
  177                 interrupt-parent = <&r_pio>;
  178                 interrupts = <0 3 IRQ_TYPE_LEVEL_LOW>;
  179                 interrupt-names = "host-wake";
  180         };
  181 };
  182 
  183 &mmc2 {
  184         pinctrl-names = "default";
  185         pinctrl-0 = <&mmc2_8bit_emmc_pins>;
  186         vmmc-supply = <&reg_dcdc1>;
  187         vqmmc-supply = <&reg_dcdc1>;
  188         bus-width = <8>;
  189         non-removable;
  190         cap-mmc-hw-reset;
  191         status = "okay";
  192 };
  193 
  194 &r_cir {
  195         clock-frequency = <3000000>;
  196         status = "okay";
  197 };
  198 
  199 &r_rsb {
  200         status = "okay";
  201 
  202         axp81x: pmic@3a3 {
  203                 compatible = "x-powers,axp813";
  204                 reg = <0x3a3>;
  205                 interrupt-parent = <&r_intc>;
  206                 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_LOW>;
  207                 eldoin-supply = <&reg_dcdc1>;
  208                 fldoin-supply = <&reg_dcdc5>;
  209                 swin-supply = <&reg_dcdc1>;
  210                 x-powers,drive-vbus-en;
  211         };
  212 
  213         ac100: codec@e89 {
  214                 compatible = "x-powers,ac100";
  215                 reg = <0xe89>;
  216 
  217                 ac100_codec: codec {
  218                         compatible = "x-powers,ac100-codec";
  219                         interrupt-parent = <&r_pio>;
  220                         interrupts = <0 11 IRQ_TYPE_LEVEL_LOW>; /* PL11 */
  221                         #clock-cells = <0>;
  222                         clock-output-names = "4M_adda";
  223                 };
  224 
  225                 ac100_rtc: rtc {
  226                         compatible = "x-powers,ac100-rtc";
  227                         interrupt-parent = <&r_intc>;
  228                         interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_LOW>;
  229                         clocks = <&ac100_codec>;
  230                         #clock-cells = <1>;
  231                         clock-output-names = "cko1_rtc",
  232                                              "cko2_rtc",
  233                                              "cko3_rtc";
  234                 };
  235         };
  236 };
  237 
  238 #include "axp81x.dtsi"
  239 
  240 &ac_power_supply {
  241         status = "okay";
  242 };
  243 
  244 &battery_power_supply {
  245         status = "okay";
  246 };
  247 
  248 &reg_aldo1 {
  249         regulator-always-on;
  250         regulator-min-microvolt = <1800000>;
  251         regulator-max-microvolt = <1800000>;
  252         regulator-name = "vcc-1v8";
  253 };
  254 
  255 &reg_aldo2 {
  256         regulator-always-on;
  257         regulator-min-microvolt = <1800000>;
  258         regulator-max-microvolt = <1800000>;
  259         regulator-name = "dram-pll";
  260 };
  261 
  262 &reg_aldo3 {
  263         regulator-always-on;
  264         regulator-min-microvolt = <3000000>;
  265         regulator-max-microvolt = <3000000>;
  266         regulator-name = "avcc";
  267 };
  268 
  269 &reg_dcdc1 {
  270         /* schematics says 3.1V but FEX file says 3.3V */
  271         regulator-always-on;
  272         regulator-min-microvolt = <3300000>;
  273         regulator-max-microvolt = <3300000>;
  274         regulator-name = "vcc-3v3";
  275 };
  276 
  277 &reg_dcdc2 {
  278         regulator-always-on;
  279         regulator-min-microvolt = <700000>;
  280         regulator-max-microvolt = <1100000>;
  281         regulator-name = "vdd-cpua";
  282 };
  283 
  284 &reg_dcdc3 {
  285         regulator-always-on;
  286         regulator-min-microvolt = <700000>;
  287         regulator-max-microvolt = <1100000>;
  288         regulator-name = "vdd-cpub";
  289 };
  290 
  291 &reg_dcdc4 {
  292         regulator-min-microvolt = <700000>;
  293         regulator-max-microvolt = <1100000>;
  294         regulator-name = "vdd-gpu";
  295 };
  296 
  297 &reg_dcdc5 {
  298         regulator-always-on;
  299         regulator-min-microvolt = <1200000>;
  300         regulator-max-microvolt = <1200000>;
  301         regulator-name = "vcc-dram";
  302 };
  303 
  304 &reg_dcdc6 {
  305         regulator-always-on;
  306         regulator-min-microvolt = <900000>;
  307         regulator-max-microvolt = <900000>;
  308         regulator-name = "vdd-sys";
  309 };
  310 
  311 &reg_dldo1 {
  312         /*
  313          * This powers both the WiFi/BT module's main power, I/O supply,
  314          * and external pull-ups on all the data lines. It should be set
  315          * to the same voltage as the I/O supply (DCDC1 in this case) to
  316          * avoid any leakage or mismatch.
  317          */
  318         regulator-min-microvolt = <3300000>;
  319         regulator-max-microvolt = <3300000>;
  320         regulator-name = "vcc-wifi";
  321 };
  322 
  323 &reg_dldo3 {
  324         regulator-always-on;
  325         regulator-min-microvolt = <3300000>;
  326         regulator-max-microvolt = <3300000>;
  327         regulator-name = "vcc-pd";
  328 };
  329 
  330 &reg_drivevbus {
  331         regulator-name = "usb0-vbus";
  332         status = "okay";
  333 };
  334 
  335 &reg_fldo1 {
  336         regulator-min-microvolt = <1080000>;
  337         regulator-max-microvolt = <1320000>;
  338         regulator-name = "vdd12-hsic";
  339 };
  340 
  341 &reg_fldo2 {
  342         /*
  343          * Despite the embedded CPUs core not being used in any way,
  344          * this must remain on or the system will hang.
  345          */
  346         regulator-always-on;
  347         regulator-min-microvolt = <700000>;
  348         regulator-max-microvolt = <1100000>;
  349         regulator-name = "vdd-cpus";
  350 };
  351 
  352 &reg_rtc_ldo {
  353         regulator-name = "vcc-rtc";
  354 };
  355 
  356 &reg_sw {
  357         /*
  358          * The PHY requires 20ms after all voltages
  359          * are applied until core logic is ready and
  360          * 30ms after the reset pin is de-asserted.
  361          * Set a 100ms delay to account for PMIC
  362          * ramp time and board traces.
  363          */
  364         regulator-enable-ramp-delay = <100000>;
  365         regulator-name = "vcc-ephy";
  366 };
  367 
  368 &uart0 {
  369         pinctrl-names = "default";
  370         pinctrl-0 = <&uart0_pb_pins>;
  371         status = "okay";
  372 };
  373 
  374 &uart1 {
  375         pinctrl-names = "default";
  376         pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
  377         uart-has-rtscts;
  378         status = "okay";
  379 
  380         bluetooth {
  381                 compatible = "brcm,bcm43438-bt";
  382                 clocks = <&ac100_rtc 1>;
  383                 clock-names = "lpo";
  384                 vbat-supply = <&reg_dldo1>;
  385                 vddio-supply = <&reg_dldo1>;
  386                 device-wakeup-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */
  387                 host-wakeup-gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */
  388                 shutdown-gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */
  389         };
  390 };
  391 
  392 &usb_otg {
  393         dr_mode = "otg";
  394         status = "okay";
  395 };
  396 
  397 &usb_power_supply {
  398         status = "okay";
  399 };
  400 
  401 &usbphy {
  402         usb0_id_det-gpios = <&pio 7 11 GPIO_ACTIVE_HIGH>; /* PH11 */
  403         usb0_vbus_power-supply = <&usb_power_supply>;
  404         usb0_vbus-supply = <&reg_drivevbus>;
  405         usb1_vbus-supply = <&reg_usb1_vbus>;
  406         status = "okay";
  407 };

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