The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)

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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/src/arm/vf500.dtsi

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    1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
    2 //
    3 // Copyright 2013 Freescale Semiconductor, Inc.
    4 
    5 #include "vfxxx.dtsi"
    6 #include <dt-bindings/interrupt-controller/arm-gic.h>
    7 
    8 / {
    9         #address-cells = <1>;
   10         #size-cells = <1>;
   11         chosen { };
   12         aliases { };
   13 
   14         cpus {
   15                 #address-cells = <1>;
   16                 #size-cells = <0>;
   17 
   18                 a5_cpu: cpu@0 {
   19                         compatible = "arm,cortex-a5";
   20                         device_type = "cpu";
   21                         reg = <0x0>;
   22                 };
   23         };
   24 
   25         soc {
   26                 bus@40000000 {
   27 
   28                         intc: interrupt-controller@40003000 {
   29                                 compatible = "arm,cortex-a9-gic";
   30                                 #interrupt-cells = <3>;
   31                                 interrupt-controller;
   32                                 interrupt-parent = <&intc>;
   33                                 reg = <0x40003000 0x1000>,
   34                                       <0x40002100 0x100>;
   35                         };
   36 
   37                         global_timer: timer@40002200 {
   38                                 compatible = "arm,cortex-a9-global-timer";
   39                                 reg = <0x40002200 0x20>;
   40                                 interrupts = <GIC_PPI 11 IRQ_TYPE_EDGE_RISING>;
   41                                 interrupt-parent = <&intc>;
   42                                 clocks = <&clks VF610_CLK_PLATFORM_BUS>;
   43                         };
   44                 };
   45 
   46                 bus@40080000 {
   47                         pmu@40089000 {
   48                                 compatible = "arm,cortex-a5-pmu";
   49                                 interrupts = <7 IRQ_TYPE_LEVEL_HIGH>;
   50                                 interrupt-affinity = <&a5_cpu>;
   51                                 reg = <0x40089000 0x1000>;
   52                         };
   53                 };
   54 
   55         };
   56 };
   57 
   58 &mscm_ir {
   59         interrupt-parent = <&intc>;
   60 };
   61 
   62 &wdoga5 {
   63         status = "okay";
   64 };

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