Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/src/arm/vt8500.dtsi
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1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * vt8500.dtsi - Device tree file for VIA VT8500 SoC 4 * 5 * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz> 6 */ 7 8 / { 9 #address-cells = <1>; 10 #size-cells = <1>; 11 compatible = "via,vt8500"; 12 13 cpus { 14 #address-cells = <0>; 15 #size-cells = <0>; 16 17 cpu { 18 device_type = "cpu"; 19 compatible = "arm,arm926ej-s"; 20 }; 21 }; 22 23 memory { 24 device_type = "memory"; 25 reg = <0x0 0x0>; 26 }; 27 28 aliases { 29 serial0 = &uart0; 30 serial1 = &uart1; 31 serial2 = &uart2; 32 serial3 = &uart3; 33 }; 34 35 soc { 36 #address-cells = <1>; 37 #size-cells = <1>; 38 compatible = "simple-bus"; 39 ranges; 40 interrupt-parent = <&intc>; 41 42 intc: interrupt-controller@d8140000 { 43 compatible = "via,vt8500-intc"; 44 interrupt-controller; 45 reg = <0xd8140000 0x10000>; 46 #interrupt-cells = <1>; 47 }; 48 49 pinctrl: pinctrl@d8110000 { 50 compatible = "via,vt8500-pinctrl"; 51 reg = <0xd8110000 0x10000>; 52 interrupt-controller; 53 #interrupt-cells = <2>; 54 gpio-controller; 55 #gpio-cells = <2>; 56 }; 57 58 pmc@d8130000 { 59 compatible = "via,vt8500-pmc"; 60 reg = <0xd8130000 0x1000>; 61 62 clocks { 63 #address-cells = <1>; 64 #size-cells = <0>; 65 66 ref24: ref24M { 67 #clock-cells = <0>; 68 compatible = "fixed-clock"; 69 clock-frequency = <24000000>; 70 }; 71 72 clkuart0: uart0 { 73 #clock-cells = <0>; 74 compatible = "via,vt8500-device-clock"; 75 clocks = <&ref24>; 76 enable-reg = <0x250>; 77 enable-bit = <1>; 78 }; 79 80 clkuart1: uart1 { 81 #clock-cells = <0>; 82 compatible = "via,vt8500-device-clock"; 83 clocks = <&ref24>; 84 enable-reg = <0x250>; 85 enable-bit = <2>; 86 }; 87 88 clkuart2: uart2 { 89 #clock-cells = <0>; 90 compatible = "via,vt8500-device-clock"; 91 clocks = <&ref24>; 92 enable-reg = <0x250>; 93 enable-bit = <3>; 94 }; 95 96 clkuart3: uart3 { 97 #clock-cells = <0>; 98 compatible = "via,vt8500-device-clock"; 99 clocks = <&ref24>; 100 enable-reg = <0x250>; 101 enable-bit = <4>; 102 }; 103 }; 104 }; 105 106 timer@d8130100 { 107 compatible = "via,vt8500-timer"; 108 reg = <0xd8130100 0x28>; 109 interrupts = <36>; 110 }; 111 112 ehci@d8007900 { 113 compatible = "via,vt8500-ehci"; 114 reg = <0xd8007900 0x200>; 115 interrupts = <43>; 116 }; 117 118 uhci@d8007b00 { 119 compatible = "platform-uhci"; 120 reg = <0xd8007b00 0x200>; 121 interrupts = <43>; 122 }; 123 124 fb: fb@d8050800 { 125 compatible = "via,vt8500-fb"; 126 reg = <0xd800e400 0x400>; 127 interrupts = <12>; 128 }; 129 130 ge_rops@d8050400 { 131 compatible = "wm,prizm-ge-rops"; 132 reg = <0xd8050400 0x100>; 133 }; 134 135 uart0: serial@d8200000 { 136 compatible = "via,vt8500-uart"; 137 reg = <0xd8200000 0x1040>; 138 interrupts = <32>; 139 clocks = <&clkuart0>; 140 status = "disabled"; 141 }; 142 143 uart1: serial@d82b0000 { 144 compatible = "via,vt8500-uart"; 145 reg = <0xd82b0000 0x1040>; 146 interrupts = <33>; 147 clocks = <&clkuart1>; 148 status = "disabled"; 149 }; 150 151 uart2: serial@d8210000 { 152 compatible = "via,vt8500-uart"; 153 reg = <0xd8210000 0x1040>; 154 interrupts = <47>; 155 clocks = <&clkuart2>; 156 status = "disabled"; 157 }; 158 159 uart3: serial@d82c0000 { 160 compatible = "via,vt8500-uart"; 161 reg = <0xd82c0000 0x1040>; 162 interrupts = <50>; 163 clocks = <&clkuart3>; 164 status = "disabled"; 165 }; 166 167 rtc@d8100000 { 168 compatible = "via,vt8500-rtc"; 169 reg = <0xd8100000 0x10000>; 170 interrupts = <48>; 171 }; 172 173 ethernet@d8004000 { 174 compatible = "via,vt8500-rhine"; 175 reg = <0xd8004000 0x100>; 176 interrupts = <10>; 177 }; 178 }; 179 };
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