zynq-zc702.dts

Version: - FREEBSD - FREEBSD-13-STABLE - FREEBSD-13-0 - FREEBSD-12-STABLE - FREEBSD-12-0 - FREEBSD-11-STABLE - FREEBSD-11-0 - FREEBSD-10-STABLE - FREEBSD-10-0 - FREEBSD-9-STABLE - FREEBSD-9-0 - FREEBSD-8-STABLE - FREEBSD-8-0 - FREEBSD-7-STABLE - FREEBSD-7-0 - FREEBSD-6-STABLE - FREEBSD-6-0 - FREEBSD-5-STABLE - FREEBSD-5-0 - FREEBSD-4-STABLE - FREEBSD-3-STABLE - FREEBSD22 - l41 - OPENBSD - linux-2.6 - MK84 - PLAN9 - xnu-8792
SearchContext: - none - 3 - 10
    1 // SPDX-License-Identifier: GPL-2.0
    2 /*
    3  *  Copyright (C) 2011 - 2014 Xilinx
    4  *  Copyright (C) 2012 National Instruments Corp.
    5  */
    6 /dts-v1/;
    7 #include "zynq-7000.dtsi"
    8 
    9 / {
   10         model = "Xilinx ZC702 board";
   11         compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000";
   12 
   13         aliases {
   14                 ethernet0 = &gem0;
   15                 i2c0 = &i2c0;
   16                 serial0 = &uart1;
   17                 mmc0 = &sdhci0;
   18         };
   19 
   20         memory@0 {
   21                 device_type = "memory";
   22                 reg = <0x0 0x40000000>;
   23         };
   24 
   25         chosen {
   26                 bootargs = "";
   27                 stdout-path = "serial0:115200n8";
   28         };
   29 
   30         gpio-keys {
   31                 compatible = "gpio-keys";
   32                 autorepeat;
   33                 switch-14 {
   34                         label = "sw14";
   35                         gpios = <&gpio0 12 0>;
   36                         linux,code = <108>; /* down */
   37                         wakeup-source;
   38                         autorepeat;
   39                 };
   40                 switch-13 {
   41                         label = "sw13";
   42                         gpios = <&gpio0 14 0>;
   43                         linux,code = <103>; /* up */
   44                         wakeup-source;
   45                         autorepeat;
   46                 };
   47         };
   48 
   49         leds {
   50                 compatible = "gpio-leds";
   51 
   52                 led-ds23 {
   53                         label = "ds23";
   54                         gpios = <&gpio0 10 0>;
   55                         linux,default-trigger = "heartbeat";
   56                 };
   57         };
   58 
   59         usb_phy0: phy0 {
   60                 compatible = "usb-nop-xceiv";
   61                 #phy-cells = <0>;
   62         };
   63 };
   64 
   65 &amba {
   66         ocm: sram@fffc0000 {
   67                 compatible = "mmio-sram";
   68                 reg = <0xfffc0000 0x10000>;
   69                 #address-cells = <1>;
   70                 #size-cells = <1>;
   71                 ranges = <0 0xfffc0000 0x10000>;
   72                 ocm-sram@0 {
   73                         reg = <0x0 0x10000>;
   74                 };
   75         };
   76 };
   77 
   78 &can0 {
   79         status = "okay";
   80         pinctrl-names = "default";
   81         pinctrl-0 = <&pinctrl_can0_default>;
   82 };
   83 
   84 &clkc {
   85         ps-clk-frequency = <33333333>;
   86 };
   87 
   88 &gem0 {
   89         status = "okay";
   90         phy-mode = "rgmii-id";
   91         phy-handle = <&ethernet_phy>;
   92         pinctrl-names = "default";
   93         pinctrl-0 = <&pinctrl_gem0_default>;
   94 
   95         ethernet_phy: ethernet-phy@7 {
   96                 reg = <7>;
   97                 device_type = "ethernet-phy";
   98         };
   99 };
  100 
  101 &gpio0 {
  102         pinctrl-names = "default";
  103         pinctrl-0 = <&pinctrl_gpio0_default>;
  104 };
  105 
  106 &i2c0 {
  107         status = "okay";
  108         clock-frequency = <400000>;
  109         pinctrl-names = "default";
  110         pinctrl-0 = <&pinctrl_i2c0_default>;
  111 
  112         i2c-mux@74 {
  113                 compatible = "nxp,pca9548";
  114                 #address-cells = <1>;
  115                 #size-cells = <0>;
  116                 reg = <0x74>;
  117 
  118                 i2c@0 {
  119                         #address-cells = <1>;
  120                         #size-cells = <0>;
  121                         reg = <0>;
  122                         si570: clock-generator@5d {
  123                                 #clock-cells = <0>;
  124                                 compatible = "silabs,si570";
  125                                 temperature-stability = <50>;
  126                                 reg = <0x5d>;
  127                                 factory-fout = <156250000>;
  128                                 clock-frequency = <148500000>;
  129                         };
  130                 };
  131 
  132                 i2c@1 {
  133                         #address-cells = <1>;
  134                         #size-cells = <0>;
  135                         reg = <1>;
  136                         adv7511: hdmi-tx@39 {
  137                                 compatible = "adi,adv7511";
  138                                 reg = <0x39>;
  139                                 adi,input-depth = <8>;
  140                                 adi,input-colorspace = "yuv422";
  141                                 adi,input-clock = "1x";
  142                                 adi,input-style = <3>;
  143                                 adi,input-justification = "right";
  144                         };
  145                 };
  146 
  147                 i2c@2 {
  148                         #address-cells = <1>;
  149                         #size-cells = <0>;
  150                         reg = <2>;
  151                         eeprom@54 {
  152                                 compatible = "atmel,24c08";
  153                                 reg = <0x54>;
  154                         };
  155                 };
  156 
  157                 i2c@3 {
  158                         #address-cells = <1>;
  159                         #size-cells = <0>;
  160                         reg = <3>;
  161                         gpio@21 {
  162                                 compatible = "ti,tca6416";
  163                                 reg = <0x21>;
  164                                 gpio-controller;
  165                                 #gpio-cells = <2>;
  166                         };
  167                 };
  168 
  169                 i2c@4 {
  170                         #address-cells = <1>;
  171                         #size-cells = <0>;
  172                         reg = <4>;
  173                         rtc@51 {
  174                                 compatible = "nxp,pcf8563";
  175                                 reg = <0x51>;
  176                         };
  177                 };
  178 
  179                 i2c@7 {
  180                         #address-cells = <1>;
  181                         #size-cells = <0>;
  182                         reg = <7>;
  183                         hwmon@34 {
  184                                 compatible = "ti,ucd9248";
  185                                 reg = <0x34>;
  186                         };
  187                         hwmon@35 {
  188                                 compatible = "ti,ucd9248";
  189                                 reg = <0x35>;
  190                         };
  191                         hwmon@36 {
  192                                 compatible = "ti,ucd9248";
  193                                 reg = <0x36>;
  194                         };
  195                 };
  196         };
  197 };
  198 
  199 &pinctrl0 {
  200         pinctrl_can0_default: can0-default {
  201                 mux {
  202                         function = "can0";
  203                         groups = "can0_9_grp";
  204                 };
  205 
  206                 conf {
  207                         groups = "can0_9_grp";
  208                         slew-rate = <0>;
  209                         io-standard = <1>;
  210                 };
  211 
  212                 conf-rx {
  213                         pins = "MIO46";
  214                         bias-high-impedance;
  215                 };
  216 
  217                 conf-tx {
  218                         pins = "MIO47";
  219                         bias-disable;
  220                 };
  221         };
  222 
  223         pinctrl_gem0_default: gem0-default {
  224                 mux {
  225                         function = "ethernet0";
  226                         groups = "ethernet0_0_grp";
  227                 };
  228 
  229                 conf {
  230                         groups = "ethernet0_0_grp";
  231                         slew-rate = <0>;
  232                         io-standard = <4>;
  233                 };
  234 
  235                 conf-rx {
  236                         pins = "MIO22", "MIO23", "MIO24", "MIO25", "MIO26", "MIO27";
  237                         bias-high-impedance;
  238                         low-power-disable;
  239                 };
  240 
  241                 conf-tx {
  242                         pins = "MIO16", "MIO17", "MIO18", "MIO19", "MIO20", "MIO21";
  243                         bias-disable;
  244                         low-power-enable;
  245                 };
  246 
  247                 mux-mdio {
  248                         function = "mdio0";
  249                         groups = "mdio0_0_grp";
  250                 };
  251 
  252                 conf-mdio {
  253                         groups = "mdio0_0_grp";
  254                         slew-rate = <0>;
  255                         io-standard = <1>;
  256                         bias-disable;
  257                 };
  258         };
  259 
  260         pinctrl_gpio0_default: gpio0-default {
  261                 mux {
  262                         function = "gpio0";
  263                         groups = "gpio0_7_grp", "gpio0_8_grp", "gpio0_9_grp",
  264                                  "gpio0_10_grp", "gpio0_11_grp", "gpio0_12_grp",
  265                                  "gpio0_13_grp", "gpio0_14_grp";
  266                 };
  267 
  268                 conf {
  269                         groups = "gpio0_7_grp", "gpio0_8_grp", "gpio0_9_grp",
  270                                  "gpio0_10_grp", "gpio0_11_grp", "gpio0_12_grp",
  271                                  "gpio0_13_grp", "gpio0_14_grp";
  272                         slew-rate = <0>;
  273                         io-standard = <1>;
  274                 };
  275 
  276                 conf-pull-up {
  277                         pins = "MIO9", "MIO10", "MIO11", "MIO12", "MIO13", "MIO14";
  278                         bias-pull-up;
  279                 };
  280 
  281                 conf-pull-none {
  282                         pins = "MIO7", "MIO8";
  283                         bias-disable;
  284                 };
  285         };
  286 
  287         pinctrl_i2c0_default: i2c0-default {
  288                 mux {
  289                         groups = "i2c0_10_grp";
  290                         function = "i2c0";
  291                 };
  292 
  293                 conf {
  294                         groups = "i2c0_10_grp";
  295                         bias-pull-up;
  296                         slew-rate = <0>;
  297                         io-standard = <1>;
  298                 };
  299         };
  300 
  301         pinctrl_sdhci0_default: sdhci0-default {
  302                 mux {
  303                         groups = "sdio0_2_grp";
  304                         function = "sdio0";
  305                 };
  306 
  307                 conf {
  308                         groups = "sdio0_2_grp";
  309                         slew-rate = <0>;
  310                         io-standard = <1>;
  311                         bias-disable;
  312                 };
  313 
  314                 mux-cd {
  315                         groups = "gpio0_0_grp";
  316                         function = "sdio0_cd";
  317                 };
  318 
  319                 conf-cd {
  320                         groups = "gpio0_0_grp";
  321                         bias-high-impedance;
  322                         bias-pull-up;
  323                         slew-rate = <0>;
  324                         io-standard = <1>;
  325                 };
  326 
  327                 mux-wp {
  328                         groups = "gpio0_15_grp";
  329                         function = "sdio0_wp";
  330                 };
  331 
  332                 conf-wp {
  333                         groups = "gpio0_15_grp";
  334                         bias-high-impedance;
  335                         bias-pull-up;
  336                         slew-rate = <0>;
  337                         io-standard = <1>;
  338                 };
  339         };
  340 
  341         pinctrl_uart1_default: uart1-default {
  342                 mux {
  343                         groups = "uart1_10_grp";
  344                         function = "uart1";
  345                 };
  346 
  347                 conf {
  348                         groups = "uart1_10_grp";
  349                         slew-rate = <0>;
  350                         io-standard = <1>;
  351                 };
  352 
  353                 conf-rx {
  354                         pins = "MIO49";
  355                         bias-high-impedance;
  356                 };
  357 
  358                 conf-tx {
  359                         pins = "MIO48";
  360                         bias-disable;
  361                 };
  362         };
  363 
  364         pinctrl_usb0_default: usb0-default {
  365                 mux {
  366                         groups = "usb0_0_grp";
  367                         function = "usb0";
  368                 };
  369 
  370                 conf {
  371                         groups = "usb0_0_grp";
  372                         slew-rate = <0>;
  373                         io-standard = <1>;
  374                 };
  375 
  376                 conf-rx {
  377                         pins = "MIO29", "MIO31", "MIO36";
  378                         bias-high-impedance;
  379                 };
  380 
  381                 conf-tx {
  382                         pins = "MIO28", "MIO30", "MIO32", "MIO33", "MIO34",
  383                                "MIO35", "MIO37", "MIO38", "MIO39";
  384                         bias-disable;
  385                 };
  386         };
  387 };
  388 
  389 &sdhci0 {
  390         status = "okay";
  391         pinctrl-names = "default";
  392         pinctrl-0 = <&pinctrl_sdhci0_default>;
  393 };
  394 
  395 &uart1 {
  396         status = "okay";
  397         pinctrl-names = "default";
  398         pinctrl-0 = <&pinctrl_uart1_default>;
  399 };
  400 
  401 &usb0 {
  402         status = "okay";
  403         dr_mode = "host";
  404         usb-phy = <&usb_phy0>;
  405         pinctrl-names = "default";
  406         pinctrl-0 = <&pinctrl_usb0_default>;
  407 };
Cache object: 5db55b15f88838cc9b05493411bb4391
[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]
This page is part of the FreeBSD/Linux Linux Kernel Cross-Reference, and was automatically generated using a modified version of the LXR engine.
FreeBSD/Linux Kernel Cross Reference sys/contrib/device-tree/src/arm/zynq-zc702.dts

FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/src/arm/zynq-zc702.dts
