1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3 * Copyright (c) 2016 Andreas Färber
4 *
5 * Copyright (c) 2016 BayLibre, SAS.
6 * Author: Neil Armstrong <narmstrong@baylibre.com>
7 *
8 * Copyright (c) 2016 Endless Computers, Inc.
9 * Author: Carlo Caione <carlo@endlessm.com>
10 */
11
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 #include <dt-bindings/power/meson-gxbb-power.h>
16 #include <dt-bindings/thermal/thermal.h>
17
18 / {
19 interrupt-parent = <&gic>;
20 #address-cells = <2>;
21 #size-cells = <2>;
22
23 aliases {
24 mmc0 = &sd_emmc_b; /* SD card */
25 mmc1 = &sd_emmc_c; /* eMMC */
26 mmc2 = &sd_emmc_a; /* SDIO */
27 };
28
29 reserved-memory {
30 #address-cells = <2>;
31 #size-cells = <2>;
32 ranges;
33
34 /* 16 MiB reserved for Hardware ROM Firmware */
35 hwrom_reserved: hwrom@0 {
36 reg = <0x0 0x0 0x0 0x1000000>;
37 no-map;
38 };
39
40 /* 2 MiB reserved for ARM Trusted Firmware (BL31) */
41 secmon_reserved: secmon@10000000 {
42 reg = <0x0 0x10000000 0x0 0x200000>;
43 no-map;
44 };
45
46 /* Alternate 3 MiB reserved for ARM Trusted Firmware (BL31) */
47 secmon_reserved_alt: secmon@5000000 {
48 reg = <0x0 0x05000000 0x0 0x300000>;
49 no-map;
50 };
51
52 /* 32 MiB reserved for ARM Trusted Firmware (BL32) */
53 secmon_reserved_bl32: secmon@5300000 {
54 reg = <0x0 0x05300000 0x0 0x2000000>;
55 no-map;
56 };
57
58 linux,cma {
59 compatible = "shared-dma-pool";
60 reusable;
61 size = <0x0 0x10000000>;
62 alignment = <0x0 0x400000>;
63 linux,cma-default;
64 };
65 };
66
67 chosen {
68 #address-cells = <2>;
69 #size-cells = <2>;
70 ranges;
71
72 simplefb_cvbs: framebuffer-cvbs {
73 compatible = "amlogic,simple-framebuffer",
74 "simple-framebuffer";
75 amlogic,pipeline = "vpu-cvbs";
76 power-domains = <&pwrc PWRC_GXBB_VPU_ID>;
77 status = "disabled";
78 };
79
80 simplefb_hdmi: framebuffer-hdmi {
81 compatible = "amlogic,simple-framebuffer",
82 "simple-framebuffer";
83 amlogic,pipeline = "vpu-hdmi";
84 power-domains = <&pwrc PWRC_GXBB_VPU_ID>;
85 status = "disabled";
86 };
87 };
88
89 cpus {
90 #address-cells = <0x2>;
91 #size-cells = <0x0>;
92
93 cpu0: cpu@0 {
94 device_type = "cpu";
95 compatible = "arm,cortex-a53";
96 reg = <0x0 0x0>;
97 enable-method = "psci";
98 next-level-cache = <&l2>;
99 clocks = <&scpi_dvfs 0>;
100 #cooling-cells = <2>;
101 };
102
103 cpu1: cpu@1 {
104 device_type = "cpu";
105 compatible = "arm,cortex-a53";
106 reg = <0x0 0x1>;
107 enable-method = "psci";
108 next-level-cache = <&l2>;
109 clocks = <&scpi_dvfs 0>;
110 #cooling-cells = <2>;
111 };
112
113 cpu2: cpu@2 {
114 device_type = "cpu";
115 compatible = "arm,cortex-a53";
116 reg = <0x0 0x2>;
117 enable-method = "psci";
118 next-level-cache = <&l2>;
119 clocks = <&scpi_dvfs 0>;
120 #cooling-cells = <2>;
121 };
122
123 cpu3: cpu@3 {
124 device_type = "cpu";
125 compatible = "arm,cortex-a53";
126 reg = <0x0 0x3>;
127 enable-method = "psci";
128 next-level-cache = <&l2>;
129 clocks = <&scpi_dvfs 0>;
130 #cooling-cells = <2>;
131 };
132
133 l2: l2-cache0 {
134 compatible = "cache";
135 };
136 };
137
138 thermal-zones {
139 cpu-thermal {
140 polling-delay-passive = <250>; /* milliseconds */
141 polling-delay = <1000>; /* milliseconds */
142
143 thermal-sensors = <&scpi_sensors 0>;
144
145 trips {
146 cpu_passive: cpu-passive {
147 temperature = <80000>; /* millicelsius */
148 hysteresis = <2000>; /* millicelsius */
149 type = "passive";
150 };
151
152 cpu_hot: cpu-hot {
153 temperature = <90000>; /* millicelsius */
154 hysteresis = <2000>; /* millicelsius */
155 type = "hot";
156 };
157
158 cpu_critical: cpu-critical {
159 temperature = <110000>; /* millicelsius */
160 hysteresis = <2000>; /* millicelsius */
161 type = "critical";
162 };
163 };
164
165 cpu_cooling_maps: cooling-maps {
166 map0 {
167 trip = <&cpu_passive>;
168 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
169 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
170 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
171 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
172 };
173
174 map1 {
175 trip = <&cpu_hot>;
176 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
177 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
178 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
179 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
180 };
181 };
182 };
183 };
184
185 arm-pmu {
186 compatible = "arm,cortex-a53-pmu";
187 interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
188 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
189 <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
190 <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
191 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
192 };
193
194 psci {
195 compatible = "arm,psci-0.2";
196 method = "smc";
197 };
198
199 timer {
200 compatible = "arm,armv8-timer";
201 interrupts = <GIC_PPI 13
202 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
203 <GIC_PPI 14
204 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
205 <GIC_PPI 11
206 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
207 <GIC_PPI 10
208 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>;
209 };
210
211 xtal: xtal-clk {
212 compatible = "fixed-clock";
213 clock-frequency = <24000000>;
214 clock-output-names = "xtal";
215 #clock-cells = <0>;
216 };
217
218 firmware {
219 sm: secure-monitor {
220 compatible = "amlogic,meson-gx-sm", "amlogic,meson-gxbb-sm";
221 };
222 };
223
224 efuse: efuse {
225 compatible = "amlogic,meson-gx-efuse", "amlogic,meson-gxbb-efuse";
226 #address-cells = <1>;
227 #size-cells = <1>;
228 read-only;
229 secure-monitor = <&sm>;
230
231 sn: sn@14 {
232 reg = <0x14 0x10>;
233 };
234
235 eth_mac: eth_mac@34 {
236 reg = <0x34 0x10>;
237 };
238
239 bid: bid@46 {
240 reg = <0x46 0x30>;
241 };
242 };
243
244 scpi {
245 compatible = "amlogic,meson-gxbb-scpi", "arm,scpi-pre-1.0";
246 mboxes = <&mailbox 1 &mailbox 2>;
247 shmem = <&cpu_scp_lpri &cpu_scp_hpri>;
248
249 scpi_clocks: clocks {
250 compatible = "arm,scpi-clocks";
251
252 scpi_dvfs: scpi_clocks@0 {
253 compatible = "arm,scpi-dvfs-clocks";
254 #clock-cells = <1>;
255 clock-indices = <0>;
256 clock-output-names = "vcpu";
257 };
258 };
259
260 scpi_sensors: sensors {
261 compatible = "amlogic,meson-gxbb-scpi-sensors", "arm,scpi-sensors";
262 #thermal-sensor-cells = <1>;
263 };
264 };
265
266 soc {
267 compatible = "simple-bus";
268 #address-cells = <2>;
269 #size-cells = <2>;
270 ranges;
271
272 cbus: bus@c1100000 {
273 compatible = "simple-bus";
274 reg = <0x0 0xc1100000 0x0 0x100000>;
275 #address-cells = <2>;
276 #size-cells = <2>;
277 ranges = <0x0 0x0 0x0 0xc1100000 0x0 0x100000>;
278
279 gpio_intc: interrupt-controller@9880 {
280 compatible = "amlogic,meson-gpio-intc";
281 reg = <0x0 0x9880 0x0 0x10>;
282 interrupt-controller;
283 #interrupt-cells = <2>;
284 amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>;
285 status = "disabled";
286 };
287
288 reset: reset-controller@4404 {
289 compatible = "amlogic,meson-gxbb-reset";
290 reg = <0x0 0x04404 0x0 0x9c>;
291 #reset-cells = <1>;
292 };
293
294 aiu: audio-controller@5400 {
295 compatible = "amlogic,aiu";
296 #sound-dai-cells = <2>;
297 sound-name-prefix = "AIU";
298 reg = <0x0 0x5400 0x0 0x2ac>;
299 interrupts = <GIC_SPI 48 IRQ_TYPE_EDGE_RISING>,
300 <GIC_SPI 50 IRQ_TYPE_EDGE_RISING>;
301 interrupt-names = "i2s", "spdif";
302 status = "disabled";
303 };
304
305 uart_A: serial@84c0 {
306 compatible = "amlogic,meson-gx-uart";
307 reg = <0x0 0x84c0 0x0 0x18>;
308 interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
309 status = "disabled";
310 fifo-size = <128>;
311 };
312
313 uart_B: serial@84dc {
314 compatible = "amlogic,meson-gx-uart";
315 reg = <0x0 0x84dc 0x0 0x18>;
316 interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
317 status = "disabled";
318 };
319
320 i2c_A: i2c@8500 {
321 compatible = "amlogic,meson-gxbb-i2c";
322 reg = <0x0 0x08500 0x0 0x20>;
323 interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>;
324 #address-cells = <1>;
325 #size-cells = <0>;
326 status = "disabled";
327 };
328
329 pwm_ab: pwm@8550 {
330 compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
331 reg = <0x0 0x08550 0x0 0x10>;
332 #pwm-cells = <3>;
333 status = "disabled";
334 };
335
336 pwm_cd: pwm@8650 {
337 compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
338 reg = <0x0 0x08650 0x0 0x10>;
339 #pwm-cells = <3>;
340 status = "disabled";
341 };
342
343 saradc: adc@8680 {
344 compatible = "amlogic,meson-saradc";
345 reg = <0x0 0x8680 0x0 0x34>;
346 #io-channel-cells = <1>;
347 interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>;
348 status = "disabled";
349 };
350
351 pwm_ef: pwm@86c0 {
352 compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
353 reg = <0x0 0x086c0 0x0 0x10>;
354 #pwm-cells = <3>;
355 status = "disabled";
356 };
357
358 uart_C: serial@8700 {
359 compatible = "amlogic,meson-gx-uart";
360 reg = <0x0 0x8700 0x0 0x18>;
361 interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;
362 status = "disabled";
363 };
364
365 clock-measure@8758 {
366 compatible = "amlogic,meson-gx-clk-measure";
367 reg = <0x0 0x8758 0x0 0x10>;
368 };
369
370 i2c_B: i2c@87c0 {
371 compatible = "amlogic,meson-gxbb-i2c";
372 reg = <0x0 0x087c0 0x0 0x20>;
373 interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>;
374 #address-cells = <1>;
375 #size-cells = <0>;
376 status = "disabled";
377 };
378
379 i2c_C: i2c@87e0 {
380 compatible = "amlogic,meson-gxbb-i2c";
381 reg = <0x0 0x087e0 0x0 0x20>;
382 interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>;
383 #address-cells = <1>;
384 #size-cells = <0>;
385 status = "disabled";
386 };
387
388 spicc: spi@8d80 {
389 compatible = "amlogic,meson-gx-spicc";
390 reg = <0x0 0x08d80 0x0 0x80>;
391 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
392 #address-cells = <1>;
393 #size-cells = <0>;
394 status = "disabled";
395 };
396
397 spifc: spi@8c80 {
398 compatible = "amlogic,meson-gxbb-spifc";
399 reg = <0x0 0x08c80 0x0 0x80>;
400 #address-cells = <1>;
401 #size-cells = <0>;
402 status = "disabled";
403 };
404
405 watchdog@98d0 {
406 compatible = "amlogic,meson-gxbb-wdt";
407 reg = <0x0 0x098d0 0x0 0x10>;
408 clocks = <&xtal>;
409 };
410 };
411
412 gic: interrupt-controller@c4301000 {
413 compatible = "arm,gic-400";
414 reg = <0x0 0xc4301000 0 0x1000>,
415 <0x0 0xc4302000 0 0x2000>,
416 <0x0 0xc4304000 0 0x2000>,
417 <0x0 0xc4306000 0 0x2000>;
418 interrupt-controller;
419 interrupts = <GIC_PPI 9
420 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
421 #interrupt-cells = <3>;
422 #address-cells = <0>;
423 };
424
425 sram: sram@c8000000 {
426 compatible = "mmio-sram";
427 reg = <0x0 0xc8000000 0x0 0x14000>;
428
429 #address-cells = <1>;
430 #size-cells = <1>;
431 ranges = <0 0x0 0xc8000000 0x14000>;
432
433 cpu_scp_lpri: scp-sram@0 {
434 compatible = "amlogic,meson-gxbb-scp-shmem";
435 reg = <0x13000 0x400>;
436 };
437
438 cpu_scp_hpri: scp-sram@200 {
439 compatible = "amlogic,meson-gxbb-scp-shmem";
440 reg = <0x13400 0x400>;
441 };
442 };
443
444 aobus: bus@c8100000 {
445 compatible = "simple-bus";
446 reg = <0x0 0xc8100000 0x0 0x100000>;
447 #address-cells = <2>;
448 #size-cells = <2>;
449 ranges = <0x0 0x0 0x0 0xc8100000 0x0 0x100000>;
450
451 sysctrl_AO: sys-ctrl@0 {
452 compatible = "amlogic,meson-gx-ao-sysctrl", "simple-mfd", "syscon";
453 reg = <0x0 0x0 0x0 0x100>;
454
455 clkc_AO: clock-controller {
456 compatible = "amlogic,meson-gx-aoclkc";
457 #clock-cells = <1>;
458 #reset-cells = <1>;
459 };
460 };
461
462 cec_AO: cec@100 {
463 compatible = "amlogic,meson-gx-ao-cec";
464 reg = <0x0 0x00100 0x0 0x14>;
465 interrupts = <GIC_SPI 199 IRQ_TYPE_EDGE_RISING>;
466 status = "disabled";
467 };
468
469 sec_AO: ao-secure@140 {
470 compatible = "amlogic,meson-gx-ao-secure", "syscon";
471 reg = <0x0 0x140 0x0 0x140>;
472 amlogic,has-chip-id;
473 };
474
475 uart_AO: serial@4c0 {
476 compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";
477 reg = <0x0 0x004c0 0x0 0x18>;
478 interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
479 status = "disabled";
480 };
481
482 uart_AO_B: serial@4e0 {
483 compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";
484 reg = <0x0 0x004e0 0x0 0x18>;
485 interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>;
486 status = "disabled";
487 };
488
489 i2c_AO: i2c@500 {
490 compatible = "amlogic,meson-gxbb-i2c";
491 reg = <0x0 0x500 0x0 0x20>;
492 interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>;
493 #address-cells = <1>;
494 #size-cells = <0>;
495 status = "disabled";
496 };
497
498 pwm_AO_ab: pwm@550 {
499 compatible = "amlogic,meson-gx-ao-pwm", "amlogic,meson-gxbb-ao-pwm";
500 reg = <0x0 0x00550 0x0 0x10>;
501 #pwm-cells = <3>;
502 status = "disabled";
503 };
504
505 ir: ir@580 {
506 compatible = "amlogic,meson-gx-ir", "amlogic,meson-gxbb-ir";
507 reg = <0x0 0x00580 0x0 0x40>;
508 interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>;
509 status = "disabled";
510 };
511 };
512
513 vdec: video-codec@c8820000 {
514 compatible = "amlogic,gx-vdec";
515 reg = <0x0 0xc8820000 0x0 0x10000>,
516 <0x0 0xc110a580 0x0 0xe4>;
517 reg-names = "dos", "esparser";
518
519 interrupts = <GIC_SPI 44 IRQ_TYPE_EDGE_RISING>,
520 <GIC_SPI 32 IRQ_TYPE_EDGE_RISING>;
521 interrupt-names = "vdec", "esparser";
522
523 amlogic,ao-sysctrl = <&sysctrl_AO>;
524 amlogic,canvas = <&canvas>;
525 };
526
527 periphs: bus@c8834000 {
528 compatible = "simple-bus";
529 reg = <0x0 0xc8834000 0x0 0x2000>;
530 #address-cells = <2>;
531 #size-cells = <2>;
532 ranges = <0x0 0x0 0x0 0xc8834000 0x0 0x2000>;
533
534 hwrng: rng {
535 compatible = "amlogic,meson-rng";
536 reg = <0x0 0x0 0x0 0x4>;
537 };
538 };
539
540 dmcbus: bus@c8838000 {
541 compatible = "simple-bus";
542 reg = <0x0 0xc8838000 0x0 0x400>;
543 #address-cells = <2>;
544 #size-cells = <2>;
545 ranges = <0x0 0x0 0x0 0xc8838000 0x0 0x400>;
546
547 canvas: video-lut@48 {
548 compatible = "amlogic,canvas";
549 reg = <0x0 0x48 0x0 0x14>;
550 };
551 };
552
553 hiubus: bus@c883c000 {
554 compatible = "simple-bus";
555 reg = <0x0 0xc883c000 0x0 0x2000>;
556 #address-cells = <2>;
557 #size-cells = <2>;
558 ranges = <0x0 0x0 0x0 0xc883c000 0x0 0x2000>;
559
560 sysctrl: system-controller@0 {
561 compatible = "amlogic,meson-gx-hhi-sysctrl", "simple-mfd", "syscon";
562 reg = <0 0 0 0x400>;
563
564 pwrc: power-controller {
565 compatible = "amlogic,meson-gxbb-pwrc";
566 #power-domain-cells = <1>;
567 amlogic,ao-sysctrl = <&sysctrl_AO>;
568 };
569 };
570
571 mailbox: mailbox@404 {
572 compatible = "amlogic,meson-gxbb-mhu";
573 reg = <0 0x404 0 0x4c>;
574 interrupts = <GIC_SPI 208 IRQ_TYPE_EDGE_RISING>,
575 <GIC_SPI 209 IRQ_TYPE_EDGE_RISING>,
576 <GIC_SPI 210 IRQ_TYPE_EDGE_RISING>;
577 #mbox-cells = <1>;
578 };
579 };
580
581 ethmac: ethernet@c9410000 {
582 compatible = "amlogic,meson-gxbb-dwmac",
583 "snps,dwmac-3.70a",
584 "snps,dwmac";
585 reg = <0x0 0xc9410000 0x0 0x10000>,
586 <0x0 0xc8834540 0x0 0x4>;
587 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
588 interrupt-names = "macirq";
589 rx-fifo-depth = <4096>;
590 tx-fifo-depth = <2048>;
591 power-domains = <&pwrc PWRC_GXBB_ETHERNET_MEM_ID>;
592 status = "disabled";
593 };
594
595 apb: apb@d0000000 {
596 compatible = "simple-bus";
597 reg = <0x0 0xd0000000 0x0 0x200000>;
598 #address-cells = <2>;
599 #size-cells = <2>;
600 ranges = <0x0 0x0 0x0 0xd0000000 0x0 0x200000>;
601
602 sd_emmc_a: mmc@70000 {
603 compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
604 reg = <0x0 0x70000 0x0 0x800>;
605 interrupts = <GIC_SPI 216 IRQ_TYPE_EDGE_RISING>;
606 status = "disabled";
607 };
608
609 sd_emmc_b: mmc@72000 {
610 compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
611 reg = <0x0 0x72000 0x0 0x800>;
612 interrupts = <GIC_SPI 217 IRQ_TYPE_EDGE_RISING>;
613 status = "disabled";
614 };
615
616 sd_emmc_c: mmc@74000 {
617 compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
618 reg = <0x0 0x74000 0x0 0x800>;
619 interrupts = <GIC_SPI 218 IRQ_TYPE_EDGE_RISING>;
620 status = "disabled";
621 };
622 };
623
624 vpu: vpu@d0100000 {
625 compatible = "amlogic,meson-gx-vpu";
626 reg = <0x0 0xd0100000 0x0 0x100000>,
627 <0x0 0xc883c000 0x0 0x1000>;
628 reg-names = "vpu", "hhi";
629 interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>;
630 #address-cells = <1>;
631 #size-cells = <0>;
632 amlogic,canvas = <&canvas>;
633
634 /* CVBS VDAC output port */
635 cvbs_vdac_port: port@0 {
636 reg = <0>;
637 };
638
639 /* HDMI-TX output port */
640 hdmi_tx_port: port@1 {
641 reg = <1>;
642
643 hdmi_tx_out: endpoint {
644 remote-endpoint = <&hdmi_tx_in>;
645 };
646 };
647 };
648
649 hdmi_tx: hdmi-tx@c883a000 {
650 compatible = "amlogic,meson-gx-dw-hdmi";
651 reg = <0x0 0xc883a000 0x0 0x1c>;
652 interrupts = <GIC_SPI 57 IRQ_TYPE_EDGE_RISING>;
653 #address-cells = <1>;
654 #size-cells = <0>;
655 #sound-dai-cells = <0>;
656 sound-name-prefix = "HDMITX";
657 status = "disabled";
658
659 /* VPU VENC Input */
660 hdmi_tx_venc_port: port@0 {
661 reg = <0>;
662
663 hdmi_tx_in: endpoint {
664 remote-endpoint = <&hdmi_tx_out>;
665 };
666 };
667
668 /* TMDS Output */
669 hdmi_tx_tmds_port: port@1 {
670 reg = <1>;
671 };
672 };
673 };
674 };
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