bcm6858.dtsi

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    1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
    2 /*
    3  * Copyright 2022 Broadcom Ltd.
    4  */
    5 
    6 #include <dt-bindings/interrupt-controller/irq.h>
    7 #include <dt-bindings/interrupt-controller/arm-gic.h>
    8 
    9 / {
   10         compatible = "brcm,bcm6858", "brcm,bcmbca";
   11         #address-cells = <2>;
   12         #size-cells = <2>;
   13 
   14         interrupt-parent = <&gic>;
   15 
   16         cpus {
   17                 #address-cells = <2>;
   18                 #size-cells = <0>;
   19 
   20                 B53_0: cpu@0 {
   21                         compatible = "brcm,brahma-b53";
   22                         device_type = "cpu";
   23                         reg = <0x0 0x0>;
   24                         next-level-cache = <&L2_0>;
   25                         enable-method = "psci";
   26                 };
   27 
   28                 B53_1: cpu@1 {
   29                         compatible = "brcm,brahma-b53";
   30                         device_type = "cpu";
   31                         reg = <0x0 0x1>;
   32                         next-level-cache = <&L2_0>;
   33                         enable-method = "psci";
   34                 };
   35 
   36                 B53_2: cpu@2 {
   37                         compatible = "brcm,brahma-b53";
   38                         device_type = "cpu";
   39                         reg = <0x0 0x2>;
   40                         next-level-cache = <&L2_0>;
   41                         enable-method = "psci";
   42                 };
   43 
   44                 B53_3: cpu@3 {
   45                         compatible = "brcm,brahma-b53";
   46                         device_type = "cpu";
   47                         reg = <0x0 0x3>;
   48                         next-level-cache = <&L2_0>;
   49                         enable-method = "psci";
   50                 };
   51                 L2_0: l2-cache0 {
   52                         compatible = "cache";
   53                 };
   54         };
   55 
   56         timer {
   57                 compatible = "arm,armv8-timer";
   58                 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
   59                         <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
   60                         <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
   61                         <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
   62         };
   63 
   64         pmu: pmu {
   65                 compatible = "arm,armv8-pmuv3";
   66                 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
   67                         <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
   68                         <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
   69                         <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
   70                 interrupt-affinity = <&B53_0>, <&B53_1>,
   71                         <&B53_2>, <&B53_3>;
   72         };
   73 
   74         clocks: clocks {
   75                 periph_clk:periph-clk {
   76                         compatible = "fixed-clock";
   77                         #clock-cells = <0>;
   78                         clock-frequency = <200000000>;
   79                 };
   80         };
   81 
   82         psci {
   83                 compatible = "arm,psci-0.2";
   84                 method = "smc";
   85         };
   86 
   87         axi@81000000 {
   88                 compatible = "simple-bus";
   89                 #address-cells = <1>;
   90                 #size-cells = <1>;
   91                 ranges = <0x0 0x0 0x81000000 0x8000>;
   92 
   93                 gic: interrupt-controller@1000 {
   94                         compatible = "arm,gic-400";
   95                         #interrupt-cells = <3>;
   96                         interrupt-controller;
   97                         reg = <0x1000 0x1000>, /* GICD */
   98                                 <0x2000 0x2000>, /* GICC */
   99                                 <0x4000 0x2000>, /* GICH */
  100                                 <0x6000 0x2000>; /* GICV */
  101                         interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
  102                                         IRQ_TYPE_LEVEL_HIGH)>;
  103                 };
  104         };
  105 
  106         bus@ff800000 {
  107                 compatible = "simple-bus";
  108                 #address-cells = <1>;
  109                 #size-cells = <1>;
  110                 ranges = <0x0 0x0 0xff800000 0x62000>;
  111 
  112                 uart0: serial@640 {
  113                         compatible = "brcm,bcm6345-uart";
  114                         reg = <0x640 0x18>;
  115                         interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
  116                         clocks = <&periph_clk>;
  117                         clock-names = "refclk";
  118                         status = "disabled";
  119                 };
  120         };
  121 };

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FreeBSD/Linux Kernel Cross Reference sys/contrib/device-tree/src/arm64/broadcom/bcmbca/bcm6858.dtsi

FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/src/arm64/broadcom/bcmbca/bcm6858.dtsi