exynos-pinctrl.h

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    1 /* SPDX-License-Identifier: GPL-2.0 */
    2 /*
    3  * Samsung Exynos DTS pinctrl constants
    4  *
    5  * Copyright (c) 2016 Samsung Electronics Co., Ltd.
    6  *              http://www.samsung.com
    7  * Copyright (c) 2022 Linaro Ltd
    8  * Author: Krzysztof Kozlowski <krzk@kernel.org>
    9  */
   10 
   11 #ifndef __DTS_ARM64_SAMSUNG_EXYNOS_PINCTRL_H__
   12 #define __DTS_ARM64_SAMSUNG_EXYNOS_PINCTRL_H__
   13 
   14 #define EXYNOS_PIN_PULL_NONE            0
   15 #define EXYNOS_PIN_PULL_DOWN            1
   16 #define EXYNOS_PIN_PULL_UP              3
   17 
   18 /* Pin function in power down mode */
   19 #define EXYNOS_PIN_PDN_OUT0             0
   20 #define EXYNOS_PIN_PDN_OUT1             1
   21 #define EXYNOS_PIN_PDN_INPUT            2
   22 #define EXYNOS_PIN_PDN_PREV             3
   23 
   24 /*
   25  * Drive strengths for Exynos5410, Exynos542x, Exynos5800, Exynos7885, Exynos850
   26  * (except GPIO_HSI block), ExynosAutov9 (FSI0, PERIC1)
   27  */
   28 #define EXYNOS5420_PIN_DRV_LV1          0
   29 #define EXYNOS5420_PIN_DRV_LV2          1
   30 #define EXYNOS5420_PIN_DRV_LV3          2
   31 #define EXYNOS5420_PIN_DRV_LV4          3
   32 
   33 /* Drive strengths for Exynos5433 */
   34 #define EXYNOS5433_PIN_DRV_FAST_SR1     0
   35 #define EXYNOS5433_PIN_DRV_FAST_SR2     1
   36 #define EXYNOS5433_PIN_DRV_FAST_SR3     2
   37 #define EXYNOS5433_PIN_DRV_FAST_SR4     3
   38 #define EXYNOS5433_PIN_DRV_FAST_SR5     4
   39 #define EXYNOS5433_PIN_DRV_FAST_SR6     5
   40 #define EXYNOS5433_PIN_DRV_SLOW_SR1     8
   41 #define EXYNOS5433_PIN_DRV_SLOW_SR2     9
   42 #define EXYNOS5433_PIN_DRV_SLOW_SR3     0xa
   43 #define EXYNOS5433_PIN_DRV_SLOW_SR4     0xb
   44 #define EXYNOS5433_PIN_DRV_SLOW_SR5     0xc
   45 #define EXYNOS5433_PIN_DRV_SLOW_SR6     0xf
   46 
   47 /* Drive strengths for Exynos7 (except FSYS1) */
   48 #define EXYNOS7_PIN_DRV_LV1             0
   49 #define EXYNOS7_PIN_DRV_LV2             2
   50 #define EXYNOS7_PIN_DRV_LV3             1
   51 #define EXYNOS7_PIN_DRV_LV4             3
   52 
   53 /* Drive strengths for Exynos7 FSYS1 block */
   54 #define EXYNOS7_FSYS1_PIN_DRV_LV1       0
   55 #define EXYNOS7_FSYS1_PIN_DRV_LV2       4
   56 #define EXYNOS7_FSYS1_PIN_DRV_LV3       2
   57 #define EXYNOS7_FSYS1_PIN_DRV_LV4       6
   58 #define EXYNOS7_FSYS1_PIN_DRV_LV5       1
   59 #define EXYNOS7_FSYS1_PIN_DRV_LV6       5
   60 
   61 /* Drive strengths for Exynos850 GPIO_HSI block */
   62 #define EXYNOS850_HSI_PIN_DRV_LV1       0       /* 1x   */
   63 #define EXYNOS850_HSI_PIN_DRV_LV1_5     1       /* 1.5x */
   64 #define EXYNOS850_HSI_PIN_DRV_LV2       2       /* 2x   */
   65 #define EXYNOS850_HSI_PIN_DRV_LV2_5     3       /* 2.5x */
   66 #define EXYNOS850_HSI_PIN_DRV_LV3       4       /* 3x   */
   67 #define EXYNOS850_HSI_PIN_DRV_LV4       5       /* 4x   */
   68 
   69 #define EXYNOS_PIN_FUNC_INPUT           0
   70 #define EXYNOS_PIN_FUNC_OUTPUT          1
   71 #define EXYNOS_PIN_FUNC_2               2
   72 #define EXYNOS_PIN_FUNC_3               3
   73 #define EXYNOS_PIN_FUNC_4               4
   74 #define EXYNOS_PIN_FUNC_5               5
   75 #define EXYNOS_PIN_FUNC_6               6
   76 #define EXYNOS_PIN_FUNC_EINT            0xf
   77 #define EXYNOS_PIN_FUNC_F               EXYNOS_PIN_FUNC_EINT
   78 
   79 #endif /* __DTS_ARM64_SAMSUNG_EXYNOS_PINCTRL_H__ */

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FreeBSD/Linux Kernel Cross Reference sys/contrib/device-tree/src/arm64/exynos/exynos-pinctrl.h

FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/src/arm64/exynos/exynos-pinctrl.h