1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3 * Device Tree file for NXP LS1028A RDB Board.
4 *
5 * Copyright 2018-2021 NXP
6 *
7 * Harninder Rai <harninder.rai@nxp.com>
8 *
9 */
10
11 /dts-v1/;
12 #include "fsl-ls1028a.dtsi"
13
14 / {
15 model = "LS1028A RDB Board";
16 compatible = "fsl,ls1028a-rdb", "fsl,ls1028a";
17
18 aliases {
19 crypto = &crypto;
20 serial0 = &duart0;
21 serial1 = &duart1;
22 mmc0 = &esdhc;
23 mmc1 = &esdhc1;
24 rtc1 = &ftm_alarm1;
25 spi0 = &fspi;
26 ethernet0 = &enetc_port0;
27 ethernet1 = &enetc_port2;
28 ethernet2 = &mscc_felix_port0;
29 ethernet3 = &mscc_felix_port1;
30 ethernet4 = &mscc_felix_port2;
31 ethernet5 = &mscc_felix_port3;
32 };
33
34 chosen {
35 stdout-path = "serial0:115200n8";
36 };
37
38 memory@80000000 {
39 device_type = "memory";
40 reg = <0x0 0x80000000 0x1 0x0000000>;
41 };
42
43 sys_mclk: clock-mclk {
44 compatible = "fixed-clock";
45 #clock-cells = <0>;
46 clock-frequency = <25000000>;
47 };
48
49 reg_1p8v: regulator-1p8v {
50 compatible = "regulator-fixed";
51 regulator-name = "1P8V";
52 regulator-min-microvolt = <1800000>;
53 regulator-max-microvolt = <1800000>;
54 regulator-always-on;
55 };
56
57 sb_3v3: regulator-sb3v3 {
58 compatible = "regulator-fixed";
59 regulator-name = "3v3_vbus";
60 regulator-min-microvolt = <3300000>;
61 regulator-max-microvolt = <3300000>;
62 regulator-boot-on;
63 regulator-always-on;
64 };
65
66 sound {
67 compatible = "simple-audio-card";
68 simple-audio-card,format = "i2s";
69 simple-audio-card,widgets =
70 "Microphone", "Microphone Jack",
71 "Headphone", "Headphone Jack",
72 "Speaker", "Speaker Ext",
73 "Line", "Line In Jack";
74 simple-audio-card,routing =
75 "MIC_IN", "Microphone Jack",
76 "Microphone Jack", "Mic Bias",
77 "LINE_IN", "Line In Jack",
78 "Headphone Jack", "HP_OUT",
79 "Speaker Ext", "LINE_OUT";
80
81 simple-audio-card,cpu {
82 sound-dai = <&sai4>;
83 frame-master;
84 bitclock-master;
85 };
86
87 simple-audio-card,codec {
88 sound-dai = <&sgtl5000>;
89 frame-master;
90 bitclock-master;
91 system-clock-frequency = <25000000>;
92 };
93 };
94 };
95
96 &can0 {
97 status = "okay";
98
99 can-transceiver {
100 max-bitrate = <5000000>;
101 };
102 };
103
104 &can1 {
105 status = "okay";
106
107 can-transceiver {
108 max-bitrate = <5000000>;
109 };
110 };
111
112 &duart0 {
113 status = "okay";
114 };
115
116 &duart1 {
117 status = "okay";
118 };
119
120 &enetc_mdio_pf3 {
121 sgmii_phy0: ethernet-phy@2 {
122 reg = <0x2>;
123 };
124
125 /* VSC8514 QSGMII quad PHY */
126 qsgmii_phy0: ethernet-phy@10 {
127 reg = <0x10>;
128 };
129
130 qsgmii_phy1: ethernet-phy@11 {
131 reg = <0x11>;
132 };
133
134 qsgmii_phy2: ethernet-phy@12 {
135 reg = <0x12>;
136 };
137
138 qsgmii_phy3: ethernet-phy@13 {
139 reg = <0x13>;
140 };
141 };
142
143 &enetc_port0 {
144 phy-handle = <&sgmii_phy0>;
145 phy-mode = "sgmii";
146 managed = "in-band-status";
147 status = "okay";
148 };
149
150 &enetc_port2 {
151 status = "okay";
152 };
153
154 &esdhc {
155 sd-uhs-sdr104;
156 sd-uhs-sdr50;
157 sd-uhs-sdr25;
158 sd-uhs-sdr12;
159 status = "okay";
160 };
161
162 &esdhc1 {
163 mmc-hs200-1_8v;
164 mmc-hs400-1_8v;
165 bus-width = <8>;
166 status = "okay";
167 };
168
169 &fspi {
170 status = "okay";
171
172 mt35xu02g0: flash@0 {
173 compatible = "jedec,spi-nor";
174 #address-cells = <1>;
175 #size-cells = <1>;
176 spi-max-frequency = <50000000>;
177 /* The following setting enables 1-1-8 (CMD-ADDR-DATA) mode */
178 spi-rx-bus-width = <8>; /* 8 SPI Rx lines */
179 spi-tx-bus-width = <1>; /* 1 SPI Tx line */
180 reg = <0>;
181 };
182 };
183
184 &ftm_alarm1 {
185 status = "okay";
186 };
187
188 &i2c0 {
189 status = "okay";
190
191 i2c-mux@77 {
192 compatible = "nxp,pca9847";
193 reg = <0x77>;
194 #address-cells = <1>;
195 #size-cells = <0>;
196
197 i2c@1 {
198 #address-cells = <1>;
199 #size-cells = <0>;
200 reg = <0x1>;
201
202 sgtl5000: audio-codec@a {
203 #sound-dai-cells = <0>;
204 compatible = "fsl,sgtl5000";
205 reg = <0xa>;
206 VDDA-supply = <®_1p8v>;
207 VDDIO-supply = <®_1p8v>;
208 clocks = <&sys_mclk>;
209 sclk-strength = <3>;
210 };
211 };
212
213 i2c@2 {
214 #address-cells = <1>;
215 #size-cells = <0>;
216 reg = <0x02>;
217
218 current-monitor@40 {
219 compatible = "ti,ina220";
220 reg = <0x40>;
221 shunt-resistor = <500>;
222 };
223 };
224
225 i2c@3 {
226 #address-cells = <1>;
227 #size-cells = <0>;
228 reg = <0x3>;
229
230 temperature-sensor@4c {
231 compatible = "nxp,sa56004";
232 reg = <0x4c>;
233 vcc-supply = <&sb_3v3>;
234 };
235
236 rtc@51 {
237 compatible = "nxp,pcf2129";
238 reg = <0x51>;
239 };
240 };
241 };
242 };
243
244 &mscc_felix {
245 status = "okay";
246 };
247
248 &mscc_felix_port0 {
249 label = "swp0";
250 managed = "in-band-status";
251 phy-handle = <&qsgmii_phy0>;
252 phy-mode = "qsgmii";
253 status = "okay";
254 };
255
256 &mscc_felix_port1 {
257 label = "swp1";
258 managed = "in-band-status";
259 phy-handle = <&qsgmii_phy1>;
260 phy-mode = "qsgmii";
261 status = "okay";
262 };
263
264 &mscc_felix_port2 {
265 label = "swp2";
266 managed = "in-band-status";
267 phy-handle = <&qsgmii_phy2>;
268 phy-mode = "qsgmii";
269 status = "okay";
270 };
271
272 &mscc_felix_port3 {
273 label = "swp3";
274 managed = "in-band-status";
275 phy-handle = <&qsgmii_phy3>;
276 phy-mode = "qsgmii";
277 status = "okay";
278 };
279
280 &mscc_felix_port4 {
281 ethernet = <&enetc_port2>;
282 status = "okay";
283 };
284
285 &optee {
286 status = "okay";
287 };
288
289 &pwm0 {
290 status = "okay";
291 };
292
293 &sai4 {
294 status = "okay";
295 };
296
297 &sata {
298 status = "okay";
299 };
300
301 &usb0 {
302 dr_mode = "host";
303 status = "okay";
304 };
305
306 &usb1 {
307 status = "okay";
308 };
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