The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/src/arm64/marvell/armada-3720-espressobin.dtsi

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    1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
    2 /*
    3  * Device Tree file for Globalscale Marvell ESPRESSOBin Board
    4  * Copyright (C) 2016 Marvell
    5  *
    6  * Romain Perier <romain.perier@free-electrons.com>
    7  *
    8  */
    9 
   10 #include <dt-bindings/gpio/gpio.h>
   11 #include "armada-372x.dtsi"
   12 
   13 / {
   14         aliases {
   15                 ethernet0 = &eth0;
   16                 /* for dsa slave device */
   17                 ethernet1 = &switch0port1;
   18                 ethernet2 = &switch0port2;
   19                 ethernet3 = &switch0port3;
   20         };
   21 
   22         chosen {
   23                 stdout-path = "serial0:115200n8";
   24         };
   25 
   26         memory@0 {
   27                 device_type = "memory";
   28                 reg = <0x00000000 0x00000000 0x00000000 0x20000000>;
   29         };
   30 
   31         vcc_sd_reg1: regulator {
   32                 compatible = "regulator-gpio";
   33                 regulator-name = "vcc_sd1";
   34                 regulator-min-microvolt = <1800000>;
   35                 regulator-max-microvolt = <3300000>;
   36                 regulator-boot-on;
   37 
   38                 gpios = <&gpionb 4 GPIO_ACTIVE_HIGH>;
   39                 gpios-states = <0>;
   40                 states = <1800000 0x1
   41                           3300000 0x0>;
   42                 enable-active-high;
   43         };
   44 
   45         led2: gpio-led2 {
   46                 /* led2 is working only on v7 board */
   47                 status = "disabled";
   48 
   49                 compatible = "gpio-leds";
   50 
   51                 led2 {
   52                         label = "led2";
   53                         gpios = <&gpionb 2 GPIO_ACTIVE_LOW>;
   54                         default-state = "off";
   55                 };
   56         };
   57 };
   58 
   59 /* J9 */
   60 &pcie0 {
   61         status = "okay";
   62         pinctrl-names = "default";
   63         pinctrl-0 = <&pcie_reset_pins &pcie_clkreq_pins>;
   64         reset-gpios = <&gpiosb 3 GPIO_ACTIVE_LOW>;
   65 };
   66 
   67 /* J6 */
   68 &sata {
   69         status = "okay";
   70 };
   71 
   72 /* U11 */
   73 &sdhci0 {
   74         /* Main DTS file for Espressobin is without eMMC */
   75         status = "disabled";
   76 
   77         non-removable;
   78         bus-width = <8>;
   79         mmc-ddr-1_8v;
   80         mmc-hs400-1_8v;
   81         marvell,xenon-emmc;
   82         marvell,xenon-tun-count = <9>;
   83         marvell,pad-type = "fixed-1-8v";
   84 
   85         pinctrl-names = "default";
   86         pinctrl-0 = <&mmc_pins>;
   87 
   88         #address-cells = <1>;
   89         #size-cells = <0>;
   90         mmccard: mmccard@0 {
   91                 compatible = "mmc-card";
   92                 reg = <0>;
   93         };
   94 };
   95 
   96 /* J1 */
   97 &sdhci1 {
   98         wp-inverted;
   99         bus-width = <4>;
  100         cd-gpios = <&gpionb 3 GPIO_ACTIVE_LOW>;
  101         marvell,pad-type = "sd";
  102         vqmmc-supply = <&vcc_sd_reg1>;
  103 
  104         pinctrl-names = "default";
  105         pinctrl-0 = <&sdio_pins>;
  106         status = "okay";
  107 };
  108 
  109 &spi0 {
  110         status = "okay";
  111 
  112         flash@0 {
  113                 reg = <0>;
  114                 compatible = "jedec,spi-nor";
  115                 spi-max-frequency = <104000000>;
  116                 m25p,fast-read;
  117         };
  118 };
  119 
  120 /* Exported on the micro USB connector J5 through an FTDI */
  121 &uart0 {
  122         pinctrl-names = "default";
  123         pinctrl-0 = <&uart1_pins>;
  124         status = "okay";
  125 };
  126 
  127 /*
  128  * Connector J17 and J18 expose a number of different features. Some pins are
  129  * multiplexed. This is the case for instance for the following features:
  130  * - UART1 (pin 24 = RX, pin 26 = TX). See armada-3720-db.dts for an example of
  131  *   how to enable it. Beware that the signals are 1.8V TTL.
  132  * - I2C
  133  * - SPI
  134  * - MMC
  135  */
  136 
  137 /* J7 */
  138 &usb3 {
  139         status = "okay";
  140 };
  141 
  142 /* J8 */
  143 &usb2 {
  144         status = "okay";
  145 };
  146 
  147 &mdio {
  148         switch0: switch0@1 {
  149                 compatible = "marvell,mv88e6085";
  150                 #address-cells = <1>;
  151                 #size-cells = <0>;
  152                 reg = <1>;
  153 
  154                 dsa,member = <0 0>;
  155 
  156                 ports {
  157                         #address-cells = <1>;
  158                         #size-cells = <0>;
  159 
  160                         switch0port0: port@0 {
  161                                 reg = <0>;
  162                                 label = "cpu";
  163                                 ethernet = <&eth0>;
  164                                 phy-mode = "rgmii-id";
  165                                 fixed-link {
  166                                         speed = <1000>;
  167                                         full-duplex;
  168                                 };
  169                         };
  170 
  171                         switch0port1: port@1 {
  172                                 reg = <1>;
  173                                 label = "wan";
  174                                 phy-handle = <&switch0phy0>;
  175                         };
  176 
  177                         switch0port2: port@2 {
  178                                 reg = <2>;
  179                                 label = "lan0";
  180                                 phy-handle = <&switch0phy1>;
  181                         };
  182 
  183                         switch0port3: port@3 {
  184                                 reg = <3>;
  185                                 label = "lan1";
  186                                 phy-handle = <&switch0phy2>;
  187                         };
  188 
  189                 };
  190 
  191                 mdio {
  192                         #address-cells = <1>;
  193                         #size-cells = <0>;
  194 
  195                         switch0phy0: switch0phy0@11 {
  196                                 reg = <0x11>;
  197                         };
  198                         switch0phy1: switch0phy1@12 {
  199                                 reg = <0x12>;
  200                         };
  201                         switch0phy2: switch0phy2@13 {
  202                                 reg = <0x13>;
  203                         };
  204                 };
  205         };
  206 };
  207 
  208 &eth0 {
  209         pinctrl-names = "default";
  210         pinctrl-0 = <&rgmii_pins>, <&smi_pins>;
  211         phy-mode = "rgmii-id";
  212         status = "okay";
  213 
  214         fixed-link {
  215                 speed = <1000>;
  216                 full-duplex;
  217         };
  218 };

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