1 /*
2 * Copyright (c) 2017 MediaTek Inc.
3 * Author: YT Shen <yt.shen@mediatek.com>
4 *
5 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 */
7
8 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include "mt2712e.dtsi"
11
12 / {
13 model = "MediaTek MT2712 evaluation board";
14 compatible = "mediatek,mt2712-evb", "mediatek,mt2712";
15
16 aliases {
17 serial0 = &uart0;
18 };
19
20 memory@40000000 {
21 device_type = "memory";
22 reg = <0 0x40000000 0 0x80000000>;
23 };
24
25 chosen {
26 stdout-path = "serial0:921600n8";
27 };
28
29 cpus_fixed_vproc0: fixedregulator@0 {
30 compatible = "regulator-fixed";
31 regulator-name = "vproc_buck0";
32 regulator-min-microvolt = <1000000>;
33 regulator-max-microvolt = <1000000>;
34 };
35
36 cpus_fixed_vproc1: fixedregulator@1 {
37 compatible = "regulator-fixed";
38 regulator-name = "vproc_buck1";
39 regulator-min-microvolt = <1000000>;
40 regulator-max-microvolt = <1000000>;
41 };
42
43 extcon_usb: extcon_iddig {
44 compatible = "linux,extcon-usb-gpio";
45 id-gpio = <&pio 12 GPIO_ACTIVE_HIGH>;
46 };
47
48 extcon_usb1: extcon_iddig1 {
49 compatible = "linux,extcon-usb-gpio";
50 id-gpio = <&pio 14 GPIO_ACTIVE_HIGH>;
51 };
52
53 usb_p0_vbus: regulator@2 {
54 compatible = "regulator-fixed";
55 regulator-name = "p0_vbus";
56 regulator-min-microvolt = <5000000>;
57 regulator-max-microvolt = <5000000>;
58 gpio = <&pio 13 GPIO_ACTIVE_HIGH>;
59 enable-active-high;
60 };
61
62 usb_p1_vbus: regulator@3 {
63 compatible = "regulator-fixed";
64 regulator-name = "p1_vbus";
65 regulator-min-microvolt = <5000000>;
66 regulator-max-microvolt = <5000000>;
67 gpio = <&pio 15 GPIO_ACTIVE_HIGH>;
68 enable-active-high;
69 };
70
71 usb_p2_vbus: regulator@4 {
72 compatible = "regulator-fixed";
73 regulator-name = "p2_vbus";
74 regulator-min-microvolt = <5000000>;
75 regulator-max-microvolt = <5000000>;
76 gpio = <&pio 16 GPIO_ACTIVE_HIGH>;
77 enable-active-high;
78 };
79
80 usb_p3_vbus: regulator@5 {
81 compatible = "regulator-fixed";
82 regulator-name = "p3_vbus";
83 regulator-min-microvolt = <5000000>;
84 regulator-max-microvolt = <5000000>;
85 gpio = <&pio 17 GPIO_ACTIVE_HIGH>;
86 enable-active-high;
87 regulator-always-on;
88 };
89
90 };
91
92 &auxadc {
93 status = "okay";
94 };
95
96 &cpu0 {
97 proc-supply = <&cpus_fixed_vproc0>;
98 };
99
100 &cpu1 {
101 proc-supply = <&cpus_fixed_vproc0>;
102 };
103
104 &cpu2 {
105 proc-supply = <&cpus_fixed_vproc1>;
106 };
107
108 ð {
109 phy-mode = "rgmii-rxid";
110 phy-handle = <ðernet_phy0>;
111 mediatek,tx-delay-ps = <1530>;
112 snps,reset-gpio = <&pio 87 GPIO_ACTIVE_LOW>;
113 snps,reset-delays-us = <0 10000 10000>;
114 pinctrl-names = "default", "sleep";
115 pinctrl-0 = <ð_default>;
116 pinctrl-1 = <ð_sleep>;
117 status = "okay";
118
119 mdio {
120 compatible = "snps,dwmac-mdio";
121 #address-cells = <1>;
122 #size-cells = <0>;
123 ethernet_phy0: ethernet-phy@5 {
124 compatible = "ethernet-phy-id0243.0d90";
125 reg = <0x5>;
126 };
127 };
128 };
129
130 &pio {
131 eth_default: eth_default {
132 tx_pins {
133 pinmux = <MT2712_PIN_71_GBE_TXD3__FUNC_GBE_TXD3>,
134 <MT2712_PIN_72_GBE_TXD2__FUNC_GBE_TXD2>,
135 <MT2712_PIN_73_GBE_TXD1__FUNC_GBE_TXD1>,
136 <MT2712_PIN_74_GBE_TXD0__FUNC_GBE_TXD0>,
137 <MT2712_PIN_75_GBE_TXC__FUNC_GBE_TXC>,
138 <MT2712_PIN_76_GBE_TXEN__FUNC_GBE_TXEN>;
139 drive-strength = <MTK_DRIVE_8mA>;
140 };
141 rx_pins {
142 pinmux = <MT2712_PIN_78_GBE_RXD3__FUNC_GBE_RXD3>,
143 <MT2712_PIN_79_GBE_RXD2__FUNC_GBE_RXD2>,
144 <MT2712_PIN_80_GBE_RXD1__FUNC_GBE_RXD1>,
145 <MT2712_PIN_81_GBE_RXD0__FUNC_GBE_RXD0>,
146 <MT2712_PIN_82_GBE_RXDV__FUNC_GBE_RXDV>,
147 <MT2712_PIN_84_GBE_RXC__FUNC_GBE_RXC>;
148 input-enable;
149 };
150 mdio_pins {
151 pinmux = <MT2712_PIN_85_GBE_MDC__FUNC_GBE_MDC>,
152 <MT2712_PIN_86_GBE_MDIO__FUNC_GBE_MDIO>;
153 drive-strength = <MTK_DRIVE_8mA>;
154 input-enable;
155 };
156 };
157
158 eth_sleep: eth_sleep {
159 tx_pins {
160 pinmux = <MT2712_PIN_71_GBE_TXD3__FUNC_GPIO71>,
161 <MT2712_PIN_72_GBE_TXD2__FUNC_GPIO72>,
162 <MT2712_PIN_73_GBE_TXD1__FUNC_GPIO73>,
163 <MT2712_PIN_74_GBE_TXD0__FUNC_GPIO74>,
164 <MT2712_PIN_75_GBE_TXC__FUNC_GPIO75>,
165 <MT2712_PIN_76_GBE_TXEN__FUNC_GPIO76>;
166 };
167 rx_pins {
168 pinmux = <MT2712_PIN_78_GBE_RXD3__FUNC_GPIO78>,
169 <MT2712_PIN_79_GBE_RXD2__FUNC_GPIO79>,
170 <MT2712_PIN_80_GBE_RXD1__FUNC_GPIO80>,
171 <MT2712_PIN_81_GBE_RXD0__FUNC_GPIO81>,
172 <MT2712_PIN_82_GBE_RXDV__FUNC_GPIO82>,
173 <MT2712_PIN_84_GBE_RXC__FUNC_GPIO84>;
174 input-disable;
175 };
176 mdio_pins {
177 pinmux = <MT2712_PIN_85_GBE_MDC__FUNC_GPIO85>,
178 <MT2712_PIN_86_GBE_MDIO__FUNC_GPIO86>;
179 input-disable;
180 bias-disable;
181 };
182 };
183
184 usb0_id_pins_float: usb0_iddig {
185 pins_iddig {
186 pinmux = <MT2712_PIN_12_IDDIG_P0__FUNC_IDDIG_A>;
187 bias-pull-up;
188 };
189 };
190
191 usb1_id_pins_float: usb1_iddig {
192 pins_iddig {
193 pinmux = <MT2712_PIN_14_IDDIG_P1__FUNC_IDDIG_B>;
194 bias-pull-up;
195 };
196 };
197 };
198
199 &ssusb {
200 vbus-supply = <&usb_p0_vbus>;
201 extcon = <&extcon_usb>;
202 dr_mode = "otg";
203 wakeup-source;
204 mediatek,u3p-dis-msk = <0x1>;
205 //enable-manual-drd;
206 //maximum-speed = "full-speed";
207 pinctrl-names = "default";
208 pinctrl-0 = <&usb0_id_pins_float>;
209 status = "okay";
210 };
211
212 &ssusb1 {
213 vbus-supply = <&usb_p1_vbus>;
214 extcon = <&extcon_usb1>;
215 dr_mode = "otg";
216 //mediatek,u3p-dis-msk = <0x1>;
217 enable-manual-drd;
218 wakeup-source;
219 //maximum-speed = "full-speed";
220 pinctrl-names = "default";
221 pinctrl-0 = <&usb1_id_pins_float>;
222 status = "okay";
223 };
224
225 &uart0 {
226 status = "okay";
227 };
228
229 &usb_host0 {
230 vbus-supply = <&usb_p2_vbus>;
231 status = "okay";
232 };
233
234 &usb_host1 {
235 status = "okay";
236 };
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