1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Device Tree Source for MediaTek X20 Development Board
4 *
5 * Copyright (C) 2018, Linaro Ltd.
6 *
7 */
8
9 /dts-v1/;
10
11 #include "mt6797.dtsi"
12
13 / {
14 model = "Mediatek X20 Development Board";
15 compatible = "archermind,mt6797-x20-dev", "mediatek,mt6797";
16
17 aliases {
18 serial0 = &uart1;
19 };
20
21 memory@40000000 {
22 device_type = "memory";
23 reg = <0 0x40000000 0 0x80000000>;
24 };
25
26 chosen {
27 stdout-path = "serial0:115200n8";
28 };
29 };
30
31 /* HDMI */
32 &i2c1 {
33 pinctrl-names = "default";
34 pinctrl-0 = <&i2c1_pins_a>;
35 status = "okay";
36 };
37
38 /* HS - I2C2 */
39 &i2c2 {
40 pinctrl-names = "default";
41 pinctrl-0 = <&i2c2_pins_a>;
42 status = "okay";
43 };
44
45 /* HS - I2C3 */
46 &i2c3 {
47 pinctrl-names = "default";
48 pinctrl-0 = <&i2c3_pins_a>;
49 status = "okay";
50 };
51
52 /* LS - I2C0 */
53 &i2c4 {
54 pinctrl-names = "default";
55 pinctrl-0 = <&i2c4_pins_a>;
56 status = "okay";
57 };
58
59 /* LS - I2C1 */
60 &i2c5 {
61 pinctrl-names = "default";
62 pinctrl-0 = <&i2c5_pins_a>;
63 status = "okay";
64 };
65
66 /* POWER_VPROC */
67 &i2c6 {
68 pinctrl-names = "default";
69 pinctrl-0 = <&i2c6_pins_a>;
70 status = "okay";
71 };
72
73 /* FAN53555 */
74 &i2c7 {
75 pinctrl-names = "default";
76 pinctrl-0 = <&i2c7_pins_a>;
77 status = "okay";
78 };
79
80 &uart1 {
81 status = "okay";
82 pinctrl-names = "default";
83 pinctrl-0 = <&uart1_pins_a>;
84 };
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