1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright (c) 2014 MediaTek Inc.
4 * Author: Eddie Huang <eddie.huang@mediatek.com>
5 */
6
7 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include "mt8173.dtsi"
10
11 / {
12 model = "MediaTek MT8173 evaluation board";
13 compatible = "mediatek,mt8173-evb", "mediatek,mt8173";
14
15 aliases {
16 serial0 = &uart0;
17 serial1 = &uart1;
18 serial2 = &uart2;
19 serial3 = &uart3;
20 };
21
22 memory@40000000 {
23 device_type = "memory";
24 reg = <0 0x40000000 0 0x80000000>;
25 };
26
27 chosen { };
28
29 connector {
30 compatible = "hdmi-connector";
31 label = "hdmi";
32 type = "d";
33
34 port {
35 hdmi_connector_in: endpoint {
36 remote-endpoint = <&hdmi0_out>;
37 };
38 };
39 };
40
41 extcon_usb: extcon_iddig {
42 compatible = "linux,extcon-usb-gpio";
43 id-gpio = <&pio 16 GPIO_ACTIVE_HIGH>;
44 };
45
46 usb_p1_vbus: regulator@0 {
47 compatible = "regulator-fixed";
48 regulator-name = "usb_vbus";
49 regulator-min-microvolt = <5000000>;
50 regulator-max-microvolt = <5000000>;
51 gpio = <&pio 130 GPIO_ACTIVE_HIGH>;
52 enable-active-high;
53 };
54
55 usb_p0_vbus: regulator@1 {
56 compatible = "regulator-fixed";
57 regulator-name = "vbus";
58 regulator-min-microvolt = <5000000>;
59 regulator-max-microvolt = <5000000>;
60 gpio = <&pio 9 GPIO_ACTIVE_HIGH>;
61 enable-active-high;
62 };
63 };
64
65 &mfg_async {
66 domain-supply = <&da9211_vgpu_reg>;
67 };
68
69 &cec {
70 status = "okay";
71 };
72
73 &cpu0 {
74 proc-supply = <&mt6397_vpca15_reg>;
75 };
76
77 &cpu1 {
78 proc-supply = <&mt6397_vpca15_reg>;
79 };
80
81 &cpu2 {
82 proc-supply = <&da9211_vcpu_reg>;
83 sram-supply = <&mt6397_vsramca7_reg>;
84 };
85
86 &cpu3 {
87 proc-supply = <&da9211_vcpu_reg>;
88 sram-supply = <&mt6397_vsramca7_reg>;
89 };
90
91 &dpi0 {
92 status = "okay";
93 };
94
95 &hdmi_phy {
96 status = "okay";
97 };
98
99 &hdmi0 {
100 status = "okay";
101
102 ports {
103 port@1 {
104 reg = <1>;
105
106 hdmi0_out: endpoint {
107 remote-endpoint = <&hdmi_connector_in>;
108 };
109 };
110 };
111 };
112
113 &i2c1 {
114 status = "okay";
115
116 buck: da9211@68 {
117 compatible = "dlg,da9211";
118 reg = <0x68>;
119
120 regulators {
121 da9211_vcpu_reg: BUCKA {
122 regulator-name = "VBUCKA";
123 regulator-min-microvolt = < 700000>;
124 regulator-max-microvolt = <1310000>;
125 regulator-min-microamp = <2000000>;
126 regulator-max-microamp = <4400000>;
127 regulator-ramp-delay = <10000>;
128 regulator-always-on;
129 };
130
131 da9211_vgpu_reg: BUCKB {
132 regulator-name = "VBUCKB";
133 regulator-min-microvolt = < 700000>;
134 regulator-max-microvolt = <1310000>;
135 regulator-min-microamp = <2000000>;
136 regulator-max-microamp = <3000000>;
137 regulator-ramp-delay = <10000>;
138 };
139 };
140 };
141 };
142
143 &mmc0 {
144 status = "okay";
145 pinctrl-names = "default", "state_uhs";
146 pinctrl-0 = <&mmc0_pins_default>;
147 pinctrl-1 = <&mmc0_pins_uhs>;
148 bus-width = <8>;
149 max-frequency = <50000000>;
150 cap-mmc-highspeed;
151 mediatek,hs200-cmd-int-delay = <26>;
152 mediatek,hs400-cmd-int-delay = <14>;
153 mediatek,hs400-cmd-resp-sel-rising;
154 vmmc-supply = <&mt6397_vemc_3v3_reg>;
155 vqmmc-supply = <&mt6397_vio18_reg>;
156 non-removable;
157 };
158
159 &mmc1 {
160 status = "okay";
161 pinctrl-names = "default", "state_uhs";
162 pinctrl-0 = <&mmc1_pins_default>;
163 pinctrl-1 = <&mmc1_pins_uhs>;
164 bus-width = <4>;
165 max-frequency = <50000000>;
166 cap-sd-highspeed;
167 sd-uhs-sdr25;
168 cd-gpios = <&pio 132 0>;
169 vmmc-supply = <&mt6397_vmch_reg>;
170 vqmmc-supply = <&mt6397_vmc_reg>;
171 };
172
173 &pio {
174 disp_pwm0_pins: disp_pwm0_pins {
175 pins1 {
176 pinmux = <MT8173_PIN_87_DISP_PWM0__FUNC_DISP_PWM0>;
177 output-low;
178 };
179 };
180
181 mmc0_pins_default: mmc0default {
182 pins_cmd_dat {
183 pinmux = <MT8173_PIN_57_MSDC0_DAT0__FUNC_MSDC0_DAT0>,
184 <MT8173_PIN_58_MSDC0_DAT1__FUNC_MSDC0_DAT1>,
185 <MT8173_PIN_59_MSDC0_DAT2__FUNC_MSDC0_DAT2>,
186 <MT8173_PIN_60_MSDC0_DAT3__FUNC_MSDC0_DAT3>,
187 <MT8173_PIN_61_MSDC0_DAT4__FUNC_MSDC0_DAT4>,
188 <MT8173_PIN_62_MSDC0_DAT5__FUNC_MSDC0_DAT5>,
189 <MT8173_PIN_63_MSDC0_DAT6__FUNC_MSDC0_DAT6>,
190 <MT8173_PIN_64_MSDC0_DAT7__FUNC_MSDC0_DAT7>,
191 <MT8173_PIN_66_MSDC0_CMD__FUNC_MSDC0_CMD>;
192 input-enable;
193 bias-pull-up;
194 };
195
196 pins_clk {
197 pinmux = <MT8173_PIN_65_MSDC0_CLK__FUNC_MSDC0_CLK>;
198 bias-pull-down;
199 };
200
201 pins_rst {
202 pinmux = <MT8173_PIN_68_MSDC0_RST___FUNC_MSDC0_RSTB>;
203 bias-pull-up;
204 };
205 };
206
207 mmc1_pins_default: mmc1default {
208 pins_cmd_dat {
209 pinmux = <MT8173_PIN_73_MSDC1_DAT0__FUNC_MSDC1_DAT0>,
210 <MT8173_PIN_74_MSDC1_DAT1__FUNC_MSDC1_DAT1>,
211 <MT8173_PIN_75_MSDC1_DAT2__FUNC_MSDC1_DAT2>,
212 <MT8173_PIN_76_MSDC1_DAT3__FUNC_MSDC1_DAT3>,
213 <MT8173_PIN_78_MSDC1_CMD__FUNC_MSDC1_CMD>;
214 input-enable;
215 drive-strength = <MTK_DRIVE_4mA>;
216 bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
217 };
218
219 pins_clk {
220 pinmux = <MT8173_PIN_77_MSDC1_CLK__FUNC_MSDC1_CLK>;
221 bias-pull-down;
222 drive-strength = <MTK_DRIVE_4mA>;
223 };
224
225 pins_insert {
226 pinmux = <MT8173_PIN_132_I2S0_DATA1__FUNC_GPIO132>;
227 bias-pull-up;
228 };
229 };
230
231 mmc0_pins_uhs: mmc0 {
232 pins_cmd_dat {
233 pinmux = <MT8173_PIN_57_MSDC0_DAT0__FUNC_MSDC0_DAT0>,
234 <MT8173_PIN_58_MSDC0_DAT1__FUNC_MSDC0_DAT1>,
235 <MT8173_PIN_59_MSDC0_DAT2__FUNC_MSDC0_DAT2>,
236 <MT8173_PIN_60_MSDC0_DAT3__FUNC_MSDC0_DAT3>,
237 <MT8173_PIN_61_MSDC0_DAT4__FUNC_MSDC0_DAT4>,
238 <MT8173_PIN_62_MSDC0_DAT5__FUNC_MSDC0_DAT5>,
239 <MT8173_PIN_63_MSDC0_DAT6__FUNC_MSDC0_DAT6>,
240 <MT8173_PIN_64_MSDC0_DAT7__FUNC_MSDC0_DAT7>,
241 <MT8173_PIN_66_MSDC0_CMD__FUNC_MSDC0_CMD>;
242 input-enable;
243 drive-strength = <MTK_DRIVE_2mA>;
244 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
245 };
246
247 pins_clk {
248 pinmux = <MT8173_PIN_65_MSDC0_CLK__FUNC_MSDC0_CLK>;
249 drive-strength = <MTK_DRIVE_2mA>;
250 bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
251 };
252
253 pins_rst {
254 pinmux = <MT8173_PIN_68_MSDC0_RST___FUNC_MSDC0_RSTB>;
255 bias-pull-up;
256 };
257 };
258
259 mmc1_pins_uhs: mmc1 {
260 pins_cmd_dat {
261 pinmux = <MT8173_PIN_73_MSDC1_DAT0__FUNC_MSDC1_DAT0>,
262 <MT8173_PIN_74_MSDC1_DAT1__FUNC_MSDC1_DAT1>,
263 <MT8173_PIN_75_MSDC1_DAT2__FUNC_MSDC1_DAT2>,
264 <MT8173_PIN_76_MSDC1_DAT3__FUNC_MSDC1_DAT3>,
265 <MT8173_PIN_78_MSDC1_CMD__FUNC_MSDC1_CMD>;
266 input-enable;
267 drive-strength = <MTK_DRIVE_4mA>;
268 bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
269 };
270
271 pins_clk {
272 pinmux = <MT8173_PIN_77_MSDC1_CLK__FUNC_MSDC1_CLK>;
273 drive-strength = <MTK_DRIVE_4mA>;
274 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
275 };
276 };
277
278 usb_id_pins_float: usb_iddig_pull_up {
279 pins_iddig {
280 pinmux = <MT8173_PIN_16_IDDIG__FUNC_IDDIG>;
281 bias-pull-up;
282 };
283 };
284
285 usb_id_pins_ground: usb_iddig_pull_down {
286 pins_iddig {
287 pinmux = <MT8173_PIN_16_IDDIG__FUNC_IDDIG>;
288 bias-pull-down;
289 };
290 };
291 };
292
293 &pwm0 {
294 pinctrl-names = "default";
295 pinctrl-0 = <&disp_pwm0_pins>;
296 status = "okay";
297 };
298
299 &pwrap {
300 /* Only MT8173 E1 needs USB power domain */
301 power-domains = <&spm MT8173_POWER_DOMAIN_USB>;
302
303 pmic: mt6397 {
304 compatible = "mediatek,mt6397";
305 interrupt-parent = <&pio>;
306 interrupts = <11 IRQ_TYPE_LEVEL_HIGH>;
307 interrupt-controller;
308 #interrupt-cells = <2>;
309
310 mt6397regulator: mt6397regulator {
311 compatible = "mediatek,mt6397-regulator";
312
313 mt6397_vpca15_reg: buck_vpca15 {
314 regulator-compatible = "buck_vpca15";
315 regulator-name = "vpca15";
316 regulator-min-microvolt = < 700000>;
317 regulator-max-microvolt = <1350000>;
318 regulator-ramp-delay = <12500>;
319 regulator-always-on;
320 };
321
322 mt6397_vpca7_reg: buck_vpca7 {
323 regulator-compatible = "buck_vpca7";
324 regulator-name = "vpca7";
325 regulator-min-microvolt = < 700000>;
326 regulator-max-microvolt = <1350000>;
327 regulator-ramp-delay = <12500>;
328 regulator-enable-ramp-delay = <115>;
329 };
330
331 mt6397_vsramca15_reg: buck_vsramca15 {
332 regulator-compatible = "buck_vsramca15";
333 regulator-name = "vsramca15";
334 regulator-min-microvolt = < 700000>;
335 regulator-max-microvolt = <1350000>;
336 regulator-ramp-delay = <12500>;
337 regulator-always-on;
338 };
339
340 mt6397_vsramca7_reg: buck_vsramca7 {
341 regulator-compatible = "buck_vsramca7";
342 regulator-name = "vsramca7";
343 regulator-min-microvolt = < 700000>;
344 regulator-max-microvolt = <1350000>;
345 regulator-ramp-delay = <12500>;
346 regulator-always-on;
347 };
348
349 mt6397_vcore_reg: buck_vcore {
350 regulator-compatible = "buck_vcore";
351 regulator-name = "vcore";
352 regulator-min-microvolt = < 700000>;
353 regulator-max-microvolt = <1350000>;
354 regulator-ramp-delay = <12500>;
355 regulator-always-on;
356 };
357
358 mt6397_vgpu_reg: buck_vgpu {
359 regulator-compatible = "buck_vgpu";
360 regulator-name = "vgpu";
361 regulator-min-microvolt = < 700000>;
362 regulator-max-microvolt = <1350000>;
363 regulator-ramp-delay = <12500>;
364 regulator-enable-ramp-delay = <115>;
365 };
366
367 mt6397_vdrm_reg: buck_vdrm {
368 regulator-compatible = "buck_vdrm";
369 regulator-name = "vdrm";
370 regulator-min-microvolt = <1200000>;
371 regulator-max-microvolt = <1400000>;
372 regulator-ramp-delay = <12500>;
373 regulator-always-on;
374 };
375
376 mt6397_vio18_reg: buck_vio18 {
377 regulator-compatible = "buck_vio18";
378 regulator-name = "vio18";
379 regulator-min-microvolt = <1620000>;
380 regulator-max-microvolt = <1980000>;
381 regulator-ramp-delay = <12500>;
382 regulator-always-on;
383 };
384
385 mt6397_vtcxo_reg: ldo_vtcxo {
386 regulator-compatible = "ldo_vtcxo";
387 regulator-name = "vtcxo";
388 regulator-always-on;
389 };
390
391 mt6397_va28_reg: ldo_va28 {
392 regulator-compatible = "ldo_va28";
393 regulator-name = "va28";
394 regulator-always-on;
395 };
396
397 mt6397_vcama_reg: ldo_vcama {
398 regulator-compatible = "ldo_vcama";
399 regulator-name = "vcama";
400 regulator-min-microvolt = <1500000>;
401 regulator-max-microvolt = <2800000>;
402 regulator-enable-ramp-delay = <218>;
403 };
404
405 mt6397_vio28_reg: ldo_vio28 {
406 regulator-compatible = "ldo_vio28";
407 regulator-name = "vio28";
408 regulator-always-on;
409 };
410
411 mt6397_vusb_reg: ldo_vusb {
412 regulator-compatible = "ldo_vusb";
413 regulator-name = "vusb";
414 };
415
416 mt6397_vmc_reg: ldo_vmc {
417 regulator-compatible = "ldo_vmc";
418 regulator-name = "vmc";
419 regulator-min-microvolt = <1800000>;
420 regulator-max-microvolt = <3300000>;
421 regulator-enable-ramp-delay = <218>;
422 };
423
424 mt6397_vmch_reg: ldo_vmch {
425 regulator-compatible = "ldo_vmch";
426 regulator-name = "vmch";
427 regulator-min-microvolt = <3000000>;
428 regulator-max-microvolt = <3300000>;
429 regulator-enable-ramp-delay = <218>;
430 };
431
432 mt6397_vemc_3v3_reg: ldo_vemc3v3 {
433 regulator-compatible = "ldo_vemc3v3";
434 regulator-name = "vemc_3v3";
435 regulator-min-microvolt = <3000000>;
436 regulator-max-microvolt = <3300000>;
437 regulator-enable-ramp-delay = <218>;
438 };
439
440 mt6397_vgp1_reg: ldo_vgp1 {
441 regulator-compatible = "ldo_vgp1";
442 regulator-name = "vcamd";
443 regulator-min-microvolt = <1220000>;
444 regulator-max-microvolt = <3300000>;
445 regulator-enable-ramp-delay = <240>;
446 };
447
448 mt6397_vgp2_reg: ldo_vgp2 {
449 regulator-compatible = "ldo_vgp2";
450 regulator-name = "vcamio";
451 regulator-min-microvolt = <1000000>;
452 regulator-max-microvolt = <3300000>;
453 regulator-enable-ramp-delay = <218>;
454 };
455
456 mt6397_vgp3_reg: ldo_vgp3 {
457 regulator-compatible = "ldo_vgp3";
458 regulator-name = "vcamaf";
459 regulator-min-microvolt = <1200000>;
460 regulator-max-microvolt = <3300000>;
461 regulator-enable-ramp-delay = <218>;
462 };
463
464 mt6397_vgp4_reg: ldo_vgp4 {
465 regulator-compatible = "ldo_vgp4";
466 regulator-name = "vgp4";
467 regulator-min-microvolt = <1200000>;
468 regulator-max-microvolt = <3300000>;
469 regulator-enable-ramp-delay = <218>;
470 };
471
472 mt6397_vgp5_reg: ldo_vgp5 {
473 regulator-compatible = "ldo_vgp5";
474 regulator-name = "vgp5";
475 regulator-min-microvolt = <1200000>;
476 regulator-max-microvolt = <3000000>;
477 regulator-enable-ramp-delay = <218>;
478 };
479
480 mt6397_vgp6_reg: ldo_vgp6 {
481 regulator-compatible = "ldo_vgp6";
482 regulator-name = "vgp6";
483 regulator-min-microvolt = <1200000>;
484 regulator-max-microvolt = <3300000>;
485 regulator-enable-ramp-delay = <218>;
486 };
487
488 mt6397_vibr_reg: ldo_vibr {
489 regulator-compatible = "ldo_vibr";
490 regulator-name = "vibr";
491 regulator-min-microvolt = <1300000>;
492 regulator-max-microvolt = <3300000>;
493 regulator-enable-ramp-delay = <218>;
494 };
495 };
496 };
497 };
498
499 &pio {
500 spi_pins_a: spi0 {
501 pins_spi {
502 pinmux = <MT8173_PIN_69_SPI_CK__FUNC_SPI_CK_0_>,
503 <MT8173_PIN_70_SPI_MI__FUNC_SPI_MI_0_>,
504 <MT8173_PIN_71_SPI_MO__FUNC_SPI_MO_0_>,
505 <MT8173_PIN_72_SPI_CS__FUNC_SPI_CS_0_>;
506 };
507 };
508 };
509
510 &spi {
511 pinctrl-names = "default";
512 pinctrl-0 = <&spi_pins_a>;
513 mediatek,pad-select = <0>;
514 status = "okay";
515 };
516
517 &ssusb {
518 vusb33-supply = <&mt6397_vusb_reg>;
519 vbus-supply = <&usb_p0_vbus>;
520 extcon = <&extcon_usb>;
521 dr_mode = "otg";
522 wakeup-source;
523 pinctrl-names = "default";
524 pinctrl-0 = <&usb_id_pins_float>;
525 status = "okay";
526 };
527
528 &uart0 {
529 status = "okay";
530 };
531
532 &usb_host {
533 vusb33-supply = <&mt6397_vusb_reg>;
534 vbus-supply = <&usb_p1_vbus>;
535 status = "okay";
536 };
Cache object: 633cd1876cd763fdad7b8cce4c261d18
|