mt8183-kukui.dtsi

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    1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
    2 /*
    3  * Copyright (c) 2018 MediaTek Inc.
    4  * Author: Ben Ho <ben.ho@mediatek.com>
    5  *         Erin Lo <erin.lo@mediatek.com>
    6  */
    7 
    8 #include <dt-bindings/gpio/gpio.h>
    9 #include <dt-bindings/input/input.h>
   10 #include "mt8183.dtsi"
   11 #include "mt6358.dtsi"
   12 
   13 / {
   14         aliases {
   15                 serial0 = &uart0;
   16                 mmc0 = &mmc0;
   17                 mmc1 = &mmc1;
   18         };
   19 
   20         chosen {
   21                 stdout-path = "serial0:115200n8";
   22         };
   23 
   24         backlight_lcd0: backlight_lcd0 {
   25                 compatible = "pwm-backlight";
   26                 pwms = <&pwm0 0 500000>;
   27                 power-supply = <&bl_pp5000>;
   28                 enable-gpios = <&pio 176 0>;
   29                 brightness-levels = <0 1023>;
   30                 num-interpolated-steps = <1023>;
   31                 default-brightness-level = <576>;
   32                 status = "okay";
   33         };
   34 
   35         memory@40000000 {
   36                 device_type = "memory";
   37                 reg = <0 0x40000000 0 0x80000000>;
   38         };
   39 
   40         clk32k: oscillator1 {
   41                 compatible = "fixed-clock";
   42                 #clock-cells = <0>;
   43                 clock-frequency = <32768>;
   44                 clock-output-names = "clk32k";
   45         };
   46 
   47         it6505_pp18_reg: regulator0 {
   48                 compatible = "regulator-fixed";
   49                 regulator-name = "it6505_pp18";
   50                 regulator-min-microvolt = <1800000>;
   51                 regulator-max-microvolt = <1800000>;
   52                 gpio = <&pio 178 0>;
   53                 enable-active-high;
   54         };
   55 
   56         lcd_pp3300: regulator1 {
   57                 compatible = "regulator-fixed";
   58                 regulator-name = "lcd_pp3300";
   59                 regulator-min-microvolt = <3300000>;
   60                 regulator-max-microvolt = <3300000>;
   61                 regulator-always-on;
   62                 regulator-boot-on;
   63         };
   64 
   65         bl_pp5000: regulator2 {
   66                 compatible = "regulator-fixed";
   67                 regulator-name = "bl_pp5000";
   68                 regulator-min-microvolt = <5000000>;
   69                 regulator-max-microvolt = <5000000>;
   70                 regulator-always-on;
   71                 regulator-boot-on;
   72         };
   73 
   74         mmc1_fixed_power: regulator3 {
   75                 compatible = "regulator-fixed";
   76                 regulator-name = "mmc1_power";
   77                 regulator-min-microvolt = <3300000>;
   78                 regulator-max-microvolt = <3300000>;
   79         };
   80 
   81         mmc1_fixed_io: regulator4 {
   82                 compatible = "regulator-fixed";
   83                 regulator-name = "mmc1_io";
   84                 regulator-min-microvolt = <1800000>;
   85                 regulator-max-microvolt = <1800000>;
   86         };
   87 
   88         pp1800_alw: regulator5 {
   89                 compatible = "regulator-fixed";
   90                 regulator-name = "pp1800_alw";
   91                 regulator-always-on;
   92                 regulator-boot-on;
   93                 regulator-min-microvolt = <1800000>;
   94                 regulator-max-microvolt = <1800000>;
   95         };
   96 
   97         pp3300_alw: regulator6 {
   98                 compatible = "regulator-fixed";
   99                 regulator-name = "pp3300_alw";
  100                 regulator-always-on;
  101                 regulator-boot-on;
  102                 regulator-min-microvolt = <3300000>;
  103                 regulator-max-microvolt = <3300000>;
  104         };
  105 
  106         reserved_memory: reserved-memory {
  107                 #address-cells = <2>;
  108                 #size-cells = <2>;
  109                 ranges;
  110 
  111                 scp_mem_reserved: scp_mem_region {
  112                         compatible = "shared-dma-pool";
  113                         reg = <0 0x50000000 0 0x2900000>;
  114                         no-map;
  115                 };
  116         };
  117 
  118         sound: mt8183-sound {
  119                 mediatek,platform = <&afe>;
  120                 pinctrl-names = "default",
  121                                 "aud_tdm_out_on",
  122                                 "aud_tdm_out_off";
  123                 pinctrl-0 = <&aud_pins_default>;
  124                 pinctrl-1 = <&aud_pins_tdm_out_on>;
  125                 pinctrl-2 = <&aud_pins_tdm_out_off>;
  126                 status = "okay";
  127         };
  128 
  129         btsco: bt-sco {
  130                 compatible = "linux,bt-sco";
  131         };
  132 
  133         wifi_pwrseq: wifi-pwrseq {
  134                 compatible = "mmc-pwrseq-simple";
  135                 pinctrl-names = "default";
  136                 pinctrl-0 = <&wifi_pins_pwrseq>;
  137 
  138                 /* Toggle WIFI_ENABLE to reset the chip. */
  139                 reset-gpios = <&pio 119 1>;
  140         };
  141 
  142         wifi_wakeup: wifi-wakeup {
  143                 compatible = "gpio-keys";
  144                 pinctrl-names = "default";
  145                 pinctrl-0 = <&wifi_pins_wakeup>;
  146 
  147                 button-wowlan {
  148                         label = "Wake on WiFi";
  149                         gpios = <&pio 113 GPIO_ACTIVE_HIGH>;
  150                         linux,code = <KEY_WAKEUP>;
  151                         wakeup-source;
  152                 };
  153         };
  154 
  155         tboard_thermistor1: thermal-sensor1 {
  156                 compatible = "generic-adc-thermal";
  157                 #thermal-sensor-cells = <0>;
  158                 io-channels = <&auxadc 0>;
  159                 io-channel-names = "sensor-channel";
  160                 temperature-lookup-table = <    (-5000) 1553
  161                                                 0 1488
  162                                                 5000 1412
  163                                                 10000 1326
  164                                                 15000 1232
  165                                                 20000 1132
  166                                                 25000 1029
  167                                                 30000 925
  168                                                 35000 823
  169                                                 40000 726
  170                                                 45000 635
  171                                                 50000 552
  172                                                 55000 478
  173                                                 60000 411
  174                                                 65000 353
  175                                                 70000 303
  176                                                 75000 260
  177                                                 80000 222
  178                                                 85000 190
  179                                                 90000 163
  180                                                 95000 140
  181                                                 100000 121
  182                                                 105000 104
  183                                                 110000 90
  184                                                 115000 78
  185                                                 120000 67
  186                                                 125000 59>;
  187         };
  188 
  189         tboard_thermistor2: thermal-sensor2 {
  190                 compatible = "generic-adc-thermal";
  191                 #thermal-sensor-cells = <0>;
  192                 io-channels = <&auxadc 1>;
  193                 io-channel-names = "sensor-channel";
  194                 temperature-lookup-table = <    (-5000) 1553
  195                                                 0 1488
  196                                                 5000 1412
  197                                                 10000 1326
  198                                                 15000 1232
  199                                                 20000 1132
  200                                                 25000 1029
  201                                                 30000 925
  202                                                 35000 823
  203                                                 40000 726
  204                                                 45000 635
  205                                                 50000 552
  206                                                 55000 478
  207                                                 60000 411
  208                                                 65000 353
  209                                                 70000 303
  210                                                 75000 260
  211                                                 80000 222
  212                                                 85000 190
  213                                                 90000 163
  214                                                 95000 140
  215                                                 100000 121
  216                                                 105000 104
  217                                                 110000 90
  218                                                 115000 78
  219                                                 120000 67
  220                                                 125000 59>;
  221         };
  222 };
  223 
  224 &afe {
  225         i2s3-share = "I2S2";
  226         i2s0-share = "I2S5";
  227 };
  228 
  229 &auxadc {
  230         status = "okay";
  231 };
  232 
  233 &cci {
  234         proc-supply = <&mt6358_vproc12_reg>;
  235 };
  236 
  237 &cpu0 {
  238         proc-supply = <&mt6358_vproc12_reg>;
  239 };
  240 
  241 &cpu1 {
  242         proc-supply = <&mt6358_vproc12_reg>;
  243 };
  244 
  245 &cpu2 {
  246         proc-supply = <&mt6358_vproc12_reg>;
  247 };
  248 
  249 &cpu3 {
  250         proc-supply = <&mt6358_vproc12_reg>;
  251 };
  252 
  253 &cpu4 {
  254         proc-supply = <&mt6358_vproc11_reg>;
  255 };
  256 
  257 &cpu5 {
  258         proc-supply = <&mt6358_vproc11_reg>;
  259 };
  260 
  261 &cpu6 {
  262         proc-supply = <&mt6358_vproc11_reg>;
  263 };
  264 
  265 &cpu7 {
  266         proc-supply = <&mt6358_vproc11_reg>;
  267 };
  268 
  269 &dsi0 {
  270         status = "okay";
  271         #address-cells = <1>;
  272         #size-cells = <0>;
  273         panel: panel@0 {
  274                 /* compatible will be set in board dts */
  275                 reg = <0>;
  276                 enable-gpios = <&pio 45 0>;
  277                 pinctrl-names = "default";
  278                 pinctrl-0 = <&panel_pins_default>;
  279                 avdd-supply = <&ppvarn_lcd>;
  280                 avee-supply = <&ppvarp_lcd>;
  281                 pp1800-supply = <&pp1800_lcd>;
  282                 backlight = <&backlight_lcd0>;
  283                 rotation = <270>;
  284                 port {
  285                         panel_in: endpoint {
  286                                 remote-endpoint = <&dsi_out>;
  287                         };
  288                 };
  289         };
  290 
  291         ports {
  292                 port {
  293                         dsi_out: endpoint {
  294                                 remote-endpoint = <&panel_in>;
  295                         };
  296                 };
  297         };
  298 };
  299 
  300 &gpu {
  301         mali-supply = <&mt6358_vgpu_reg>;
  302         sram-supply = <&mt6358_vsram_gpu_reg>;
  303 };
  304 
  305 &i2c0 {
  306         pinctrl-names = "default";
  307         pinctrl-0 = <&i2c0_pins>;
  308         status = "okay";
  309         clock-frequency = <400000>;
  310         #address-cells = <1>;
  311         #size-cells = <0>;
  312 };
  313 
  314 &i2c1 {
  315         pinctrl-names = "default";
  316         pinctrl-0 = <&i2c1_pins>;
  317         status = "okay";
  318         clock-frequency = <100000>;
  319 };
  320 
  321 &i2c3 {
  322         pinctrl-names = "default";
  323         pinctrl-0 = <&i2c3_pins>;
  324         status = "okay";
  325         clock-frequency = <100000>;
  326         #address-cells = <1>;
  327         #size-cells = <0>;
  328 };
  329 
  330 &i2c5 {
  331         pinctrl-names = "default";
  332         pinctrl-0 = <&i2c5_pins>;
  333         status = "okay";
  334         clock-frequency = <100000>;
  335         #address-cells = <1>;
  336         #size-cells = <0>;
  337 };
  338 
  339 &i2c6 {
  340         pinctrl-names = "default";
  341         pinctrl-0 = <&i2c6_pins>;
  342         status = "okay";
  343         clock-frequency = <100000>;
  344 };
  345 
  346 &mipi_tx0 {
  347         status = "okay";
  348 };
  349 
  350 &mmc0 {
  351         status = "okay";
  352         pinctrl-names = "default", "state_uhs";
  353         pinctrl-0 = <&mmc0_pins_default>;
  354         pinctrl-1 = <&mmc0_pins_uhs>;
  355         bus-width = <8>;
  356         max-frequency = <200000000>;
  357         cap-mmc-highspeed;
  358         mmc-hs200-1_8v;
  359         mmc-hs400-1_8v;
  360         cap-mmc-hw-reset;
  361         no-sdio;
  362         no-sd;
  363         hs400-ds-delay = <0x12814>;
  364         vmmc-supply = <&mt6358_vemc_reg>;
  365         vqmmc-supply = <&mt6358_vio18_reg>;
  366         assigned-clocks = <&topckgen CLK_TOP_MUX_MSDC50_0>;
  367         assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_CK>;
  368         non-removable;
  369 };
  370 
  371 &mmc1 {
  372         status = "okay";
  373         pinctrl-names = "default", "state_uhs";
  374         pinctrl-0 = <&mmc1_pins_default>;
  375         pinctrl-1 = <&mmc1_pins_uhs>;
  376         vmmc-supply = <&mmc1_fixed_power>;
  377         vqmmc-supply = <&mmc1_fixed_io>;
  378         mmc-pwrseq = <&wifi_pwrseq>;
  379         bus-width = <4>;
  380         max-frequency = <200000000>;
  381         drv-type = <2>;
  382         cap-sd-highspeed;
  383         sd-uhs-sdr50;
  384         sd-uhs-sdr104;
  385         keep-power-in-suspend;
  386         wakeup-source;
  387         cap-sdio-irq;
  388         non-removable;
  389         no-mmc;
  390         no-sd;
  391         assigned-clocks = <&topckgen CLK_TOP_MUX_MSDC30_1>;
  392         assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_D2>;
  393         #address-cells = <1>;
  394         #size-cells = <0>;
  395 
  396         qca_wifi: qca-wifi@1 {
  397                 compatible = "qcom,ath10k";
  398                 reg = <1>;
  399         };
  400 };
  401 
  402 &mt6358_vdram2_reg {
  403         regulator-always-on;
  404 };
  405 
  406 &mt6358codec {
  407         Avdd-supply = <&mt6358_vaud28_reg>;
  408 };
  409 
  410 &mt6358_vsim1_reg {
  411         regulator-min-microvolt = <2700000>;
  412         regulator-max-microvolt = <2700000>;
  413 };
  414 
  415 &mt6358_vsim2_reg {
  416         regulator-min-microvolt = <2700000>;
  417         regulator-max-microvolt = <2700000>;
  418 };
  419 
  420 &pio {
  421         aud_pins_default: audiopins {
  422                 pins_bus {
  423                         pinmux = <PINMUX_GPIO97__FUNC_I2S2_MCK>,
  424                                 <PINMUX_GPIO98__FUNC_I2S2_BCK>,
  425                                 <PINMUX_GPIO101__FUNC_I2S2_LRCK>,
  426                                 <PINMUX_GPIO102__FUNC_I2S2_DI>,
  427                                 <PINMUX_GPIO3__FUNC_I2S3_DO>, /*i2s to da7219/max98357*/
  428                                 <PINMUX_GPIO89__FUNC_I2S5_BCK>,
  429                                 <PINMUX_GPIO90__FUNC_I2S5_LRCK>,
  430                                 <PINMUX_GPIO91__FUNC_I2S5_DO>,
  431                                 <PINMUX_GPIO174__FUNC_I2S0_DI>, /*i2s to wifi/bt*/
  432                                 <PINMUX_GPIO136__FUNC_AUD_CLK_MOSI>,
  433                                 <PINMUX_GPIO137__FUNC_AUD_SYNC_MOSI>,
  434                                 <PINMUX_GPIO138__FUNC_AUD_DAT_MOSI0>,
  435                                 <PINMUX_GPIO139__FUNC_AUD_DAT_MOSI1>,
  436                                 <PINMUX_GPIO140__FUNC_AUD_CLK_MISO>,
  437                                 <PINMUX_GPIO141__FUNC_AUD_SYNC_MISO>,
  438                                 <PINMUX_GPIO142__FUNC_AUD_DAT_MISO0>,
  439                                 <PINMUX_GPIO143__FUNC_AUD_DAT_MISO1>; /*mtkaif3.0*/
  440                 };
  441         };
  442 
  443         aud_pins_tdm_out_on: audiotdmouton {
  444                 pins_bus {
  445                         pinmux = <PINMUX_GPIO169__FUNC_TDM_BCK_2ND>,
  446                                 <PINMUX_GPIO170__FUNC_TDM_LRCK_2ND>,
  447                                 <PINMUX_GPIO171__FUNC_TDM_DATA0_2ND>,
  448                                 <PINMUX_GPIO172__FUNC_TDM_DATA1_2ND>,
  449                                 <PINMUX_GPIO173__FUNC_TDM_DATA2_2ND>,
  450                                 <PINMUX_GPIO10__FUNC_TDM_DATA3>; /*8ch-i2s to it6505*/
  451                         drive-strength = <MTK_DRIVE_6mA>;
  452                 };
  453         };
  454 
  455         aud_pins_tdm_out_off: audiotdmoutoff {
  456                 pins_bus {
  457                         pinmux = <PINMUX_GPIO169__FUNC_GPIO169>,
  458                                 <PINMUX_GPIO170__FUNC_GPIO170>,
  459                                 <PINMUX_GPIO171__FUNC_GPIO171>,
  460                                 <PINMUX_GPIO172__FUNC_GPIO172>,
  461                                 <PINMUX_GPIO173__FUNC_GPIO173>,
  462                                 <PINMUX_GPIO10__FUNC_GPIO10>;
  463                         input-enable;
  464                         bias-pull-down;
  465                         drive-strength = <MTK_DRIVE_2mA>;
  466                 };
  467         };
  468 
  469         bt_pins: bt-pins {
  470                 pins_bt_en {
  471                         pinmux = <PINMUX_GPIO120__FUNC_GPIO120>;
  472                         output-low;
  473                 };
  474         };
  475 
  476         ec_ap_int_odl: ec_ap_int_odl {
  477                 pins1 {
  478                         pinmux = <PINMUX_GPIO151__FUNC_GPIO151>;
  479                         input-enable;
  480                         bias-pull-up;
  481                 };
  482         };
  483 
  484         h1_int_od_l: h1_int_od_l {
  485                 pins1 {
  486                         pinmux = <PINMUX_GPIO153__FUNC_GPIO153>;
  487                         input-enable;
  488                 };
  489         };
  490 
  491         i2c0_pins: i2c0 {
  492                 pins_bus {
  493                         pinmux = <PINMUX_GPIO82__FUNC_SDA0>,
  494                                  <PINMUX_GPIO83__FUNC_SCL0>;
  495                         mediatek,pull-up-adv = <3>;
  496                         mediatek,drive-strength-adv = <00>;
  497                 };
  498         };
  499 
  500         i2c1_pins: i2c1 {
  501                 pins_bus {
  502                         pinmux = <PINMUX_GPIO81__FUNC_SDA1>,
  503                                  <PINMUX_GPIO84__FUNC_SCL1>;
  504                         mediatek,pull-up-adv = <3>;
  505                         mediatek,drive-strength-adv = <00>;
  506                 };
  507         };
  508 
  509         i2c2_pins: i2c2 {
  510                 pins_bus {
  511                         pinmux = <PINMUX_GPIO103__FUNC_SCL2>,
  512                                  <PINMUX_GPIO104__FUNC_SDA2>;
  513                         bias-disable;
  514                         mediatek,drive-strength-adv = <00>;
  515                 };
  516         };
  517 
  518         i2c3_pins: i2c3 {
  519                 pins_bus {
  520                         pinmux = <PINMUX_GPIO50__FUNC_SCL3>,
  521                                  <PINMUX_GPIO51__FUNC_SDA3>;
  522                         mediatek,pull-up-adv = <3>;
  523                         mediatek,drive-strength-adv = <00>;
  524                 };
  525         };
  526 
  527         i2c4_pins: i2c4 {
  528                 pins_bus {
  529                         pinmux = <PINMUX_GPIO105__FUNC_SCL4>,
  530                                  <PINMUX_GPIO106__FUNC_SDA4>;
  531                         bias-disable;
  532                         mediatek,drive-strength-adv = <00>;
  533                 };
  534         };
  535 
  536         i2c5_pins: i2c5 {
  537                 pins_bus {
  538                         pinmux = <PINMUX_GPIO48__FUNC_SCL5>,
  539                                  <PINMUX_GPIO49__FUNC_SDA5>;
  540                         mediatek,pull-up-adv = <3>;
  541                         mediatek,drive-strength-adv = <00>;
  542                 };
  543         };
  544 
  545         i2c6_pins: i2c6 {
  546                 pins_bus {
  547                         pinmux = <PINMUX_GPIO11__FUNC_SCL6>,
  548                                  <PINMUX_GPIO12__FUNC_SDA6>;
  549                         bias-disable;
  550                 };
  551         };
  552 
  553         mmc0_pins_default: mmc0-pins-default {
  554                 pins_cmd_dat {
  555                         pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>,
  556                                  <PINMUX_GPIO128__FUNC_MSDC0_DAT1>,
  557                                  <PINMUX_GPIO125__FUNC_MSDC0_DAT2>,
  558                                  <PINMUX_GPIO132__FUNC_MSDC0_DAT3>,
  559                                  <PINMUX_GPIO126__FUNC_MSDC0_DAT4>,
  560                                  <PINMUX_GPIO129__FUNC_MSDC0_DAT5>,
  561                                  <PINMUX_GPIO127__FUNC_MSDC0_DAT6>,
  562                                  <PINMUX_GPIO130__FUNC_MSDC0_DAT7>,
  563                                  <PINMUX_GPIO122__FUNC_MSDC0_CMD>;
  564                         input-enable;
  565                         drive-strength = <MTK_DRIVE_14mA>;
  566                         mediatek,pull-up-adv = <01>;
  567                 };
  568 
  569                 pins_clk {
  570                         pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>;
  571                         drive-strength = <MTK_DRIVE_14mA>;
  572                         mediatek,pull-down-adv = <10>;
  573                 };
  574 
  575                 pins_rst {
  576                         pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>;
  577                         drive-strength = <MTK_DRIVE_14mA>;
  578                         mediatek,pull-down-adv = <01>;
  579                 };
  580         };
  581 
  582         mmc0_pins_uhs: mmc0-pins-uhs {
  583                 pins_cmd_dat {
  584                         pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>,
  585                                  <PINMUX_GPIO128__FUNC_MSDC0_DAT1>,
  586                                  <PINMUX_GPIO125__FUNC_MSDC0_DAT2>,
  587                                  <PINMUX_GPIO132__FUNC_MSDC0_DAT3>,
  588                                  <PINMUX_GPIO126__FUNC_MSDC0_DAT4>,
  589                                  <PINMUX_GPIO129__FUNC_MSDC0_DAT5>,
  590                                  <PINMUX_GPIO127__FUNC_MSDC0_DAT6>,
  591                                  <PINMUX_GPIO130__FUNC_MSDC0_DAT7>,
  592                                  <PINMUX_GPIO122__FUNC_MSDC0_CMD>;
  593                         input-enable;
  594                         drive-strength = <MTK_DRIVE_14mA>;
  595                         mediatek,pull-up-adv = <01>;
  596                 };
  597 
  598                 pins_clk {
  599                         pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>;
  600                         drive-strength = <MTK_DRIVE_14mA>;
  601                         mediatek,pull-down-adv = <10>;
  602                 };
  603 
  604                 pins_ds {
  605                         pinmux = <PINMUX_GPIO131__FUNC_MSDC0_DSL>;
  606                         drive-strength = <MTK_DRIVE_14mA>;
  607                         mediatek,pull-down-adv = <10>;
  608                 };
  609 
  610                 pins_rst {
  611                         pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>;
  612                         drive-strength = <MTK_DRIVE_14mA>;
  613                         mediatek,pull-up-adv = <01>;
  614                 };
  615         };
  616 
  617         mmc1_pins_default: mmc1-pins-default {
  618                 pins_cmd_dat {
  619                         pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>,
  620                                  <PINMUX_GPIO32__FUNC_MSDC1_DAT0>,
  621                                  <PINMUX_GPIO34__FUNC_MSDC1_DAT1>,
  622                                  <PINMUX_GPIO33__FUNC_MSDC1_DAT2>,
  623                                  <PINMUX_GPIO30__FUNC_MSDC1_DAT3>;
  624                         input-enable;
  625                         mediatek,pull-up-adv = <10>;
  626                 };
  627 
  628                 pins_clk {
  629                         pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>;
  630                         input-enable;
  631                         mediatek,pull-down-adv = <10>;
  632                 };
  633         };
  634 
  635         mmc1_pins_uhs: mmc1-pins-uhs {
  636                 pins_cmd_dat {
  637                         pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>,
  638                                  <PINMUX_GPIO32__FUNC_MSDC1_DAT0>,
  639                                  <PINMUX_GPIO34__FUNC_MSDC1_DAT1>,
  640                                  <PINMUX_GPIO33__FUNC_MSDC1_DAT2>,
  641                                  <PINMUX_GPIO30__FUNC_MSDC1_DAT3>;
  642                         drive-strength = <MTK_DRIVE_6mA>;
  643                         input-enable;
  644                         mediatek,pull-up-adv = <10>;
  645                 };
  646 
  647                 pins_clk {
  648                         pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>;
  649                         drive-strength = <MTK_DRIVE_8mA>;
  650                         mediatek,pull-down-adv = <10>;
  651                         input-enable;
  652                 };
  653         };
  654 
  655         panel_pins_default: panel_pins_default {
  656                 panel_reset {
  657                         pinmux = <PINMUX_GPIO45__FUNC_GPIO45>;
  658                         output-low;
  659                         bias-pull-up;
  660                 };
  661         };
  662 
  663         pwm0_pin_default: pwm0_pin_default {
  664                 pins1 {
  665                         pinmux = <PINMUX_GPIO176__FUNC_GPIO176>;
  666                         output-high;
  667                         bias-pull-up;
  668                 };
  669                 pins2 {
  670                         pinmux = <PINMUX_GPIO43__FUNC_DISP_PWM>;
  671                 };
  672         };
  673 
  674         scp_pins: scp {
  675                 pins_scp_uart {
  676                         pinmux = <PINMUX_GPIO110__FUNC_TP_URXD1_AO>,
  677                                  <PINMUX_GPIO112__FUNC_TP_UTXD1_AO>;
  678                 };
  679         };
  680 
  681         spi0_pins: spi0 {
  682                 pins_spi{
  683                         pinmux = <PINMUX_GPIO85__FUNC_SPI0_MI>,
  684                                  <PINMUX_GPIO86__FUNC_GPIO86>,
  685                                  <PINMUX_GPIO87__FUNC_SPI0_MO>,
  686                                  <PINMUX_GPIO88__FUNC_SPI0_CLK>;
  687                         bias-disable;
  688                 };
  689         };
  690 
  691         spi1_pins: spi1 {
  692                 pins_spi{
  693                         pinmux = <PINMUX_GPIO161__FUNC_SPI1_A_MI>,
  694                                  <PINMUX_GPIO162__FUNC_SPI1_A_CSB>,
  695                                  <PINMUX_GPIO163__FUNC_SPI1_A_MO>,
  696                                  <PINMUX_GPIO164__FUNC_SPI1_A_CLK>;
  697                         bias-disable;
  698                 };
  699         };
  700 
  701         spi2_pins: spi2 {
  702                 pins_spi{
  703                         pinmux = <PINMUX_GPIO0__FUNC_SPI2_CSB>,
  704                                  <PINMUX_GPIO1__FUNC_SPI2_MO>,
  705                                  <PINMUX_GPIO2__FUNC_SPI2_CLK>;
  706                         bias-disable;
  707                 };
  708                 pins_spi_mi {
  709                         pinmux = <PINMUX_GPIO94__FUNC_SPI2_MI>;
  710                         mediatek,pull-down-adv = <00>;
  711                 };
  712         };
  713 
  714         spi3_pins: spi3 {
  715                 pins_spi{
  716                         pinmux = <PINMUX_GPIO21__FUNC_SPI3_MI>,
  717                                  <PINMUX_GPIO22__FUNC_SPI3_CSB>,
  718                                  <PINMUX_GPIO23__FUNC_SPI3_MO>,
  719                                  <PINMUX_GPIO24__FUNC_SPI3_CLK>;
  720                         bias-disable;
  721                 };
  722         };
  723 
  724         spi4_pins: spi4 {
  725                 pins_spi{
  726                         pinmux = <PINMUX_GPIO17__FUNC_SPI4_MI>,
  727                                  <PINMUX_GPIO18__FUNC_SPI4_CSB>,
  728                                  <PINMUX_GPIO19__FUNC_SPI4_MO>,
  729                                  <PINMUX_GPIO20__FUNC_SPI4_CLK>;
  730                         bias-disable;
  731                 };
  732         };
  733 
  734         spi5_pins: spi5 {
  735                 pins_spi{
  736                         pinmux = <PINMUX_GPIO13__FUNC_SPI5_MI>,
  737                                  <PINMUX_GPIO14__FUNC_SPI5_CSB>,
  738                                  <PINMUX_GPIO15__FUNC_SPI5_MO>,
  739                                  <PINMUX_GPIO16__FUNC_SPI5_CLK>;
  740                         bias-disable;
  741                 };
  742         };
  743 
  744         uart0_pins_default: uart0-pins-default {
  745                 pins_rx {
  746                         pinmux = <PINMUX_GPIO95__FUNC_URXD0>;
  747                         input-enable;
  748                         bias-pull-up;
  749                 };
  750                 pins_tx {
  751                         pinmux = <PINMUX_GPIO96__FUNC_UTXD0>;
  752                 };
  753         };
  754 
  755         uart1_pins_default: uart1-pins-default {
  756                 pins_rx {
  757                         pinmux = <PINMUX_GPIO121__FUNC_URXD1>;
  758                         input-enable;
  759                         bias-pull-up;
  760                 };
  761                 pins_tx {
  762                         pinmux = <PINMUX_GPIO115__FUNC_UTXD1>;
  763                 };
  764                 pins_rts {
  765                         pinmux = <PINMUX_GPIO47__FUNC_URTS1>;
  766                         output-enable;
  767                 };
  768                 pins_cts {
  769                         pinmux = <PINMUX_GPIO46__FUNC_UCTS1>;
  770                         input-enable;
  771                 };
  772         };
  773 
  774         uart1_pins_sleep: uart1-pins-sleep {
  775                 pins_rx {
  776                         pinmux = <PINMUX_GPIO121__FUNC_GPIO121>;
  777                         input-enable;
  778                         bias-pull-up;
  779                 };
  780                 pins_tx {
  781                         pinmux = <PINMUX_GPIO115__FUNC_UTXD1>;
  782                 };
  783                 pins_rts {
  784                         pinmux = <PINMUX_GPIO47__FUNC_URTS1>;
  785                         output-enable;
  786                 };
  787                 pins_cts {
  788                         pinmux = <PINMUX_GPIO46__FUNC_UCTS1>;
  789                         input-enable;
  790                 };
  791         };
  792 
  793         wifi_pins_pwrseq: wifi-pins-pwrseq {
  794                 pins_wifi_enable {
  795                         pinmux = <PINMUX_GPIO119__FUNC_GPIO119>;
  796                         output-low;
  797                 };
  798         };
  799 
  800         wifi_pins_wakeup: wifi-pins-wakeup {
  801                 pins_wifi_wakeup {
  802                         pinmux = <PINMUX_GPIO113__FUNC_GPIO113>;
  803                         input-enable;
  804                 };
  805         };
  806 };
  807 
  808 &pwm0 {
  809         status = "okay";
  810         pinctrl-names = "default";
  811         pinctrl-0 = <&pwm0_pin_default>;
  812 };
  813 
  814 &scp {
  815         status = "okay";
  816         pinctrl-names = "default";
  817         pinctrl-0 = <&scp_pins>;
  818 
  819         cros_ec {
  820                 compatible = "google,cros-ec-rpmsg";
  821                 mediatek,rpmsg-name = "cros-ec-rpmsg";
  822         };
  823 };
  824 
  825 &mfg_async {
  826         domain-supply = <&mt6358_vsram_gpu_reg>;
  827 };
  828 
  829 &mfg {
  830         domain-supply = <&mt6358_vgpu_reg>;
  831 };
  832 
  833 &soc_data {
  834         status = "okay";
  835 };
  836 
  837 &spi0 {
  838         pinctrl-names = "default";
  839         pinctrl-0 = <&spi0_pins>;
  840         mediatek,pad-select = <0>;
  841         status = "okay";
  842         cs-gpios = <&pio 86 GPIO_ACTIVE_LOW>;
  843 
  844         cr50@0 {
  845                 compatible = "google,cr50";
  846                 reg = <0>;
  847                 spi-max-frequency = <1000000>;
  848                 pinctrl-names = "default";
  849                 pinctrl-0 = <&h1_int_od_l>;
  850                 interrupt-parent = <&pio>;
  851                 interrupts = <153 IRQ_TYPE_EDGE_RISING>;
  852         };
  853 };
  854 
  855 &spi1 {
  856         pinctrl-names = "default";
  857         pinctrl-0 = <&spi1_pins>;
  858         mediatek,pad-select = <0>;
  859         status = "okay";
  860 
  861         w25q64dw: flash@0 {
  862                 compatible = "winbond,w25q64dw", "jedec,spi-nor";
  863                 reg = <0>;
  864                 spi-max-frequency = <25000000>;
  865         };
  866 };
  867 
  868 &spi2 {
  869         pinctrl-names = "default";
  870         pinctrl-0 = <&spi2_pins>;
  871         mediatek,pad-select = <0>;
  872         status = "okay";
  873 
  874         cros_ec: cros-ec@0 {
  875                 compatible = "google,cros-ec-spi";
  876                 reg = <0>;
  877                 spi-max-frequency = <3000000>;
  878                 interrupt-parent = <&pio>;
  879                 interrupts = <151 IRQ_TYPE_LEVEL_LOW>;
  880                 pinctrl-names = "default";
  881                 pinctrl-0 = <&ec_ap_int_odl>;
  882 
  883                 i2c_tunnel: i2c-tunnel {
  884                         compatible = "google,cros-ec-i2c-tunnel";
  885                         google,remote-bus = <1>;
  886                         #address-cells = <1>;
  887                         #size-cells = <0>;
  888                 };
  889 
  890                 usbc_extcon: extcon0 {
  891                         compatible = "google,extcon-usbc-cros-ec";
  892                         google,usb-port-id = <0>;
  893                 };
  894 
  895                 cbas {
  896                         compatible = "google,cros-cbas";
  897                 };
  898 
  899                 typec {
  900                         compatible = "google,cros-ec-typec";
  901                         #address-cells = <1>;
  902                         #size-cells = <0>;
  903 
  904                         usb_c0: connector@0 {
  905                                 compatible = "usb-c-connector";
  906                                 reg = <0>;
  907                                 power-role = "dual";
  908                                 data-role = "host";
  909                                 try-power-role = "sink";
  910                         };
  911                 };
  912         };
  913 };
  914 
  915 &spi3 {
  916         pinctrl-names = "default";
  917         pinctrl-0 = <&spi3_pins>;
  918         mediatek,pad-select = <0>;
  919         status = "disabled";
  920 };
  921 
  922 &spi4 {
  923         pinctrl-names = "default";
  924         pinctrl-0 = <&spi4_pins>;
  925         mediatek,pad-select = <0>;
  926         status = "disabled";
  927 };
  928 
  929 &spi5 {
  930         pinctrl-names = "default";
  931         pinctrl-0 = <&spi5_pins>;
  932         mediatek,pad-select = <0>;
  933         status = "disabled";
  934 };
  935 
  936 &ssusb {
  937         dr_mode = "host";
  938         wakeup-source;
  939         vusb33-supply = <&mt6358_vusb_reg>;
  940         status = "okay";
  941 };
  942 
  943 &thermal_zones {
  944         tboard1 {
  945                 polling-delay = <1000>; /* milliseconds */
  946                 polling-delay-passive = <0>; /* milliseconds */
  947                 thermal-sensors = <&tboard_thermistor1>;
  948         };
  949 
  950         tboard2 {
  951                 polling-delay = <1000>; /* milliseconds */
  952                 polling-delay-passive = <0>; /* milliseconds */
  953                 thermal-sensors = <&tboard_thermistor2>;
  954         };
  955 };
  956 
  957 &u3phy {
  958         status = "okay";
  959 };
  960 
  961 &uart0 {
  962         pinctrl-names = "default";
  963         pinctrl-0 = <&uart0_pins_default>;
  964         status = "okay";
  965 };
  966 
  967 &uart1 {
  968         pinctrl-names = "default", "sleep";
  969         pinctrl-0 = <&uart1_pins_default>;
  970         pinctrl-1 = <&uart1_pins_sleep>;
  971         status = "okay";
  972         interrupts-extended = <&sysirq GIC_SPI 92 IRQ_TYPE_LEVEL_LOW>,
  973                               <&pio 121 IRQ_TYPE_EDGE_FALLING>;
  974 
  975         bluetooth: bluetooth {
  976                 pinctrl-names = "default";
  977                 pinctrl-0 = <&bt_pins>;
  978                 status = "okay";
  979                 compatible = "qcom,qca6174-bt";
  980                 enable-gpios = <&pio 120 0>;
  981                 clocks = <&clk32k>;
  982                 firmware-name = "nvm_00440302_i2s.bin";
  983         };
  984 };
  985 
  986 &usb_host {
  987         #address-cells = <1>;
  988         #size-cells = <0>;
  989         vusb33-supply = <&mt6358_vusb_reg>;
  990         status = "okay";
  991 
  992         hub@1 {
  993                 compatible = "usb5e3,610";
  994                 reg = <1>;
  995         };
  996 };
  997 
  998 #include <arm/cros-ec-keyboard.dtsi>
  999 #include <arm/cros-ec-sbs.dtsi>
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FreeBSD/Linux Kernel Cross Reference sys/contrib/device-tree/src/arm64/mediatek/mt8183-kukui.dtsi

FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/src/arm64/mediatek/mt8183-kukui.dtsi
