mt8195-cherry.dtsi

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    1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
    2 /*
    3  * Copyright (C) 2021 MediaTek Inc.
    4  */
    5 
    6 #include <dt-bindings/gpio/gpio.h>
    7 #include "mt8195.dtsi"
    8 #include "mt6359.dtsi"
    9 
   10 / {
   11         aliases {
   12                 i2c0 = &i2c0;
   13                 i2c1 = &i2c1;
   14                 i2c2 = &i2c2;
   15                 i2c3 = &i2c3;
   16                 i2c4 = &i2c4;
   17                 i2c5 = &i2c5;
   18                 i2c7 = &i2c7;
   19                 mmc0 = &mmc0;
   20                 serial0 = &uart0;
   21         };
   22 
   23         chosen {
   24                 stdout-path = "serial0:115200n8";
   25         };
   26 
   27         memory@40000000 {
   28                 device_type = "memory";
   29                 reg = <0 0x40000000 0 0x80000000>;
   30         };
   31 
   32         /* system wide LDO 3.3V power rail */
   33         pp3300_z5: regulator-pp3300-ldo-z5 {
   34                 compatible = "regulator-fixed";
   35                 regulator-name = "pp3300_ldo_z5";
   36                 regulator-always-on;
   37                 regulator-boot-on;
   38                 regulator-min-microvolt = <3300000>;
   39                 regulator-max-microvolt = <3300000>;
   40                 vin-supply = <&ppvar_sys>;
   41         };
   42 
   43         /* separately switched 3.3V power rail */
   44         pp3300_s3: regulator-pp3300-s3 {
   45                 compatible = "regulator-fixed";
   46                 regulator-name = "pp3300_s3";
   47                 /* automatically sequenced by PMIC EXT_PMIC_EN2 */
   48                 regulator-always-on;
   49                 regulator-boot-on;
   50                 regulator-min-microvolt = <3300000>;
   51                 regulator-max-microvolt = <3300000>;
   52                 vin-supply = <&pp3300_z2>;
   53         };
   54 
   55         /* system wide 3.3V power rail */
   56         pp3300_z2: regulator-pp3300-z2 {
   57                 compatible = "regulator-fixed";
   58                 regulator-name = "pp3300_z2";
   59                 /* EN pin tied to pp4200_z2, which is controlled by EC */
   60                 regulator-always-on;
   61                 regulator-boot-on;
   62                 regulator-min-microvolt = <3300000>;
   63                 regulator-max-microvolt = <3300000>;
   64                 vin-supply = <&ppvar_sys>;
   65         };
   66 
   67         /* system wide 4.2V power rail */
   68         pp4200_z2: regulator-pp4200-z2 {
   69                 compatible = "regulator-fixed";
   70                 regulator-name = "pp4200_z2";
   71                 /* controlled by EC */
   72                 regulator-always-on;
   73                 regulator-boot-on;
   74                 regulator-min-microvolt = <4200000>;
   75                 regulator-max-microvolt = <4200000>;
   76                 vin-supply = <&ppvar_sys>;
   77         };
   78 
   79         /* system wide switching 5.0V power rail */
   80         pp5000_s5: regulator-pp5000-s5 {
   81                 compatible = "regulator-fixed";
   82                 regulator-name = "pp5000_s5";
   83                 /* controlled by EC */
   84                 regulator-always-on;
   85                 regulator-boot-on;
   86                 regulator-min-microvolt = <5000000>;
   87                 regulator-max-microvolt = <5000000>;
   88                 vin-supply = <&ppvar_sys>;
   89         };
   90 
   91         /* system wide semi-regulated power rail from battery or USB */
   92         ppvar_sys: regulator-ppvar-sys {
   93                 compatible = "regulator-fixed";
   94                 regulator-name = "ppvar_sys";
   95                 regulator-always-on;
   96                 regulator-boot-on;
   97         };
   98 
   99         usb_vbus: regulator-5v0-usb-vbus {
  100                 compatible = "regulator-fixed";
  101                 regulator-name = "usb-vbus";
  102                 regulator-min-microvolt = <5000000>;
  103                 regulator-max-microvolt = <5000000>;
  104                 enable-active-high;
  105                 regulator-always-on;
  106         };
  107 };
  108 
  109 &i2c0 {
  110         status = "okay";
  111 
  112         clock-frequency = <400000>;
  113         pinctrl-names = "default";
  114         pinctrl-0 = <&i2c0_pins>;
  115 };
  116 
  117 &i2c1 {
  118         status = "okay";
  119 
  120         clock-frequency = <400000>;
  121         i2c-scl-internal-delay-ns = <12500>;
  122         pinctrl-names = "default";
  123         pinctrl-0 = <&i2c1_pins>;
  124 };
  125 
  126 &i2c2 {
  127         status = "okay";
  128 
  129         clock-frequency = <400000>;
  130         pinctrl-names = "default";
  131         pinctrl-0 = <&i2c2_pins>;
  132 };
  133 
  134 &i2c3 {
  135         status = "okay";
  136 
  137         clock-frequency = <400000>;
  138         pinctrl-names = "default";
  139         pinctrl-0 = <&i2c3_pins>;
  140 };
  141 
  142 &i2c4 {
  143         status = "okay";
  144 
  145         clock-frequency = <400000>;
  146         pinctrl-names = "default";
  147         pinctrl-0 = <&i2c4_pins>;
  148 
  149         ts_10: touchscreen@10 {
  150                 compatible = "hid-over-i2c";
  151                 reg = <0x10>;
  152                 hid-descr-addr = <0x0001>;
  153                 interrupts-extended = <&pio 92 IRQ_TYPE_LEVEL_LOW>;
  154                 pinctrl-names = "default";
  155                 pinctrl-0 = <&touchscreen_pins>;
  156                 post-power-on-delay-ms = <10>;
  157                 vdd-supply = <&pp3300_s3>;
  158                 status = "disabled";
  159         };
  160 };
  161 
  162 &i2c5 {
  163         status = "okay";
  164 
  165         clock-frequency = <400000>;
  166         pinctrl-names = "default";
  167         pinctrl-0 = <&i2c5_pins>;
  168 };
  169 
  170 &i2c7 {
  171         status = "okay";
  172 
  173         clock-frequency = <400000>;
  174         pinctrl-names = "default";
  175         pinctrl-0 = <&i2c7_pins>;
  176 
  177         pmic@34 {
  178                 #interrupt-cells = <1>;
  179                 compatible = "mediatek,mt6360";
  180                 reg = <0x34>;
  181                 interrupt-controller;
  182                 interrupts-extended = <&pio 130 IRQ_TYPE_EDGE_FALLING>;
  183                 interrupt-names = "IRQB";
  184                 pinctrl-names = "default";
  185                 pinctrl-0 = <&subpmic_default>;
  186                 wakeup-source;
  187         };
  188 };
  189 
  190 &mmc0 {
  191         status = "okay";
  192 
  193         bus-width = <8>;
  194         cap-mmc-highspeed;
  195         cap-mmc-hw-reset;
  196         hs400-ds-delay = <0x14c11>;
  197         max-frequency = <200000000>;
  198         mmc-hs200-1_8v;
  199         mmc-hs400-1_8v;
  200         no-sdio;
  201         no-sd;
  202         non-removable;
  203         pinctrl-names = "default", "state_uhs";
  204         pinctrl-0 = <&mmc0_pins_default>;
  205         pinctrl-1 = <&mmc0_pins_uhs>;
  206         vmmc-supply = <&mt6359_vemc_1_ldo_reg>;
  207         vqmmc-supply = <&mt6359_vufs_ldo_reg>;
  208 };
  209 
  210 /* for CPU-L */
  211 &mt6359_vcore_buck_reg {
  212         regulator-always-on;
  213 };
  214 
  215 /* for CORE */
  216 &mt6359_vgpu11_buck_reg {
  217         regulator-always-on;
  218 };
  219 
  220 &mt6359_vgpu11_sshub_buck_reg {
  221         regulator-always-on;
  222         regulator-min-microvolt = <550000>;
  223         regulator-max-microvolt = <550000>;
  224 };
  225 
  226 /* for CORE SRAM */
  227 &mt6359_vpu_buck_reg {
  228         regulator-always-on;
  229 };
  230 
  231 &mt6359_vrf12_ldo_reg {
  232         regulator-always-on;
  233 };
  234 
  235 /* for GPU SRAM */
  236 &mt6359_vsram_others_ldo_reg {
  237         regulator-always-on;
  238         regulator-min-microvolt = <750000>;
  239         regulator-max-microvolt = <750000>;
  240 };
  241 
  242 &mt6359_vufs_ldo_reg {
  243         regulator-always-on;
  244 };
  245 
  246 &nor_flash {
  247         status = "okay";
  248 
  249         pinctrl-names = "default";
  250         pinctrl-0 = <&nor_pins_default>;
  251 
  252         flash@0 {
  253                 compatible = "jedec,spi-nor";
  254                 reg = <0>;
  255                 spi-max-frequency = <52000000>;
  256                 spi-rx-bus-width = <2>;
  257                 spi-tx-bus-width = <2>;
  258         };
  259 };
  260 
  261 &pio {
  262         mediatek,rsel-resistance-in-si-unit;
  263         pinctrl-names = "default";
  264         pinctrl-0 = <&pio_default>;
  265 
  266         /* 144 lines */
  267         gpio-line-names =
  268                 "I2S_SPKR_MCLK",
  269                 "I2S_SPKR_DATAIN",
  270                 "I2S_SPKR_LRCK",
  271                 "I2S_SPKR_BCLK",
  272                 "EC_AP_INT_ODL",
  273                 /*
  274                  * AP_FLASH_WP_L is crossystem ABI. Schematics
  275                  * call it AP_FLASH_WP_ODL.
  276                  */
  277                 "AP_FLASH_WP_L",
  278                 "TCHPAD_INT_ODL",
  279                 "EDP_HPD_1V8",
  280                 "AP_I2C_CAM_SDA",
  281                 "AP_I2C_CAM_SCL",
  282                 "AP_I2C_TCHPAD_SDA_1V8",
  283                 "AP_I2C_TCHPAD_SCL_1V8",
  284                 "AP_I2C_AUD_SDA",
  285                 "AP_I2C_AUD_SCL",
  286                 "AP_I2C_TPM_SDA_1V8",
  287                 "AP_I2C_TPM_SCL_1V8",
  288                 "AP_I2C_TCHSCR_SDA_1V8",
  289                 "AP_I2C_TCHSCR_SCL_1V8",
  290                 "EC_AP_HPD_OD",
  291                 "",
  292                 "PCIE_NVME_RST_L",
  293                 "PCIE_NVME_CLKREQ_ODL",
  294                 "PCIE_RST_1V8_L",
  295                 "PCIE_CLKREQ_1V8_ODL",
  296                 "PCIE_WAKE_1V8_ODL",
  297                 "CLK_24M_CAM0",
  298                 "CAM1_SEN_EN",
  299                 "AP_I2C_PWR_SCL_1V8",
  300                 "AP_I2C_PWR_SDA_1V8",
  301                 "AP_I2C_MISC_SCL",
  302                 "AP_I2C_MISC_SDA",
  303                 "EN_PP5000_HDMI_X",
  304                 "AP_HDMITX_HTPLG",
  305                 "",
  306                 "AP_HDMITX_SCL_1V8",
  307                 "AP_HDMITX_SDA_1V8",
  308                 "AP_RTC_CLK32K",
  309                 "AP_EC_WATCHDOG_L",
  310                 "SRCLKENA0",
  311                 "SRCLKENA1",
  312                 "PWRAP_SPI0_CS_L",
  313                 "PWRAP_SPI0_CK",
  314                 "PWRAP_SPI0_MOSI",
  315                 "PWRAP_SPI0_MISO",
  316                 "SPMI_SCL",
  317                 "SPMI_SDA",
  318                 "",
  319                 "",
  320                 "",
  321                 "I2S_HP_DATAIN",
  322                 "I2S_HP_MCLK",
  323                 "I2S_HP_BCK",
  324                 "I2S_HP_LRCK",
  325                 "I2S_HP_DATAOUT",
  326                 "SD_CD_ODL",
  327                 "EN_PP3300_DISP_X",
  328                 "TCHSCR_RST_1V8_L",
  329                 "TCHSCR_REPORT_DISABLE",
  330                 "EN_PP3300_WLAN_X",
  331                 "BT_KILL_1V8_L",
  332                 "I2S_SPKR_DATAOUT",
  333                 "WIFI_KILL_1V8_L",
  334                 "BEEP_ON",
  335                 "SCP_I2C_SENSOR_SCL_1V8",
  336                 "SCP_I2C_SENSOR_SDA_1V8",
  337                 "",
  338                 "",
  339                 "",
  340                 "",
  341                 "AUD_CLK_MOSI",
  342                 "AUD_SYNC_MOSI",
  343                 "AUD_DAT_MOSI0",
  344                 "AUD_DAT_MOSI1",
  345                 "AUD_DAT_MISO0",
  346                 "AUD_DAT_MISO1",
  347                 "AUD_DAT_MISO2",
  348                 "SCP_VREQ_VAO",
  349                 "AP_SPI_GSC_TPM_CLK",
  350                 "AP_SPI_GSC_TPM_MOSI",
  351                 "AP_SPI_GSC_TPM_CS_L",
  352                 "AP_SPI_GSC_TPM_MISO",
  353                 "EN_PP1000_CAM_X",
  354                 "AP_EDP_BKLTEN",
  355                 "",
  356                 "USB3_HUB_RST_L",
  357                 "",
  358                 "WLAN_ALERT_ODL",
  359                 "EC_IN_RW_ODL",
  360                 "GSC_AP_INT_ODL",
  361                 "HP_INT_ODL",
  362                 "CAM0_RST_L",
  363                 "CAM1_RST_L",
  364                 "TCHSCR_INT_1V8_L",
  365                 "CAM1_DET_L",
  366                 "RST_ALC1011_L",
  367                 "",
  368                 "",
  369                 "BL_PWM_1V8",
  370                 "UART_AP_TX_DBG_RX",
  371                 "UART_DBG_TX_AP_RX",
  372                 "EN_SPKR",
  373                 "AP_EC_WARM_RST_REQ",
  374                 "UART_SCP_TX_DBGCON_RX",
  375                 "UART_DBGCON_TX_SCP_RX",
  376                 "",
  377                 "",
  378                 "KPCOL0",
  379                 "",
  380                 "MT6315_GPU_INT",
  381                 "MT6315_PROC_BC_INT",
  382                 "SD_CMD",
  383                 "SD_CLK",
  384                 "SD_DAT0",
  385                 "SD_DAT1",
  386                 "SD_DAT2",
  387                 "SD_DAT3",
  388                 "EMMC_DAT7",
  389                 "EMMC_DAT6",
  390                 "EMMC_DAT5",
  391                 "EMMC_DAT4",
  392                 "EMMC_RSTB",
  393                 "EMMC_CMD",
  394                 "EMMC_CLK",
  395                 "EMMC_DAT3",
  396                 "EMMC_DAT2",
  397                 "EMMC_DAT1",
  398                 "EMMC_DAT0",
  399                 "EMMC_DSL",
  400                 "",
  401                 "",
  402                 "MT6360_INT_ODL",
  403                 "SCP_JTAG0_TRSTN",
  404                 "AP_SPI_EC_CS_L",
  405                 "AP_SPI_EC_CLK",
  406                 "AP_SPI_EC_MOSI",
  407                 "AP_SPI_EC_MISO",
  408                 "SCP_JTAG0_TMS",
  409                 "SCP_JTAG0_TCK",
  410                 "SCP_JTAG0_TDO",
  411                 "SCP_JTAG0_TDI",
  412                 "AP_SPI_FLASH_CS_L",
  413                 "AP_SPI_FLASH_CLK",
  414                 "AP_SPI_FLASH_MOSI",
  415                 "AP_SPI_FLASH_MISO";
  416 
  417         i2c0_pins: i2c0-default-pins {
  418                 pins-bus {
  419                         pinmux = <PINMUX_GPIO8__FUNC_SDA0>,
  420                                  <PINMUX_GPIO9__FUNC_SCL0>;
  421                         bias-disable;
  422                         drive-strength-microamp = <1000>;
  423                 };
  424         };
  425 
  426         i2c1_pins: i2c1-default-pins {
  427                 pins-bus {
  428                         pinmux = <PINMUX_GPIO10__FUNC_SDA1>,
  429                                  <PINMUX_GPIO11__FUNC_SCL1>;
  430                         bias-pull-up = <1000>;
  431                         drive-strength-microamp = <1000>;
  432                 };
  433         };
  434 
  435         i2c2_pins: i2c2-default-pins {
  436                 pins-bus {
  437                         pinmux = <PINMUX_GPIO12__FUNC_SDA2>,
  438                                  <PINMUX_GPIO13__FUNC_SCL2>;
  439                         bias-disable;
  440                         drive-strength-microamp = <1000>;
  441                 };
  442         };
  443 
  444         i2c3_pins: i2c3-default-pins {
  445                 pins-bus {
  446                         pinmux = <PINMUX_GPIO14__FUNC_SDA3>,
  447                                  <PINMUX_GPIO15__FUNC_SCL3>;
  448                         bias-pull-up = <1000>;
  449                         drive-strength-microamp = <1000>;
  450                 };
  451         };
  452 
  453         i2c4_pins: i2c4-default-pins {
  454                 pins-bus {
  455                         pinmux = <PINMUX_GPIO16__FUNC_SDA4>,
  456                                  <PINMUX_GPIO17__FUNC_SCL4>;
  457                         bias-pull-up = <1000>;
  458                         drive-strength = <4>;
  459                 };
  460         };
  461 
  462         i2c5_pins: i2c5-default-pins {
  463                 pins-bus {
  464                         pinmux = <PINMUX_GPIO29__FUNC_SCL5>,
  465                                  <PINMUX_GPIO30__FUNC_SDA5>;
  466                         bias-disable;
  467                         drive-strength-microamp = <1000>;
  468                 };
  469         };
  470 
  471         i2c7_pins: i2c7-default-pins {
  472                 pins-bus {
  473                         pinmux = <PINMUX_GPIO27__FUNC_SCL7>,
  474                                  <PINMUX_GPIO28__FUNC_SDA7>;
  475                         bias-disable;
  476                 };
  477         };
  478 
  479         mmc0_pins_default: mmc0-default-pins {
  480                 pins-cmd-dat {
  481                         pinmux = <PINMUX_GPIO126__FUNC_MSDC0_DAT0>,
  482                                  <PINMUX_GPIO125__FUNC_MSDC0_DAT1>,
  483                                  <PINMUX_GPIO124__FUNC_MSDC0_DAT2>,
  484                                  <PINMUX_GPIO123__FUNC_MSDC0_DAT3>,
  485                                  <PINMUX_GPIO119__FUNC_MSDC0_DAT4>,
  486                                  <PINMUX_GPIO118__FUNC_MSDC0_DAT5>,
  487                                  <PINMUX_GPIO117__FUNC_MSDC0_DAT6>,
  488                                  <PINMUX_GPIO116__FUNC_MSDC0_DAT7>,
  489                                  <PINMUX_GPIO121__FUNC_MSDC0_CMD>;
  490                         input-enable;
  491                         drive-strength = <6>;
  492                         bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
  493                 };
  494 
  495                 pins-clk {
  496                         pinmux = <PINMUX_GPIO122__FUNC_MSDC0_CLK>;
  497                         drive-strength = <6>;
  498                         bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
  499                 };
  500 
  501                 pins-rst {
  502                         pinmux = <PINMUX_GPIO120__FUNC_MSDC0_RSTB>;
  503                         drive-strength = <6>;
  504                         bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
  505                 };
  506         };
  507 
  508         mmc0_pins_uhs: mmc0-uhs-pins {
  509                 pins-cmd-dat {
  510                         pinmux = <PINMUX_GPIO126__FUNC_MSDC0_DAT0>,
  511                                  <PINMUX_GPIO125__FUNC_MSDC0_DAT1>,
  512                                  <PINMUX_GPIO124__FUNC_MSDC0_DAT2>,
  513                                  <PINMUX_GPIO123__FUNC_MSDC0_DAT3>,
  514                                  <PINMUX_GPIO119__FUNC_MSDC0_DAT4>,
  515                                  <PINMUX_GPIO118__FUNC_MSDC0_DAT5>,
  516                                  <PINMUX_GPIO117__FUNC_MSDC0_DAT6>,
  517                                  <PINMUX_GPIO116__FUNC_MSDC0_DAT7>,
  518                                  <PINMUX_GPIO121__FUNC_MSDC0_CMD>;
  519                         input-enable;
  520                         drive-strength = <8>;
  521                         bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
  522                 };
  523 
  524                 pins-clk {
  525                         pinmux = <PINMUX_GPIO122__FUNC_MSDC0_CLK>;
  526                         drive-strength = <8>;
  527                         bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
  528                 };
  529 
  530                 pins-ds {
  531                         pinmux = <PINMUX_GPIO127__FUNC_MSDC0_DSL>;
  532                         drive-strength = <8>;
  533                         bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
  534                 };
  535 
  536                 pins-rst {
  537                         pinmux = <PINMUX_GPIO120__FUNC_MSDC0_RSTB>;
  538                         drive-strength = <8>;
  539                         bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
  540                 };
  541         };
  542 
  543         nor_pins_default: nor-default-pins {
  544                 pins-ck-io {
  545                         pinmux = <PINMUX_GPIO142__FUNC_SPINOR_IO0>,
  546                                  <PINMUX_GPIO141__FUNC_SPINOR_CK>,
  547                                  <PINMUX_GPIO143__FUNC_SPINOR_IO1>;
  548                         drive-strength = <6>;
  549                         bias-pull-down;
  550                 };
  551 
  552                 pins-cs {
  553                         pinmux = <PINMUX_GPIO140__FUNC_SPINOR_CS>;
  554                         drive-strength = <6>;
  555                         bias-pull-up;
  556                 };
  557         };
  558 
  559         pio_default: pio-default-pins {
  560                 pins-wifi-enable {
  561                         pinmux = <PINMUX_GPIO58__FUNC_GPIO58>;
  562                         output-high;
  563                         drive-strength = <14>;
  564                 };
  565 
  566                 pins-low-power-pd {
  567                         pinmux = <PINMUX_GPIO25__FUNC_GPIO25>,
  568                                  <PINMUX_GPIO26__FUNC_GPIO26>,
  569                                  <PINMUX_GPIO46__FUNC_GPIO46>,
  570                                  <PINMUX_GPIO47__FUNC_GPIO47>,
  571                                  <PINMUX_GPIO48__FUNC_GPIO48>,
  572                                  <PINMUX_GPIO65__FUNC_GPIO65>,
  573                                  <PINMUX_GPIO66__FUNC_GPIO66>,
  574                                  <PINMUX_GPIO67__FUNC_GPIO67>,
  575                                  <PINMUX_GPIO68__FUNC_GPIO68>,
  576                                  <PINMUX_GPIO128__FUNC_GPIO128>,
  577                                  <PINMUX_GPIO129__FUNC_GPIO129>;
  578                         input-enable;
  579                         bias-pull-down;
  580                 };
  581 
  582                 pins-low-power-pupd {
  583                         pinmux = <PINMUX_GPIO77__FUNC_GPIO77>,
  584                                  <PINMUX_GPIO78__FUNC_GPIO78>,
  585                                  <PINMUX_GPIO79__FUNC_GPIO79>,
  586                                  <PINMUX_GPIO80__FUNC_GPIO80>,
  587                                  <PINMUX_GPIO83__FUNC_GPIO83>,
  588                                  <PINMUX_GPIO85__FUNC_GPIO85>,
  589                                  <PINMUX_GPIO90__FUNC_GPIO90>,
  590                                  <PINMUX_GPIO91__FUNC_GPIO91>,
  591                                  <PINMUX_GPIO93__FUNC_GPIO93>,
  592                                  <PINMUX_GPIO94__FUNC_GPIO94>,
  593                                  <PINMUX_GPIO95__FUNC_GPIO95>,
  594                                  <PINMUX_GPIO96__FUNC_GPIO96>,
  595                                  <PINMUX_GPIO104__FUNC_GPIO104>,
  596                                  <PINMUX_GPIO105__FUNC_GPIO105>,
  597                                  <PINMUX_GPIO107__FUNC_GPIO107>;
  598                         input-enable;
  599                         bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
  600                 };
  601         };
  602 
  603         spi0_pins: spi0-default-pins {
  604                 pins-cs-mosi-clk {
  605                         pinmux = <PINMUX_GPIO132__FUNC_SPIM0_CSB>,
  606                                  <PINMUX_GPIO134__FUNC_SPIM0_MO>,
  607                                  <PINMUX_GPIO133__FUNC_SPIM0_CLK>;
  608                         bias-disable;
  609                 };
  610 
  611                 pins-miso {
  612                         pinmux = <PINMUX_GPIO135__FUNC_SPIM0_MI>;
  613                         bias-pull-down;
  614                 };
  615         };
  616 
  617         subpmic_default: subpmic-default-pins {
  618                 subpmic_pin_irq: pins-subpmic-int-n {
  619                         pinmux = <PINMUX_GPIO130__FUNC_GPIO130>;
  620                         input-enable;
  621                         bias-pull-up;
  622                 };
  623         };
  624 
  625         touchscreen_pins: touchscreen-default-pins {
  626                 pins-int-n {
  627                         pinmux = <PINMUX_GPIO92__FUNC_GPIO92>;
  628                         input-enable;
  629                         bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
  630                 };
  631                 pins-rst {
  632                         pinmux = <PINMUX_GPIO56__FUNC_GPIO56>;
  633                         output-high;
  634                 };
  635                 pins-report-sw {
  636                         pinmux = <PINMUX_GPIO57__FUNC_GPIO57>;
  637                         output-low;
  638                 };
  639         };
  640 };
  641 
  642 &pmic {
  643         interrupts-extended = <&pio 222 IRQ_TYPE_LEVEL_HIGH>;
  644 };
  645 
  646 &spi0 {
  647         status = "okay";
  648 
  649         pinctrl-names = "default";
  650         pinctrl-0 = <&spi0_pins>;
  651         mediatek,pad-select = <0>;
  652 };
  653 
  654 &u3phy0 {
  655         status = "okay";
  656 };
  657 
  658 &u3phy1 {
  659         status = "okay";
  660 };
  661 
  662 &u3phy2 {
  663         status = "okay";
  664 };
  665 
  666 &u3phy3 {
  667         status = "okay";
  668 };
  669 
  670 &uart0 {
  671         status = "okay";
  672 };
  673 
  674 &xhci0 {
  675         status = "okay";
  676 
  677         vusb33-supply = <&mt6359_vusb_ldo_reg>;
  678         vbus-supply = <&usb_vbus>;
  679 };
  680 
  681 &xhci1 {
  682         status = "okay";
  683 
  684         vusb33-supply = <&mt6359_vusb_ldo_reg>;
  685         vbus-supply = <&usb_vbus>;
  686 };
  687 
  688 &xhci2 {
  689         status = "okay";
  690 
  691         vusb33-supply = <&mt6359_vusb_ldo_reg>;
  692         vbus-supply = <&usb_vbus>;
  693 };
  694 
  695 &xhci3 {
  696         status = "okay";
  697 
  698         /* MT7921's USB Bluetooth has issues with USB2 LPM */
  699         usb2-lpm-disable;
  700         vusb33-supply = <&mt6359_vusb_ldo_reg>;
  701         vbus-supply = <&usb_vbus>;
  702 };
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FreeBSD/Linux Kernel Cross Reference sys/contrib/device-tree/src/arm64/mediatek/mt8195-cherry.dtsi

FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/src/arm64/mediatek/mt8195-cherry.dtsi
