mt8195-evb.dts

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    1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
    2 /*
    3  * Copyright (C) 2021 MediaTek Inc.
    4  * Author: Seiya Wang <seiya.wang@mediatek.com>
    5  */
    6 /dts-v1/;
    7 #include "mt8195.dtsi"
    8 
    9 / {
   10         model = "MediaTek MT8195 evaluation board";
   11         compatible = "mediatek,mt8195-evb", "mediatek,mt8195";
   12 
   13         aliases {
   14                 serial0 = &uart0;
   15         };
   16 
   17         chosen {
   18                 stdout-path = "serial0:921600n8";
   19         };
   20 
   21         memory@40000000 {
   22                 device_type = "memory";
   23                 reg = <0 0x40000000 0 0x80000000>;
   24         };
   25 };
   26 
   27 &auxadc {
   28         status = "okay";
   29 };
   30 
   31 &i2c0 {
   32         pinctrl-names = "default";
   33         pinctrl-0 = <&i2c0_pin>;
   34         clock-frequency = <100000>;
   35         status = "okay";
   36 };
   37 
   38 &i2c1 {
   39         pinctrl-names = "default";
   40         pinctrl-0 = <&i2c1_pin>;
   41         clock-frequency = <400000>;
   42         status = "okay";
   43 };
   44 
   45 &i2c4 {
   46         pinctrl-names = "default";
   47         pinctrl-0 = <&i2c4_pin>;
   48         clock-frequency = <400000>;
   49         status = "okay";
   50 };
   51 
   52 &i2c6 {
   53         pinctrl-names = "default";
   54         pinctrl-0 = <&i2c6_pin>;
   55         clock-frequency = <400000>;
   56         status = "okay";
   57 };
   58 
   59 &nor_flash {
   60         status = "okay";
   61         pinctrl-names = "default";
   62         pinctrl-0 = <&nor_pins_default>;
   63 
   64         flash@0 {
   65                 compatible = "jedec,spi-nor";
   66                 reg = <0>;
   67                 spi-max-frequency = <50000000>;
   68         };
   69 };
   70 
   71 &pio {
   72         i2c0_pin: i2c0-pins {
   73                 pins {
   74                         pinmux = <PINMUX_GPIO8__FUNC_SDA0>,
   75                                  <PINMUX_GPIO9__FUNC_SCL0>;
   76                         bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
   77                         mediatek,drive-strength-adv = <0>;
   78                         drive-strength = <6>;
   79                 };
   80         };
   81 
   82         i2c1_pin: i2c1-pins {
   83                 pins {
   84                         pinmux = <PINMUX_GPIO10__FUNC_SDA1>,
   85                                  <PINMUX_GPIO11__FUNC_SCL1>;
   86                         bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
   87                         mediatek,drive-strength-adv = <0>;
   88                         drive-strength = <6>;
   89                 };
   90         };
   91 
   92         i2c4_pin: i2c4-pins {
   93                 pins {
   94                         pinmux = <PINMUX_GPIO16__FUNC_SDA4>,
   95                                  <PINMUX_GPIO17__FUNC_SCL4>;
   96                         bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
   97                         mediatek,drive-strength-adv = <7>;
   98                 };
   99         };
  100 
  101         i2c6_pin: i2c6-pins {
  102                 pins {
  103                         pinmux = <PINMUX_GPIO25__FUNC_SDA6>,
  104                                  <PINMUX_GPIO26__FUNC_SCL6>;
  105                         bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
  106                 };
  107         };
  108 
  109         i2c7_pin: i2c7-pins {
  110                 pins {
  111                         pinmux = <PINMUX_GPIO27__FUNC_SCL7>,
  112                                  <PINMUX_GPIO28__FUNC_SDA7>;
  113                         bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
  114                 };
  115         };
  116 
  117         nor_pins_default: nor-pins {
  118                 pins0 {
  119                         pinmux = <PINMUX_GPIO142__FUNC_SPINOR_IO0>,
  120                                  <PINMUX_GPIO141__FUNC_SPINOR_CK>,
  121                                  <PINMUX_GPIO143__FUNC_SPINOR_IO1>;
  122                         bias-pull-down;
  123                 };
  124 
  125                 pins1 {
  126                         pinmux = <PINMUX_GPIO140__FUNC_SPINOR_CS>,
  127                                  <PINMUX_GPIO130__FUNC_SPINOR_IO2>,
  128                                  <PINMUX_GPIO131__FUNC_SPINOR_IO3>;
  129                         bias-pull-up;
  130                 };
  131         };
  132 
  133         uart0_pin: uart0-pins {
  134                 pins {
  135                         pinmux = <PINMUX_GPIO98__FUNC_UTXD0>,
  136                                  <PINMUX_GPIO99__FUNC_URXD0>;
  137                 };
  138         };
  139 };
  140 
  141 &u3phy0 {
  142         status = "okay";
  143 };
  144 
  145 &u3phy1 {
  146         status = "okay";
  147 };
  148 
  149 &u3phy2 {
  150         status = "okay";
  151 };
  152 
  153 &u3phy3 {
  154         status = "okay";
  155 };
  156 
  157 &uart0 {
  158         pinctrl-names = "default";
  159         pinctrl-0 = <&uart0_pin>;
  160         status = "okay";
  161 };
  162 
  163 &xhci0 {
  164         status = "okay";
  165 };
  166 
  167 &xhci1 {
  168         status = "okay";
  169 };
  170 
  171 &xhci2 {
  172         status = "okay";
  173 };
  174 
  175 &xhci3 {
  176         /* This controller is connected with a BT device.
  177          * Disable usb2 lpm to prevent known issues.
  178          */
  179         usb2-lpm-disable;
  180         status = "okay";
  181 };

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FreeBSD/Linux Kernel Cross Reference sys/contrib/device-tree/src/arm64/mediatek/mt8195-evb.dts

FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/src/arm64/mediatek/mt8195-evb.dts