1 // SPDX-License-Identifier: GPL-2.0
2
3 #include <dt-bindings/input/linux-event-codes.h>
4 #include <dt-bindings/input/gpio-keys.h>
5
6 / {
7 bus@0 {
8 aconnect@2900000 {
9 status = "okay";
10
11 dma-controller@2930000 {
12 status = "okay";
13 };
14
15 interrupt-controller@2a40000 {
16 status = "okay";
17 };
18
19 ahub@2900800 {
20 status = "okay";
21
22 ports {
23 #address-cells = <1>;
24 #size-cells = <0>;
25
26 port@0 {
27 reg = <0x0>;
28
29 xbar_admaif0_ep: endpoint {
30 remote-endpoint = <&admaif0_ep>;
31 };
32 };
33
34 port@1 {
35 reg = <0x1>;
36
37 xbar_admaif1_ep: endpoint {
38 remote-endpoint = <&admaif1_ep>;
39 };
40 };
41
42 port@2 {
43 reg = <0x2>;
44
45 xbar_admaif2_ep: endpoint {
46 remote-endpoint = <&admaif2_ep>;
47 };
48 };
49
50 port@3 {
51 reg = <0x3>;
52
53 xbar_admaif3_ep: endpoint {
54 remote-endpoint = <&admaif3_ep>;
55 };
56 };
57
58 port@4 {
59 reg = <0x4>;
60
61 xbar_admaif4_ep: endpoint {
62 remote-endpoint = <&admaif4_ep>;
63 };
64 };
65
66 port@5 {
67 reg = <0x5>;
68
69 xbar_admaif5_ep: endpoint {
70 remote-endpoint = <&admaif5_ep>;
71 };
72 };
73
74 port@6 {
75 reg = <0x6>;
76
77 xbar_admaif6_ep: endpoint {
78 remote-endpoint = <&admaif6_ep>;
79 };
80 };
81
82 port@7 {
83 reg = <0x7>;
84
85 xbar_admaif7_ep: endpoint {
86 remote-endpoint = <&admaif7_ep>;
87 };
88 };
89
90 port@8 {
91 reg = <0x8>;
92
93 xbar_admaif8_ep: endpoint {
94 remote-endpoint = <&admaif8_ep>;
95 };
96 };
97
98 port@9 {
99 reg = <0x9>;
100
101 xbar_admaif9_ep: endpoint {
102 remote-endpoint = <&admaif9_ep>;
103 };
104 };
105
106 port@a {
107 reg = <0xa>;
108
109 xbar_admaif10_ep: endpoint {
110 remote-endpoint = <&admaif10_ep>;
111 };
112 };
113
114 port@b {
115 reg = <0xb>;
116
117 xbar_admaif11_ep: endpoint {
118 remote-endpoint = <&admaif11_ep>;
119 };
120 };
121
122 port@c {
123 reg = <0xc>;
124
125 xbar_admaif12_ep: endpoint {
126 remote-endpoint = <&admaif12_ep>;
127 };
128 };
129
130 port@d {
131 reg = <0xd>;
132
133 xbar_admaif13_ep: endpoint {
134 remote-endpoint = <&admaif13_ep>;
135 };
136 };
137
138 port@e {
139 reg = <0xe>;
140
141 xbar_admaif14_ep: endpoint {
142 remote-endpoint = <&admaif14_ep>;
143 };
144 };
145
146 port@f {
147 reg = <0xf>;
148
149 xbar_admaif15_ep: endpoint {
150 remote-endpoint = <&admaif15_ep>;
151 };
152 };
153
154 port@10 {
155 reg = <0x10>;
156
157 xbar_admaif16_ep: endpoint {
158 remote-endpoint = <&admaif16_ep>;
159 };
160 };
161
162 port@11 {
163 reg = <0x11>;
164
165 xbar_admaif17_ep: endpoint {
166 remote-endpoint = <&admaif17_ep>;
167 };
168 };
169
170 port@12 {
171 reg = <0x12>;
172
173 xbar_admaif18_ep: endpoint {
174 remote-endpoint = <&admaif18_ep>;
175 };
176 };
177
178 port@13 {
179 reg = <0x13>;
180
181 xbar_admaif19_ep: endpoint {
182 remote-endpoint = <&admaif19_ep>;
183 };
184 };
185
186 xbar_i2s3_port: port@16 {
187 reg = <0x16>;
188
189 xbar_i2s3_ep: endpoint {
190 remote-endpoint = <&i2s3_cif_ep>;
191 };
192 };
193
194 xbar_i2s5_port: port@18 {
195 reg = <0x18>;
196
197 xbar_i2s5_ep: endpoint {
198 remote-endpoint = <&i2s5_cif_ep>;
199 };
200 };
201
202 xbar_dmic1_port: port@1a {
203 reg = <0x1a>;
204
205 xbar_dmic1_ep: endpoint {
206 remote-endpoint = <&dmic1_cif_ep>;
207 };
208 };
209
210 xbar_dmic2_port: port@1b {
211 reg = <0x1b>;
212
213 xbar_dmic2_ep: endpoint {
214 remote-endpoint = <&dmic2_cif_ep>;
215 };
216 };
217
218 xbar_dmic4_port: port@1d {
219 reg = <0x1d>;
220
221 xbar_dmic4_ep: endpoint {
222 remote-endpoint = <&dmic4_cif_ep>;
223 };
224 };
225
226 xbar_dspk1_port: port@1e {
227 reg = <0x1e>;
228
229 xbar_dspk1_ep: endpoint {
230 remote-endpoint = <&dspk1_cif_ep>;
231 };
232 };
233
234 xbar_dspk2_port: port@1f {
235 reg = <0x1f>;
236
237 xbar_dspk2_ep: endpoint {
238 remote-endpoint = <&dspk2_cif_ep>;
239 };
240 };
241
242 xbar_sfc1_in_port: port@20 {
243 reg = <0x20>;
244
245 xbar_sfc1_in_ep: endpoint {
246 remote-endpoint = <&sfc1_cif_in_ep>;
247 };
248 };
249
250 port@21 {
251 reg = <0x21>;
252
253 xbar_sfc1_out_ep: endpoint {
254 remote-endpoint = <&sfc1_cif_out_ep>;
255 };
256 };
257
258 xbar_sfc2_in_port: port@22 {
259 reg = <0x22>;
260
261 xbar_sfc2_in_ep: endpoint {
262 remote-endpoint = <&sfc2_cif_in_ep>;
263 };
264 };
265
266 port@23 {
267 reg = <0x23>;
268
269 xbar_sfc2_out_ep: endpoint {
270 remote-endpoint = <&sfc2_cif_out_ep>;
271 };
272 };
273
274 xbar_sfc3_in_port: port@24 {
275 reg = <0x24>;
276
277 xbar_sfc3_in_ep: endpoint {
278 remote-endpoint = <&sfc3_cif_in_ep>;
279 };
280 };
281
282 port@25 {
283 reg = <0x25>;
284
285 xbar_sfc3_out_ep: endpoint {
286 remote-endpoint = <&sfc3_cif_out_ep>;
287 };
288 };
289
290 xbar_sfc4_in_port: port@26 {
291 reg = <0x26>;
292
293 xbar_sfc4_in_ep: endpoint {
294 remote-endpoint = <&sfc4_cif_in_ep>;
295 };
296 };
297
298 port@27 {
299 reg = <0x27>;
300
301 xbar_sfc4_out_ep: endpoint {
302 remote-endpoint = <&sfc4_cif_out_ep>;
303 };
304 };
305
306 xbar_mvc1_in_port: port@28 {
307 reg = <0x28>;
308
309 xbar_mvc1_in_ep: endpoint {
310 remote-endpoint = <&mvc1_cif_in_ep>;
311 };
312 };
313
314 port@29 {
315 reg = <0x29>;
316
317 xbar_mvc1_out_ep: endpoint {
318 remote-endpoint = <&mvc1_cif_out_ep>;
319 };
320 };
321
322 xbar_mvc2_in_port: port@2a {
323 reg = <0x2a>;
324
325 xbar_mvc2_in_ep: endpoint {
326 remote-endpoint = <&mvc2_cif_in_ep>;
327 };
328 };
329
330 port@2b {
331 reg = <0x2b>;
332
333 xbar_mvc2_out_ep: endpoint {
334 remote-endpoint = <&mvc2_cif_out_ep>;
335 };
336 };
337
338 xbar_amx1_in1_port: port@2c {
339 reg = <0x2c>;
340
341 xbar_amx1_in1_ep: endpoint {
342 remote-endpoint = <&amx1_in1_ep>;
343 };
344 };
345
346 xbar_amx1_in2_port: port@2d {
347 reg = <0x2d>;
348
349 xbar_amx1_in2_ep: endpoint {
350 remote-endpoint = <&amx1_in2_ep>;
351 };
352 };
353
354 xbar_amx1_in3_port: port@2e {
355 reg = <0x2e>;
356
357 xbar_amx1_in3_ep: endpoint {
358 remote-endpoint = <&amx1_in3_ep>;
359 };
360 };
361
362 xbar_amx1_in4_port: port@2f {
363 reg = <0x2f>;
364
365 xbar_amx1_in4_ep: endpoint {
366 remote-endpoint = <&amx1_in4_ep>;
367 };
368 };
369
370 port@30 {
371 reg = <0x30>;
372
373 xbar_amx1_out_ep: endpoint {
374 remote-endpoint = <&amx1_out_ep>;
375 };
376 };
377
378 xbar_amx2_in1_port: port@31 {
379 reg = <0x31>;
380
381 xbar_amx2_in1_ep: endpoint {
382 remote-endpoint = <&amx2_in1_ep>;
383 };
384 };
385
386 xbar_amx2_in2_port: port@32 {
387 reg = <0x32>;
388
389 xbar_amx2_in2_ep: endpoint {
390 remote-endpoint = <&amx2_in2_ep>;
391 };
392 };
393
394 xbar_amx2_in3_port: port@33 {
395 reg = <0x33>;
396
397 xbar_amx2_in3_ep: endpoint {
398 remote-endpoint = <&amx2_in3_ep>;
399 };
400 };
401
402 xbar_amx2_in4_port: port@34 {
403 reg = <0x34>;
404
405 xbar_amx2_in4_ep: endpoint {
406 remote-endpoint = <&amx2_in4_ep>;
407 };
408 };
409
410 port@35 {
411 reg = <0x35>;
412
413 xbar_amx2_out_ep: endpoint {
414 remote-endpoint = <&amx2_out_ep>;
415 };
416 };
417
418 xbar_amx3_in1_port: port@36 {
419 reg = <0x36>;
420
421 xbar_amx3_in1_ep: endpoint {
422 remote-endpoint = <&amx3_in1_ep>;
423 };
424 };
425
426 xbar_amx3_in2_port: port@37 {
427 reg = <0x37>;
428
429 xbar_amx3_in2_ep: endpoint {
430 remote-endpoint = <&amx3_in2_ep>;
431 };
432 };
433
434 xbar_amx3_in3_port: port@38 {
435 reg = <0x38>;
436
437 xbar_amx3_in3_ep: endpoint {
438 remote-endpoint = <&amx3_in3_ep>;
439 };
440 };
441
442 xbar_amx3_in4_port: port@39 {
443 reg = <0x39>;
444
445 xbar_amx3_in4_ep: endpoint {
446 remote-endpoint = <&amx3_in4_ep>;
447 };
448 };
449
450 port@3a {
451 reg = <0x3a>;
452
453 xbar_amx3_out_ep: endpoint {
454 remote-endpoint = <&amx3_out_ep>;
455 };
456 };
457
458 xbar_amx4_in1_port: port@3b {
459 reg = <0x3b>;
460
461 xbar_amx4_in1_ep: endpoint {
462 remote-endpoint = <&amx4_in1_ep>;
463 };
464 };
465
466 xbar_amx4_in2_port: port@3c {
467 reg = <0x3c>;
468
469 xbar_amx4_in2_ep: endpoint {
470 remote-endpoint = <&amx4_in2_ep>;
471 };
472 };
473
474 xbar_amx4_in3_port: port@3d {
475 reg = <0x3d>;
476
477 xbar_amx4_in3_ep: endpoint {
478 remote-endpoint = <&amx4_in3_ep>;
479 };
480 };
481
482 xbar_amx4_in4_port: port@3e {
483 reg = <0x3e>;
484
485 xbar_amx4_in4_ep: endpoint {
486 remote-endpoint = <&amx4_in4_ep>;
487 };
488 };
489
490 port@3f {
491 reg = <0x3f>;
492
493 xbar_amx4_out_ep: endpoint {
494 remote-endpoint = <&amx4_out_ep>;
495 };
496 };
497
498 xbar_adx1_in_port: port@40 {
499 reg = <0x40>;
500
501 xbar_adx1_in_ep: endpoint {
502 remote-endpoint = <&adx1_in_ep>;
503 };
504 };
505
506 port@41 {
507 reg = <0x41>;
508
509 xbar_adx1_out1_ep: endpoint {
510 remote-endpoint = <&adx1_out1_ep>;
511 };
512 };
513
514 port@42 {
515 reg = <0x42>;
516
517 xbar_adx1_out2_ep: endpoint {
518 remote-endpoint = <&adx1_out2_ep>;
519 };
520 };
521
522 port@43 {
523 reg = <0x43>;
524
525 xbar_adx1_out3_ep: endpoint {
526 remote-endpoint = <&adx1_out3_ep>;
527 };
528 };
529
530 port@44 {
531 reg = <0x44>;
532
533 xbar_adx1_out4_ep: endpoint {
534 remote-endpoint = <&adx1_out4_ep>;
535 };
536 };
537
538 xbar_adx2_in_port: port@45 {
539 reg = <0x45>;
540
541 xbar_adx2_in_ep: endpoint {
542 remote-endpoint = <&adx2_in_ep>;
543 };
544 };
545
546 port@46 {
547 reg = <0x46>;
548
549 xbar_adx2_out1_ep: endpoint {
550 remote-endpoint = <&adx2_out1_ep>;
551 };
552 };
553
554 port@47 {
555 reg = <0x47>;
556
557 xbar_adx2_out2_ep: endpoint {
558 remote-endpoint = <&adx2_out2_ep>;
559 };
560 };
561
562 port@48 {
563 reg = <0x48>;
564
565 xbar_adx2_out3_ep: endpoint {
566 remote-endpoint = <&adx2_out3_ep>;
567 };
568 };
569
570 port@49 {
571 reg = <0x49>;
572
573 xbar_adx2_out4_ep: endpoint {
574 remote-endpoint = <&adx2_out4_ep>;
575 };
576 };
577
578 xbar_adx3_in_port: port@4a {
579 reg = <0x4a>;
580
581 xbar_adx3_in_ep: endpoint {
582 remote-endpoint = <&adx3_in_ep>;
583 };
584 };
585
586 port@4b {
587 reg = <0x4b>;
588
589 xbar_adx3_out1_ep: endpoint {
590 remote-endpoint = <&adx3_out1_ep>;
591 };
592 };
593
594 port@4c {
595 reg = <0x4c>;
596
597 xbar_adx3_out2_ep: endpoint {
598 remote-endpoint = <&adx3_out2_ep>;
599 };
600 };
601
602 port@4d {
603 reg = <0x4d>;
604
605 xbar_adx3_out3_ep: endpoint {
606 remote-endpoint = <&adx3_out3_ep>;
607 };
608 };
609
610 port@4e {
611 reg = <0x4e>;
612
613 xbar_adx3_out4_ep: endpoint {
614 remote-endpoint = <&adx3_out4_ep>;
615 };
616 };
617
618 xbar_adx4_in_port: port@4f {
619 reg = <0x4f>;
620
621 xbar_adx4_in_ep: endpoint {
622 remote-endpoint = <&adx4_in_ep>;
623 };
624 };
625
626 port@50 {
627 reg = <0x50>;
628
629 xbar_adx4_out1_ep: endpoint {
630 remote-endpoint = <&adx4_out1_ep>;
631 };
632 };
633
634 port@51 {
635 reg = <0x51>;
636
637 xbar_adx4_out2_ep: endpoint {
638 remote-endpoint = <&adx4_out2_ep>;
639 };
640 };
641
642 port@52 {
643 reg = <0x52>;
644
645 xbar_adx4_out3_ep: endpoint {
646 remote-endpoint = <&adx4_out3_ep>;
647 };
648 };
649
650 port@53 {
651 reg = <0x53>;
652
653 xbar_adx4_out4_ep: endpoint {
654 remote-endpoint = <&adx4_out4_ep>;
655 };
656 };
657
658 xbar_mixer_in1_port: port@54 {
659 reg = <0x54>;
660
661 xbar_mixer_in1_ep: endpoint {
662 remote-endpoint = <&mixer_in1_ep>;
663 };
664 };
665
666 xbar_mixer_in2_port: port@55 {
667 reg = <0x55>;
668
669 xbar_mixer_in2_ep: endpoint {
670 remote-endpoint = <&mixer_in2_ep>;
671 };
672 };
673
674 xbar_mixer_in3_port: port@56 {
675 reg = <0x56>;
676
677 xbar_mixer_in3_ep: endpoint {
678 remote-endpoint = <&mixer_in3_ep>;
679 };
680 };
681
682 xbar_mixer_in4_port: port@57 {
683 reg = <0x57>;
684
685 xbar_mixer_in4_ep: endpoint {
686 remote-endpoint = <&mixer_in4_ep>;
687 };
688 };
689
690 xbar_mixer_in5_port: port@58 {
691 reg = <0x58>;
692
693 xbar_mixer_in5_ep: endpoint {
694 remote-endpoint = <&mixer_in5_ep>;
695 };
696 };
697
698 xbar_mixer_in6_port: port@59 {
699 reg = <0x59>;
700
701 xbar_mixer_in6_ep: endpoint {
702 remote-endpoint = <&mixer_in6_ep>;
703 };
704 };
705
706 xbar_mixer_in7_port: port@5a {
707 reg = <0x5a>;
708
709 xbar_mixer_in7_ep: endpoint {
710 remote-endpoint = <&mixer_in7_ep>;
711 };
712 };
713
714 xbar_mixer_in8_port: port@5b {
715 reg = <0x5b>;
716
717 xbar_mixer_in8_ep: endpoint {
718 remote-endpoint = <&mixer_in8_ep>;
719 };
720 };
721
722 xbar_mixer_in9_port: port@5c {
723 reg = <0x5c>;
724
725 xbar_mixer_in9_ep: endpoint {
726 remote-endpoint = <&mixer_in9_ep>;
727 };
728 };
729
730 xbar_mixer_in10_port: port@5d {
731 reg = <0x5d>;
732
733 xbar_mixer_in10_ep: endpoint {
734 remote-endpoint = <&mixer_in10_ep>;
735 };
736 };
737
738 port@5e {
739 reg = <0x5e>;
740
741 xbar_mixer_out1_ep: endpoint {
742 remote-endpoint = <&mixer_out1_ep>;
743 };
744 };
745
746 port@5f {
747 reg = <0x5f>;
748
749 xbar_mixer_out2_ep: endpoint {
750 remote-endpoint = <&mixer_out2_ep>;
751 };
752 };
753
754 port@60 {
755 reg = <0x60>;
756
757 xbar_mixer_out3_ep: endpoint {
758 remote-endpoint = <&mixer_out3_ep>;
759 };
760 };
761
762 port@61 {
763 reg = <0x61>;
764
765 xbar_mixer_out4_ep: endpoint {
766 remote-endpoint = <&mixer_out4_ep>;
767 };
768 };
769
770 port@62 {
771 reg = <0x62>;
772
773 xbar_mixer_out5_ep: endpoint {
774 remote-endpoint = <&mixer_out5_ep>;
775 };
776 };
777
778 xbar_asrc_in1_port: port@63 {
779 reg = <0x63>;
780
781 xbar_asrc_in1_ep: endpoint {
782 remote-endpoint = <&asrc_in1_ep>;
783 };
784 };
785
786 port@64 {
787 reg = <0x64>;
788
789 xbar_asrc_out1_ep: endpoint {
790 remote-endpoint = <&asrc_out1_ep>;
791 };
792 };
793
794 xbar_asrc_in2_port: port@65 {
795 reg = <0x65>;
796
797 xbar_asrc_in2_ep: endpoint {
798 remote-endpoint = <&asrc_in2_ep>;
799 };
800 };
801
802 port@66 {
803 reg = <0x66>;
804
805 xbar_asrc_out2_ep: endpoint {
806 remote-endpoint = <&asrc_out2_ep>;
807 };
808 };
809
810 xbar_asrc_in3_port: port@67 {
811 reg = <0x67>;
812
813 xbar_asrc_in3_ep: endpoint {
814 remote-endpoint = <&asrc_in3_ep>;
815 };
816 };
817
818 port@68 {
819 reg = <0x68>;
820
821 xbar_asrc_out3_ep: endpoint {
822 remote-endpoint = <&asrc_out3_ep>;
823 };
824 };
825
826 xbar_asrc_in4_port: port@69 {
827 reg = <0x69>;
828
829 xbar_asrc_in4_ep: endpoint {
830 remote-endpoint = <&asrc_in4_ep>;
831 };
832 };
833
834 port@6a {
835 reg = <0x6a>;
836
837 xbar_asrc_out4_ep: endpoint {
838 remote-endpoint = <&asrc_out4_ep>;
839 };
840 };
841
842 xbar_asrc_in5_port: port@6b {
843 reg = <0x6b>;
844
845 xbar_asrc_in5_ep: endpoint {
846 remote-endpoint = <&asrc_in5_ep>;
847 };
848 };
849
850 port@6c {
851 reg = <0x6c>;
852
853 xbar_asrc_out5_ep: endpoint {
854 remote-endpoint = <&asrc_out5_ep>;
855 };
856 };
857
858 xbar_asrc_in6_port: port@6d {
859 reg = <0x6d>;
860
861 xbar_asrc_in6_ep: endpoint {
862 remote-endpoint = <&asrc_in6_ep>;
863 };
864 };
865
866 port@6e {
867 reg = <0x6e>;
868
869 xbar_asrc_out6_ep: endpoint {
870 remote-endpoint = <&asrc_out6_ep>;
871 };
872 };
873
874 xbar_asrc_in7_port: port@6f {
875 reg = <0x6f>;
876
877 xbar_asrc_in7_ep: endpoint {
878 remote-endpoint = <&asrc_in7_ep>;
879 };
880 };
881
882 xbar_ope1_in_port: port@70 {
883 reg = <0x70>;
884
885 xbar_ope1_in_ep: endpoint {
886 remote-endpoint = <&ope1_cif_in_ep>;
887 };
888 };
889
890 port@71 {
891 reg = <0x71>;
892
893 xbar_ope1_out_ep: endpoint {
894 remote-endpoint = <&ope1_cif_out_ep>;
895 };
896 };
897 };
898
899 admaif@290f000 {
900 status = "okay";
901
902 ports {
903 #address-cells = <1>;
904 #size-cells = <0>;
905
906 admaif0_port: port@0 {
907 reg = <0x0>;
908
909 admaif0_ep: endpoint {
910 remote-endpoint = <&xbar_admaif0_ep>;
911 };
912 };
913
914 admaif1_port: port@1 {
915 reg = <0x1>;
916
917 admaif1_ep: endpoint {
918 remote-endpoint = <&xbar_admaif1_ep>;
919 };
920 };
921
922 admaif2_port: port@2 {
923 reg = <0x2>;
924
925 admaif2_ep: endpoint {
926 remote-endpoint = <&xbar_admaif2_ep>;
927 };
928 };
929
930 admaif3_port: port@3 {
931 reg = <0x3>;
932
933 admaif3_ep: endpoint {
934 remote-endpoint = <&xbar_admaif3_ep>;
935 };
936 };
937
938 admaif4_port: port@4 {
939 reg = <0x4>;
940
941 admaif4_ep: endpoint {
942 remote-endpoint = <&xbar_admaif4_ep>;
943 };
944 };
945
946 admaif5_port: port@5 {
947 reg = <0x5>;
948
949 admaif5_ep: endpoint {
950 remote-endpoint = <&xbar_admaif5_ep>;
951 };
952 };
953
954 admaif6_port: port@6 {
955 reg = <0x6>;
956
957 admaif6_ep: endpoint {
958 remote-endpoint = <&xbar_admaif6_ep>;
959 };
960 };
961
962 admaif7_port: port@7 {
963 reg = <0x7>;
964
965 admaif7_ep: endpoint {
966 remote-endpoint = <&xbar_admaif7_ep>;
967 };
968 };
969
970 admaif8_port: port@8 {
971 reg = <0x8>;
972
973 admaif8_ep: endpoint {
974 remote-endpoint = <&xbar_admaif8_ep>;
975 };
976 };
977
978 admaif9_port: port@9 {
979 reg = <0x9>;
980
981 admaif9_ep: endpoint {
982 remote-endpoint = <&xbar_admaif9_ep>;
983 };
984 };
985
986 admaif10_port: port@a {
987 reg = <0xa>;
988
989 admaif10_ep: endpoint {
990 remote-endpoint = <&xbar_admaif10_ep>;
991 };
992 };
993
994 admaif11_port: port@b {
995 reg = <0xb>;
996
997 admaif11_ep: endpoint {
998 remote-endpoint = <&xbar_admaif11_ep>;
999 };
1000 };
1001
1002 admaif12_port: port@c {
1003 reg = <0xc>;
1004
1005 admaif12_ep: endpoint {
1006 remote-endpoint = <&xbar_admaif12_ep>;
1007 };
1008 };
1009
1010 admaif13_port: port@d {
1011 reg = <0xd>;
1012
1013 admaif13_ep: endpoint {
1014 remote-endpoint = <&xbar_admaif13_ep>;
1015 };
1016 };
1017
1018 admaif14_port: port@e {
1019 reg = <0xe>;
1020
1021 admaif14_ep: endpoint {
1022 remote-endpoint = <&xbar_admaif14_ep>;
1023 };
1024 };
1025
1026 admaif15_port: port@f {
1027 reg = <0xf>;
1028
1029 admaif15_ep: endpoint {
1030 remote-endpoint = <&xbar_admaif15_ep>;
1031 };
1032 };
1033
1034 admaif16_port: port@10 {
1035 reg = <0x10>;
1036
1037 admaif16_ep: endpoint {
1038 remote-endpoint = <&xbar_admaif16_ep>;
1039 };
1040 };
1041
1042 admaif17_port: port@11 {
1043 reg = <0x11>;
1044
1045 admaif17_ep: endpoint {
1046 remote-endpoint = <&xbar_admaif17_ep>;
1047 };
1048 };
1049
1050 admaif18_port: port@12 {
1051 reg = <0x12>;
1052
1053 admaif18_ep: endpoint {
1054 remote-endpoint = <&xbar_admaif18_ep>;
1055 };
1056 };
1057
1058 admaif19_port: port@13 {
1059 reg = <0x13>;
1060
1061 admaif19_ep: endpoint {
1062 remote-endpoint = <&xbar_admaif19_ep>;
1063 };
1064 };
1065 };
1066 };
1067
1068 i2s@2901200 {
1069 status = "okay";
1070
1071 ports {
1072 #address-cells = <1>;
1073 #size-cells = <0>;
1074
1075 port@0 {
1076 reg = <0>;
1077
1078 i2s3_cif_ep: endpoint {
1079 remote-endpoint = <&xbar_i2s3_ep>;
1080 };
1081 };
1082
1083 i2s3_port: port@1 {
1084 reg = <1>;
1085
1086 i2s3_dap_ep: endpoint {
1087 dai-format = "i2s";
1088 /* Place holder for external Codec */
1089 };
1090 };
1091 };
1092 };
1093
1094 i2s@2901400 {
1095 status = "okay";
1096
1097 ports {
1098 #address-cells = <1>;
1099 #size-cells = <0>;
1100
1101 port@0 {
1102 reg = <0>;
1103
1104 i2s5_cif_ep: endpoint {
1105 remote-endpoint = <&xbar_i2s5_ep>;
1106 };
1107 };
1108
1109 i2s5_port: port@1 {
1110 reg = <1>;
1111
1112 i2s5_dap_ep: endpoint {
1113 dai-format = "i2s";
1114 /* Place holder for external Codec */
1115 };
1116 };
1117 };
1118 };
1119
1120 dmic@2904000 {
1121 status = "okay";
1122
1123 ports {
1124 #address-cells = <1>;
1125 #size-cells = <0>;
1126
1127 port@0 {
1128 reg = <0>;
1129
1130 dmic1_cif_ep: endpoint {
1131 remote-endpoint = <&xbar_dmic1_ep>;
1132 };
1133 };
1134
1135 dmic1_port: port@1 {
1136 reg = <1>;
1137
1138 dmic1_dap_ep: endpoint {
1139 /* Place holder for external Codec */
1140 };
1141 };
1142 };
1143 };
1144
1145 dmic@2904100 {
1146 status = "okay";
1147
1148 ports {
1149 #address-cells = <1>;
1150 #size-cells = <0>;
1151
1152 port@0 {
1153 reg = <0>;
1154
1155 dmic2_cif_ep: endpoint {
1156 remote-endpoint = <&xbar_dmic2_ep>;
1157 };
1158 };
1159
1160 dmic2_port: port@1 {
1161 reg = <1>;
1162
1163 dmic2_dap_ep: endpoint {
1164 /* Place holder for external Codec */
1165 };
1166 };
1167 };
1168 };
1169
1170 dmic@2904300 {
1171 status = "okay";
1172
1173 ports {
1174 #address-cells = <1>;
1175 #size-cells = <0>;
1176
1177 port@0 {
1178 reg = <0>;
1179
1180 dmic4_cif_ep: endpoint {
1181 remote-endpoint = <&xbar_dmic4_ep>;
1182 };
1183 };
1184
1185 dmic4_port: port@1 {
1186 reg = <1>;
1187
1188 dmic4_dap_ep: endpoint {
1189 /* Place holder for external Codec */
1190 };
1191 };
1192 };
1193 };
1194
1195 dspk@2905000 {
1196 status = "okay";
1197
1198 ports {
1199 #address-cells = <1>;
1200 #size-cells = <0>;
1201
1202 port@0 {
1203 reg = <0>;
1204
1205 dspk1_cif_ep: endpoint {
1206 remote-endpoint = <&xbar_dspk1_ep>;
1207 };
1208 };
1209
1210 dspk1_port: port@1 {
1211 reg = <1>;
1212
1213 dspk1_dap_ep: endpoint {
1214 /* Place holder for external Codec */
1215 };
1216 };
1217 };
1218 };
1219
1220 dspk@2905100 {
1221 status = "okay";
1222
1223 ports {
1224 #address-cells = <1>;
1225 #size-cells = <0>;
1226
1227 port@0 {
1228 reg = <0>;
1229
1230 dspk2_cif_ep: endpoint {
1231 remote-endpoint = <&xbar_dspk2_ep>;
1232 };
1233 };
1234
1235 dspk2_port: port@1 {
1236 reg = <1>;
1237
1238 dspk2_dap_ep: endpoint {
1239 /* Place holder for external Codec */
1240 };
1241 };
1242 };
1243 };
1244
1245 sfc@2902000 {
1246 status = "okay";
1247
1248 ports {
1249 #address-cells = <1>;
1250 #size-cells = <0>;
1251
1252 port@0 {
1253 reg = <0>;
1254
1255 sfc1_cif_in_ep: endpoint {
1256 remote-endpoint = <&xbar_sfc1_in_ep>;
1257 convert-rate = <44100>;
1258 };
1259 };
1260
1261 sfc1_out_port: port@1 {
1262 reg = <1>;
1263
1264 sfc1_cif_out_ep: endpoint {
1265 remote-endpoint = <&xbar_sfc1_out_ep>;
1266 convert-rate = <48000>;
1267 };
1268 };
1269 };
1270 };
1271
1272 sfc@2902200 {
1273 status = "okay";
1274
1275 ports {
1276 #address-cells = <1>;
1277 #size-cells = <0>;
1278
1279 port@0 {
1280 reg = <0>;
1281
1282 sfc2_cif_in_ep: endpoint {
1283 remote-endpoint = <&xbar_sfc2_in_ep>;
1284 };
1285 };
1286
1287 sfc2_out_port: port@1 {
1288 reg = <1>;
1289
1290 sfc2_cif_out_ep: endpoint {
1291 remote-endpoint = <&xbar_sfc2_out_ep>;
1292 };
1293 };
1294 };
1295 };
1296
1297 sfc@2902400 {
1298 status = "okay";
1299
1300 ports {
1301 #address-cells = <1>;
1302 #size-cells = <0>;
1303
1304 port@0 {
1305 reg = <0>;
1306
1307 sfc3_cif_in_ep: endpoint {
1308 remote-endpoint = <&xbar_sfc3_in_ep>;
1309 };
1310 };
1311
1312 sfc3_out_port: port@1 {
1313 reg = <1>;
1314
1315 sfc3_cif_out_ep: endpoint {
1316 remote-endpoint = <&xbar_sfc3_out_ep>;
1317 };
1318 };
1319 };
1320 };
1321
1322 sfc@2902600 {
1323 status = "okay";
1324
1325 ports {
1326 #address-cells = <1>;
1327 #size-cells = <0>;
1328
1329 port@0 {
1330 reg = <0>;
1331
1332 sfc4_cif_in_ep: endpoint {
1333 remote-endpoint = <&xbar_sfc4_in_ep>;
1334 };
1335 };
1336
1337 sfc4_out_port: port@1 {
1338 reg = <1>;
1339
1340 sfc4_cif_out_ep: endpoint {
1341 remote-endpoint = <&xbar_sfc4_out_ep>;
1342 };
1343 };
1344 };
1345 };
1346
1347 mvc@290a000 {
1348 status = "okay";
1349
1350 ports {
1351 #address-cells = <1>;
1352 #size-cells = <0>;
1353
1354 port@0 {
1355 reg = <0>;
1356
1357 mvc1_cif_in_ep: endpoint {
1358 remote-endpoint = <&xbar_mvc1_in_ep>;
1359 };
1360 };
1361
1362 mvc1_out_port: port@1 {
1363 reg = <1>;
1364
1365 mvc1_cif_out_ep: endpoint {
1366 remote-endpoint = <&xbar_mvc1_out_ep>;
1367 };
1368 };
1369 };
1370 };
1371
1372 mvc@290a200 {
1373 status = "okay";
1374
1375 ports {
1376 #address-cells = <1>;
1377 #size-cells = <0>;
1378
1379 port@0 {
1380 reg = <0>;
1381
1382 mvc2_cif_in_ep: endpoint {
1383 remote-endpoint = <&xbar_mvc2_in_ep>;
1384 };
1385 };
1386
1387 mvc2_out_port: port@1 {
1388 reg = <1>;
1389
1390 mvc2_cif_out_ep: endpoint {
1391 remote-endpoint = <&xbar_mvc2_out_ep>;
1392 };
1393 };
1394 };
1395 };
1396
1397 amx@2903000 {
1398 status = "okay";
1399
1400 ports {
1401 #address-cells = <1>;
1402 #size-cells = <0>;
1403
1404 port@0 {
1405 reg = <0>;
1406
1407 amx1_in1_ep: endpoint {
1408 remote-endpoint = <&xbar_amx1_in1_ep>;
1409 };
1410 };
1411
1412 port@1 {
1413 reg = <1>;
1414
1415 amx1_in2_ep: endpoint {
1416 remote-endpoint = <&xbar_amx1_in2_ep>;
1417 };
1418 };
1419
1420 port@2 {
1421 reg = <2>;
1422
1423 amx1_in3_ep: endpoint {
1424 remote-endpoint = <&xbar_amx1_in3_ep>;
1425 };
1426 };
1427
1428 port@3 {
1429 reg = <3>;
1430
1431 amx1_in4_ep: endpoint {
1432 remote-endpoint = <&xbar_amx1_in4_ep>;
1433 };
1434 };
1435
1436 amx1_out_port: port@4 {
1437 reg = <4>;
1438
1439 amx1_out_ep: endpoint {
1440 remote-endpoint = <&xbar_amx1_out_ep>;
1441 };
1442 };
1443 };
1444 };
1445
1446 amx@2903100 {
1447 status = "okay";
1448
1449 ports {
1450 #address-cells = <1>;
1451 #size-cells = <0>;
1452
1453 port@0 {
1454 reg = <0>;
1455
1456 amx2_in1_ep: endpoint {
1457 remote-endpoint = <&xbar_amx2_in1_ep>;
1458 };
1459 };
1460
1461 port@1 {
1462 reg = <1>;
1463
1464 amx2_in2_ep: endpoint {
1465 remote-endpoint = <&xbar_amx2_in2_ep>;
1466 };
1467 };
1468
1469 amx2_in3_port: port@2 {
1470 reg = <2>;
1471
1472 amx2_in3_ep: endpoint {
1473 remote-endpoint = <&xbar_amx2_in3_ep>;
1474 };
1475 };
1476
1477 amx2_in4_port: port@3 {
1478 reg = <3>;
1479
1480 amx2_in4_ep: endpoint {
1481 remote-endpoint = <&xbar_amx2_in4_ep>;
1482 };
1483 };
1484
1485 amx2_out_port: port@4 {
1486 reg = <4>;
1487
1488 amx2_out_ep: endpoint {
1489 remote-endpoint = <&xbar_amx2_out_ep>;
1490 };
1491 };
1492 };
1493 };
1494
1495 amx@2903200 {
1496 status = "okay";
1497
1498 ports {
1499 #address-cells = <1>;
1500 #size-cells = <0>;
1501
1502 port@0 {
1503 reg = <0>;
1504
1505 amx3_in1_ep: endpoint {
1506 remote-endpoint = <&xbar_amx3_in1_ep>;
1507 };
1508 };
1509
1510 port@1 {
1511 reg = <1>;
1512
1513 amx3_in2_ep: endpoint {
1514 remote-endpoint = <&xbar_amx3_in2_ep>;
1515 };
1516 };
1517
1518 port@2 {
1519 reg = <2>;
1520
1521 amx3_in3_ep: endpoint {
1522 remote-endpoint = <&xbar_amx3_in3_ep>;
1523 };
1524 };
1525
1526 port@3 {
1527 reg = <3>;
1528
1529 amx3_in4_ep: endpoint {
1530 remote-endpoint = <&xbar_amx3_in4_ep>;
1531 };
1532 };
1533
1534 amx3_out_port: port@4 {
1535 reg = <4>;
1536
1537 amx3_out_ep: endpoint {
1538 remote-endpoint = <&xbar_amx3_out_ep>;
1539 };
1540 };
1541 };
1542 };
1543
1544 amx@2903300 {
1545 status = "okay";
1546
1547 ports {
1548 #address-cells = <1>;
1549 #size-cells = <0>;
1550
1551 port@0 {
1552 reg = <0>;
1553
1554 amx4_in1_ep: endpoint {
1555 remote-endpoint = <&xbar_amx4_in1_ep>;
1556 };
1557 };
1558
1559 port@1 {
1560 reg = <1>;
1561
1562 amx4_in2_ep: endpoint {
1563 remote-endpoint = <&xbar_amx4_in2_ep>;
1564 };
1565 };
1566
1567 port@2 {
1568 reg = <2>;
1569
1570 amx4_in3_ep: endpoint {
1571 remote-endpoint = <&xbar_amx4_in3_ep>;
1572 };
1573 };
1574
1575 port@3 {
1576 reg = <3>;
1577
1578 amx4_in4_ep: endpoint {
1579 remote-endpoint = <&xbar_amx4_in4_ep>;
1580 };
1581 };
1582
1583 amx4_out_port: port@4 {
1584 reg = <4>;
1585
1586 amx4_out_ep: endpoint {
1587 remote-endpoint = <&xbar_amx4_out_ep>;
1588 };
1589 };
1590 };
1591 };
1592
1593 adx@2903800 {
1594 status = "okay";
1595
1596 ports {
1597 #address-cells = <1>;
1598 #size-cells = <0>;
1599
1600 port@0 {
1601 reg = <0>;
1602
1603 adx1_in_ep: endpoint {
1604 remote-endpoint = <&xbar_adx1_in_ep>;
1605 };
1606 };
1607
1608 adx1_out1_port: port@1 {
1609 reg = <1>;
1610
1611 adx1_out1_ep: endpoint {
1612 remote-endpoint = <&xbar_adx1_out1_ep>;
1613 };
1614 };
1615
1616 adx1_out2_port: port@2 {
1617 reg = <2>;
1618
1619 adx1_out2_ep: endpoint {
1620 remote-endpoint = <&xbar_adx1_out2_ep>;
1621 };
1622 };
1623
1624 adx1_out3_port: port@3 {
1625 reg = <3>;
1626
1627 adx1_out3_ep: endpoint {
1628 remote-endpoint = <&xbar_adx1_out3_ep>;
1629 };
1630 };
1631
1632 adx1_out4_port: port@4 {
1633 reg = <4>;
1634
1635 adx1_out4_ep: endpoint {
1636 remote-endpoint = <&xbar_adx1_out4_ep>;
1637 };
1638 };
1639 };
1640 };
1641
1642 adx@2903900 {
1643 status = "okay";
1644
1645 ports {
1646 #address-cells = <1>;
1647 #size-cells = <0>;
1648
1649 port@0 {
1650 reg = <0>;
1651
1652 adx2_in_ep: endpoint {
1653 remote-endpoint = <&xbar_adx2_in_ep>;
1654 };
1655 };
1656
1657 adx2_out1_port: port@1 {
1658 reg = <1>;
1659
1660 adx2_out1_ep: endpoint {
1661 remote-endpoint = <&xbar_adx2_out1_ep>;
1662 };
1663 };
1664
1665 adx2_out2_port: port@2 {
1666 reg = <2>;
1667
1668 adx2_out2_ep: endpoint {
1669 remote-endpoint = <&xbar_adx2_out2_ep>;
1670 };
1671 };
1672
1673 adx2_out3_port: port@3 {
1674 reg = <3>;
1675
1676 adx2_out3_ep: endpoint {
1677 remote-endpoint = <&xbar_adx2_out3_ep>;
1678 };
1679 };
1680
1681 adx2_out4_port: port@4 {
1682 reg = <4>;
1683
1684 adx2_out4_ep: endpoint {
1685 remote-endpoint = <&xbar_adx2_out4_ep>;
1686 };
1687 };
1688 };
1689 };
1690
1691 adx@2903a00 {
1692 status = "okay";
1693
1694 ports {
1695 #address-cells = <1>;
1696 #size-cells = <0>;
1697
1698 port@0 {
1699 reg = <0>;
1700
1701 adx3_in_ep: endpoint {
1702 remote-endpoint = <&xbar_adx3_in_ep>;
1703 };
1704 };
1705
1706 adx3_out1_port: port@1 {
1707 reg = <1>;
1708
1709 adx3_out1_ep: endpoint {
1710 remote-endpoint = <&xbar_adx3_out1_ep>;
1711 };
1712 };
1713
1714 adx3_out2_port: port@2 {
1715 reg = <2>;
1716
1717 adx3_out2_ep: endpoint {
1718 remote-endpoint = <&xbar_adx3_out2_ep>;
1719 };
1720 };
1721
1722 adx3_out3_port: port@3 {
1723 reg = <3>;
1724
1725 adx3_out3_ep: endpoint {
1726 remote-endpoint = <&xbar_adx3_out3_ep>;
1727 };
1728 };
1729
1730 adx3_out4_port: port@4 {
1731 reg = <4>;
1732
1733 adx3_out4_ep: endpoint {
1734 remote-endpoint = <&xbar_adx3_out4_ep>;
1735 };
1736 };
1737 };
1738 };
1739
1740 adx@2903b00 {
1741 status = "okay";
1742
1743 ports {
1744 #address-cells = <1>;
1745 #size-cells = <0>;
1746
1747 port@0 {
1748 reg = <0>;
1749
1750 adx4_in_ep: endpoint {
1751 remote-endpoint = <&xbar_adx4_in_ep>;
1752 };
1753 };
1754
1755 adx4_out1_port: port@1 {
1756 reg = <1>;
1757
1758 adx4_out1_ep: endpoint {
1759 remote-endpoint = <&xbar_adx4_out1_ep>;
1760 };
1761 };
1762
1763 adx4_out2_port: port@2 {
1764 reg = <2>;
1765
1766 adx4_out2_ep: endpoint {
1767 remote-endpoint = <&xbar_adx4_out2_ep>;
1768 };
1769 };
1770
1771 adx4_out3_port: port@3 {
1772 reg = <3>;
1773
1774 adx4_out3_ep: endpoint {
1775 remote-endpoint = <&xbar_adx4_out3_ep>;
1776 };
1777 };
1778
1779 adx4_out4_port: port@4 {
1780 reg = <4>;
1781
1782 adx4_out4_ep: endpoint {
1783 remote-endpoint = <&xbar_adx4_out4_ep>;
1784 };
1785 };
1786 };
1787 };
1788
1789 processing-engine@2908000 {
1790 status = "okay";
1791
1792 ports {
1793 #address-cells = <1>;
1794 #size-cells = <0>;
1795
1796 port@0 {
1797 reg = <0x0>;
1798
1799 ope1_cif_in_ep: endpoint {
1800 remote-endpoint = <&xbar_ope1_in_ep>;
1801 };
1802 };
1803
1804 ope1_out_port: port@1 {
1805 reg = <0x1>;
1806
1807 ope1_cif_out_ep: endpoint {
1808 remote-endpoint = <&xbar_ope1_out_ep>;
1809 };
1810 };
1811 };
1812 };
1813
1814 amixer@290bb00 {
1815 status = "okay";
1816
1817 ports {
1818 #address-cells = <1>;
1819 #size-cells = <0>;
1820
1821 port@0 {
1822 reg = <0x0>;
1823
1824 mixer_in1_ep: endpoint {
1825 remote-endpoint = <&xbar_mixer_in1_ep>;
1826 };
1827 };
1828
1829 port@1 {
1830 reg = <0x1>;
1831
1832 mixer_in2_ep: endpoint {
1833 remote-endpoint = <&xbar_mixer_in2_ep>;
1834 };
1835 };
1836
1837 port@2 {
1838 reg = <0x2>;
1839
1840 mixer_in3_ep: endpoint {
1841 remote-endpoint = <&xbar_mixer_in3_ep>;
1842 };
1843 };
1844
1845 port@3 {
1846 reg = <0x3>;
1847
1848 mixer_in4_ep: endpoint {
1849 remote-endpoint = <&xbar_mixer_in4_ep>;
1850 };
1851 };
1852
1853 port@4 {
1854 reg = <0x4>;
1855
1856 mixer_in5_ep: endpoint {
1857 remote-endpoint = <&xbar_mixer_in5_ep>;
1858 };
1859 };
1860
1861 port@5 {
1862 reg = <0x5>;
1863
1864 mixer_in6_ep: endpoint {
1865 remote-endpoint = <&xbar_mixer_in6_ep>;
1866 };
1867 };
1868
1869 port@6 {
1870 reg = <0x6>;
1871
1872 mixer_in7_ep: endpoint {
1873 remote-endpoint = <&xbar_mixer_in7_ep>;
1874 };
1875 };
1876
1877 port@7 {
1878 reg = <0x7>;
1879
1880 mixer_in8_ep: endpoint {
1881 remote-endpoint = <&xbar_mixer_in8_ep>;
1882 };
1883 };
1884
1885 port@8 {
1886 reg = <0x8>;
1887
1888 mixer_in9_ep: endpoint {
1889 remote-endpoint = <&xbar_mixer_in9_ep>;
1890 };
1891 };
1892
1893 port@9 {
1894 reg = <0x9>;
1895
1896 mixer_in10_ep: endpoint {
1897 remote-endpoint = <&xbar_mixer_in10_ep>;
1898 };
1899 };
1900
1901 mixer_out1_port: port@a {
1902 reg = <0xa>;
1903
1904 mixer_out1_ep: endpoint {
1905 remote-endpoint = <&xbar_mixer_out1_ep>;
1906 };
1907 };
1908
1909 mixer_out2_port: port@b {
1910 reg = <0xb>;
1911
1912 mixer_out2_ep: endpoint {
1913 remote-endpoint = <&xbar_mixer_out2_ep>;
1914 };
1915 };
1916
1917 mixer_out3_port: port@c {
1918 reg = <0xc>;
1919
1920 mixer_out3_ep: endpoint {
1921 remote-endpoint = <&xbar_mixer_out3_ep>;
1922 };
1923 };
1924
1925 mixer_out4_port: port@d {
1926 reg = <0xd>;
1927
1928 mixer_out4_ep: endpoint {
1929 remote-endpoint = <&xbar_mixer_out4_ep>;
1930 };
1931 };
1932
1933 mixer_out5_port: port@e {
1934 reg = <0xe>;
1935
1936 mixer_out5_ep: endpoint {
1937 remote-endpoint = <&xbar_mixer_out5_ep>;
1938 };
1939 };
1940 };
1941 };
1942
1943 asrc@2910000 {
1944 status = "okay";
1945
1946 ports {
1947 #address-cells = <1>;
1948 #size-cells = <0>;
1949
1950 port@0 {
1951 reg = <0x0>;
1952
1953 asrc_in1_ep: endpoint {
1954 remote-endpoint = <&xbar_asrc_in1_ep>;
1955 };
1956 };
1957
1958 port@1 {
1959 reg = <0x1>;
1960
1961 asrc_in2_ep: endpoint {
1962 remote-endpoint = <&xbar_asrc_in2_ep>;
1963 };
1964 };
1965
1966 port@2 {
1967 reg = <0x2>;
1968
1969 asrc_in3_ep: endpoint {
1970 remote-endpoint = <&xbar_asrc_in3_ep>;
1971 };
1972 };
1973
1974 port@3 {
1975 reg = <0x3>;
1976
1977 asrc_in4_ep: endpoint {
1978 remote-endpoint = <&xbar_asrc_in4_ep>;
1979 };
1980 };
1981
1982 port@4 {
1983 reg = <0x4>;
1984
1985 asrc_in5_ep: endpoint {
1986 remote-endpoint = <&xbar_asrc_in5_ep>;
1987 };
1988 };
1989
1990 port@5 {
1991 reg = <0x5>;
1992
1993 asrc_in6_ep: endpoint {
1994 remote-endpoint = <&xbar_asrc_in6_ep>;
1995 };
1996 };
1997
1998 port@6 {
1999 reg = <0x6>;
2000
2001 asrc_in7_ep: endpoint {
2002 remote-endpoint = <&xbar_asrc_in7_ep>;
2003 };
2004 };
2005
2006 asrc_out1_port: port@7 {
2007 reg = <0x7>;
2008
2009 asrc_out1_ep: endpoint {
2010 remote-endpoint = <&xbar_asrc_out1_ep>;
2011 };
2012 };
2013
2014 asrc_out2_port: port@8 {
2015 reg = <0x8>;
2016
2017 asrc_out2_ep: endpoint {
2018 remote-endpoint = <&xbar_asrc_out2_ep>;
2019 };
2020 };
2021
2022 asrc_out3_port: port@9 {
2023 reg = <0x9>;
2024
2025 asrc_out3_ep: endpoint {
2026 remote-endpoint = <&xbar_asrc_out3_ep>;
2027 };
2028 };
2029
2030 asrc_out4_port: port@a {
2031 reg = <0xa>;
2032
2033 asrc_out4_ep: endpoint {
2034 remote-endpoint = <&xbar_asrc_out4_ep>;
2035 };
2036 };
2037
2038 asrc_out5_port: port@b {
2039 reg = <0xb>;
2040
2041 asrc_out5_ep: endpoint {
2042 remote-endpoint = <&xbar_asrc_out5_ep>;
2043 };
2044 };
2045
2046 asrc_out6_port: port@c {
2047 reg = <0xc>;
2048
2049 asrc_out6_ep: endpoint {
2050 remote-endpoint = <&xbar_asrc_out6_ep>;
2051 };
2052 };
2053 };
2054 };
2055 };
2056 };
2057
2058 ddc: i2c@3190000 {
2059 status = "okay";
2060 };
2061
2062 i2c@3160000 {
2063 eeprom@57 {
2064 compatible = "atmel,24c02";
2065 reg = <0x57>;
2066
2067 label = "system";
2068 vcc-supply = <&vdd_1v8>;
2069 address-width = <8>;
2070 pagesize = <8>;
2071 size = <256>;
2072 read-only;
2073 };
2074 };
2075
2076 hda@3510000 {
2077 nvidia,model = "NVIDIA Jetson Xavier NX HDA";
2078 status = "okay";
2079 };
2080
2081 padctl@3520000 {
2082 status = "okay";
2083
2084 pads {
2085 usb2 {
2086 lanes {
2087 usb2-0 {
2088 status = "okay";
2089 };
2090
2091 usb2-1 {
2092 status = "okay";
2093 };
2094
2095 usb2-2 {
2096 status = "okay";
2097 };
2098 };
2099 };
2100
2101 usb3 {
2102 lanes {
2103 usb3-2 {
2104 status = "okay";
2105 };
2106 };
2107 };
2108 };
2109
2110 ports {
2111 usb2-0 {
2112 mode = "otg";
2113 status = "okay";
2114 usb-role-switch;
2115 connector {
2116 compatible = "gpio-usb-b-connector",
2117 "usb-b-connector";
2118 label = "micro-USB";
2119 type = "micro";
2120 vbus-gpio = <&gpio TEGRA194_MAIN_GPIO(Z, 1)
2121 GPIO_ACTIVE_LOW>;
2122 };
2123 };
2124
2125 usb2-1 {
2126 mode = "host";
2127 status = "okay";
2128 };
2129
2130 usb2-2 {
2131 mode = "host";
2132 vbus-supply = <&vdd_5v0_sys>;
2133 status = "okay";
2134 };
2135
2136 usb3-2 {
2137 nvidia,usb2-companion = <1>;
2138 vbus-supply = <&vdd_5v0_sys>;
2139 status = "okay";
2140 };
2141 };
2142 };
2143
2144 usb@3610000 {
2145 status = "okay";
2146
2147 phys = <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-1}>,
2148 <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-2}>,
2149 <&{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-2}>;
2150 phy-names = "usb2-1", "usb2-2", "usb3-2";
2151 };
2152
2153 usb@3550000 {
2154 status = "okay";
2155
2156 phys = <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-0}>;
2157 phy-names = "usb2-0";
2158 };
2159
2160 spi@3270000 {
2161 status = "okay";
2162
2163 flash@0 {
2164 compatible = "jedec,spi-nor";
2165 reg = <0>;
2166 spi-max-frequency = <102000000>;
2167 spi-tx-bus-width = <4>;
2168 spi-rx-bus-width = <4>;
2169 };
2170 };
2171
2172 pwm@32d0000 {
2173 status = "okay";
2174 };
2175
2176 host1x@13e00000 {
2177 display-hub@15200000 {
2178 status = "okay";
2179 };
2180
2181 dpaux@155c0000 {
2182 status = "okay";
2183 };
2184
2185 dpaux@155d0000 {
2186 status = "okay";
2187 };
2188
2189 /* DP0 */
2190 sor@15b00000 {
2191 status = "okay";
2192
2193 avdd-io-hdmi-dp-supply = <&vdd_1v0>;
2194 vdd-hdmi-dp-pll-supply = <&vdd_1v8hs>;
2195
2196 nvidia,dpaux = <&dpaux0>;
2197 };
2198
2199 /* HDMI */
2200 sor@15b40000 {
2201 status = "okay";
2202
2203 avdd-io-hdmi-dp-supply = <&vdd_1v0>;
2204 vdd-hdmi-dp-pll-supply = <&vdd_1v8hs>;
2205 hdmi-supply = <&vdd_hdmi>;
2206
2207 nvidia,ddc-i2c-bus = <&ddc>;
2208 nvidia,hpd-gpio = <&gpio TEGRA194_MAIN_GPIO(M, 1)
2209 GPIO_ACTIVE_LOW>;
2210 };
2211 };
2212 };
2213
2214 pcie@14160000 {
2215 status = "okay";
2216
2217 vddio-pex-ctl-supply = <&vdd_1v8ao>;
2218
2219 phys = <&p2u_hsio_11>;
2220 phy-names = "p2u-0";
2221 };
2222
2223 pcie@141a0000 {
2224 status = "okay";
2225
2226 vddio-pex-ctl-supply = <&vdd_1v8ao>;
2227
2228 phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>,
2229 <&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>,
2230 <&p2u_nvhs_6>, <&p2u_nvhs_7>;
2231
2232 phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4",
2233 "p2u-5", "p2u-6", "p2u-7";
2234 };
2235
2236 pcie-ep@141a0000 {
2237 status = "disabled";
2238
2239 vddio-pex-ctl-supply = <&vdd_1v8ao>;
2240
2241 reset-gpios = <&gpio TEGRA194_MAIN_GPIO(GG, 1) GPIO_ACTIVE_LOW>;
2242
2243 nvidia,refclk-select-gpios = <&gpio_aon TEGRA194_AON_GPIO(AA, 5)
2244 GPIO_ACTIVE_HIGH>;
2245
2246 phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>,
2247 <&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>,
2248 <&p2u_nvhs_6>, <&p2u_nvhs_7>;
2249
2250 phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4",
2251 "p2u-5", "p2u-6", "p2u-7";
2252 };
2253
2254 fan: pwm-fan {
2255 compatible = "pwm-fan";
2256 pwms = <&pwm6 0 45334>;
2257
2258 cooling-levels = <0 64 128 255>;
2259 #cooling-cells = <2>;
2260 };
2261
2262 gpio-keys {
2263 compatible = "gpio-keys";
2264
2265 key-force-recovery {
2266 label = "Force Recovery";
2267 gpios = <&gpio TEGRA194_MAIN_GPIO(G, 0)
2268 GPIO_ACTIVE_LOW>;
2269 linux,input-type = <EV_KEY>;
2270 linux,code = <KEY_SLEEP>;
2271 debounce-interval = <10>;
2272 };
2273
2274 key-power {
2275 label = "Power";
2276 gpios = <&gpio_aon TEGRA194_AON_GPIO(EE, 4)
2277 GPIO_ACTIVE_LOW>;
2278 linux,input-type = <EV_KEY>;
2279 linux,code = <KEY_POWER>;
2280 debounce-interval = <10>;
2281 wakeup-event-action = <EV_ACT_ASSERTED>;
2282 wakeup-source;
2283 };
2284 };
2285
2286 vdd_5v0_sys: regulator-vdd-5v0-sys {
2287 compatible = "regulator-fixed";
2288 regulator-name = "VDD_5V_SYS";
2289 regulator-min-microvolt = <5000000>;
2290 regulator-max-microvolt = <5000000>;
2291 regulator-always-on;
2292 regulator-boot-on;
2293 };
2294
2295 vdd_3v3_sys: regulator-vdd-3v3-sys {
2296 compatible = "regulator-fixed";
2297 regulator-name = "VDD_3V3_SYS";
2298 regulator-min-microvolt = <3300000>;
2299 regulator-max-microvolt = <3300000>;
2300 regulator-always-on;
2301 regulator-boot-on;
2302 };
2303
2304 vdd_3v3_ao: regulator-vdd-3v3-ao {
2305 compatible = "regulator-fixed";
2306 regulator-name = "VDD_3V3_AO";
2307 regulator-min-microvolt = <3300000>;
2308 regulator-max-microvolt = <3300000>;
2309 regulator-always-on;
2310 regulator-boot-on;
2311 };
2312
2313 vdd_1v8: regulator-vdd-1v8 {
2314 compatible = "regulator-fixed";
2315 regulator-name = "VDD_1V8";
2316 regulator-min-microvolt = <1800000>;
2317 regulator-max-microvolt = <1800000>;
2318 regulator-always-on;
2319 regulator-boot-on;
2320 };
2321
2322 vdd_hdmi: regulator-vdd-hdmi {
2323 compatible = "regulator-fixed";
2324 regulator-name = "VDD_5V0_HDMI_CON";
2325 regulator-min-microvolt = <5000000>;
2326 regulator-max-microvolt = <5000000>;
2327 regulator-always-on;
2328 regulator-boot-on;
2329 };
2330
2331 sound {
2332 compatible = "nvidia,tegra186-audio-graph-card";
2333 status = "okay";
2334
2335 dais = /* ADMAIF (FE) Ports */
2336 <&admaif0_port>, <&admaif1_port>, <&admaif2_port>, <&admaif3_port>,
2337 <&admaif4_port>, <&admaif5_port>, <&admaif6_port>, <&admaif7_port>,
2338 <&admaif8_port>, <&admaif9_port>, <&admaif10_port>, <&admaif11_port>,
2339 <&admaif12_port>, <&admaif13_port>, <&admaif14_port>, <&admaif15_port>,
2340 <&admaif16_port>, <&admaif17_port>, <&admaif18_port>, <&admaif19_port>,
2341 /* XBAR Ports */
2342 <&xbar_i2s3_port>, <&xbar_i2s5_port>,
2343 <&xbar_dmic1_port>, <&xbar_dmic2_port>, <&xbar_dmic4_port>,
2344 <&xbar_dspk1_port>, <&xbar_dspk2_port>,
2345 <&xbar_sfc1_in_port>, <&xbar_sfc2_in_port>,
2346 <&xbar_sfc3_in_port>, <&xbar_sfc4_in_port>,
2347 <&xbar_mvc1_in_port>, <&xbar_mvc2_in_port>,
2348 <&xbar_amx1_in1_port>, <&xbar_amx1_in2_port>,
2349 <&xbar_amx1_in3_port>, <&xbar_amx1_in4_port>,
2350 <&xbar_amx2_in1_port>, <&xbar_amx2_in2_port>,
2351 <&xbar_amx2_in3_port>, <&xbar_amx2_in4_port>,
2352 <&xbar_amx3_in1_port>, <&xbar_amx3_in2_port>,
2353 <&xbar_amx3_in3_port>, <&xbar_amx3_in4_port>,
2354 <&xbar_amx4_in1_port>, <&xbar_amx4_in2_port>,
2355 <&xbar_amx4_in3_port>, <&xbar_amx4_in4_port>,
2356 <&xbar_adx1_in_port>, <&xbar_adx2_in_port>,
2357 <&xbar_adx3_in_port>, <&xbar_adx4_in_port>,
2358 <&xbar_mixer_in1_port>, <&xbar_mixer_in2_port>,
2359 <&xbar_mixer_in3_port>, <&xbar_mixer_in4_port>,
2360 <&xbar_mixer_in5_port>, <&xbar_mixer_in6_port>,
2361 <&xbar_mixer_in7_port>, <&xbar_mixer_in8_port>,
2362 <&xbar_mixer_in9_port>, <&xbar_mixer_in10_port>,
2363 <&xbar_asrc_in1_port>, <&xbar_asrc_in2_port>,
2364 <&xbar_asrc_in3_port>, <&xbar_asrc_in4_port>,
2365 <&xbar_asrc_in5_port>, <&xbar_asrc_in6_port>,
2366 <&xbar_asrc_in7_port>,
2367 <&xbar_ope1_in_port>,
2368 /* HW accelerators */
2369 <&sfc1_out_port>, <&sfc2_out_port>,
2370 <&sfc3_out_port>, <&sfc4_out_port>,
2371 <&mvc1_out_port>, <&mvc2_out_port>,
2372 <&amx1_out_port>, <&amx2_out_port>,
2373 <&amx3_out_port>, <&amx4_out_port>,
2374 <&adx1_out1_port>, <&adx1_out2_port>,
2375 <&adx1_out3_port>, <&adx1_out4_port>,
2376 <&adx2_out1_port>, <&adx2_out2_port>,
2377 <&adx2_out3_port>, <&adx2_out4_port>,
2378 <&adx3_out1_port>, <&adx3_out2_port>,
2379 <&adx3_out3_port>, <&adx3_out4_port>,
2380 <&adx4_out1_port>, <&adx4_out2_port>,
2381 <&adx4_out3_port>, <&adx4_out4_port>,
2382 <&mixer_out1_port>, <&mixer_out2_port>,
2383 <&mixer_out3_port>, <&mixer_out4_port>,
2384 <&mixer_out5_port>,
2385 <&asrc_out1_port>, <&asrc_out2_port>, <&asrc_out3_port>,
2386 <&asrc_out4_port>, <&asrc_out5_port>, <&asrc_out6_port>,
2387 <&ope1_out_port>,
2388 /* BE I/O Ports */
2389 <&i2s3_port>, <&i2s5_port>,
2390 <&dmic1_port>, <&dmic2_port>, <&dmic4_port>,
2391 <&dspk1_port>, <&dspk2_port>;
2392
2393 label = "NVIDIA Jetson Xavier NX APE";
2394 };
2395
2396 thermal-zones {
2397 cpu-thermal {
2398 polling-delay = <0>;
2399 polling-delay-passive = <500>;
2400 status = "okay";
2401
2402 trips {
2403 cpu_trip_critical: critical {
2404 temperature = <96500>;
2405 hysteresis = <0>;
2406 type = "critical";
2407 };
2408
2409 cpu_trip_hot: hot {
2410 temperature = <70000>;
2411 hysteresis = <2000>;
2412 type = "hot";
2413 };
2414
2415 cpu_trip_active: active {
2416 temperature = <50000>;
2417 hysteresis = <2000>;
2418 type = "active";
2419 };
2420
2421 cpu_trip_passive: passive {
2422 temperature = <30000>;
2423 hysteresis = <2000>;
2424 type = "passive";
2425 };
2426 };
2427
2428 cooling-maps {
2429 cpu-critical {
2430 cooling-device = <&fan 3 3>;
2431 trip = <&cpu_trip_critical>;
2432 };
2433
2434 cpu-hot {
2435 cooling-device = <&fan 2 2>;
2436 trip = <&cpu_trip_hot>;
2437 };
2438
2439 cpu-active {
2440 cooling-device = <&fan 1 1>;
2441 trip = <&cpu_trip_active>;
2442 };
2443
2444 cpu-passive {
2445 cooling-device = <&fan 0 0>;
2446 trip = <&cpu_trip_passive>;
2447 };
2448 };
2449 };
2450
2451 gpu-thermal {
2452 polling-delay = <0>;
2453 polling-delay-passive = <500>;
2454 status = "okay";
2455
2456 trips {
2457 gpu_alert0: critical {
2458 temperature = <99000>;
2459 hysteresis = <0>;
2460 type = "critical";
2461 };
2462 };
2463 };
2464
2465 aux-thermal {
2466 polling-delay = <0>;
2467 polling-delay-passive = <500>;
2468 status = "okay";
2469
2470 trips {
2471 aux_alert0: critical {
2472 temperature = <90000>;
2473 hysteresis = <0>;
2474 type = "critical";
2475 };
2476 };
2477 };
2478 };
2479 };
Cache object: bd9ed6ac3d1339f1de7bf2812b3c95fa
|