1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3 * Google Mrbland board device tree source
4 *
5 * Copyright 2021 Google LLC.
6 */
7
8 /dts-v1/;
9
10 #include "sc7180-trogdor.dtsi"
11
12 /* This board only has 1 USB Type-C port. */
13 /delete-node/ &usb_c1;
14
15 / {
16 avdd_lcd: avdd-lcd {
17 compatible = "regulator-fixed";
18 regulator-name = "avdd_lcd";
19
20 gpio = <&tlmm 88 GPIO_ACTIVE_HIGH>;
21 enable-active-high;
22 pinctrl-names = "default";
23 pinctrl-0 = <&avdd_lcd_en>;
24
25 vin-supply = <&pp5000_a>;
26 };
27
28 avee_lcd: avee-lcd {
29 compatible = "regulator-fixed";
30 regulator-name = "avee_lcd";
31
32 gpio = <&tlmm 21 GPIO_ACTIVE_HIGH>;
33 enable-active-high;
34 pinctrl-names = "default";
35 pinctrl-0 = <&avee_lcd_en>;
36
37 vin-supply = <&pp5000_a>;
38 };
39
40 v1p8_mipi: v1p8-mipi {
41 compatible = "regulator-fixed";
42 regulator-name = "v1p8_mipi";
43
44 gpio = <&tlmm 86 GPIO_ACTIVE_HIGH>;
45 enable-active-high;
46 pinctrl-names = "default";
47 pinctrl-0 = <&mipi_1800_en>;
48
49 vin-supply = <&pp3300_a>;
50 };
51 };
52
53 &backlight {
54 pwms = <&cros_ec_pwm 0>;
55 };
56
57 &camcc {
58 status = "okay";
59 };
60
61 &cros_ec {
62 keyboard-controller {
63 compatible = "google,cros-ec-keyb-switches";
64 };
65 };
66
67 &dsi0 {
68
69 panel: panel@0 {
70 /* Compatible will be filled in per-board */
71 reg = <0>;
72 enable-gpios = <&tlmm 87 GPIO_ACTIVE_HIGH>;
73 pinctrl-names = "default";
74 pinctrl-0 = <&vdd_reset_1800>;
75 avdd-supply = <&avdd_lcd>;
76 avee-supply = <&avee_lcd>;
77 pp1800-supply = <&v1p8_mipi>;
78 pp3300-supply = <&pp3300_dx_edp>;
79 backlight = <&backlight>;
80 rotation = <270>;
81
82 ports {
83 #address-cells = <1>;
84 #size-cells = <0>;
85 port@0 {
86 reg = <0>;
87 panel_in: endpoint {
88 remote-endpoint = <&dsi0_out>;
89 };
90 };
91 };
92 };
93
94 ports {
95 port@1 {
96 endpoint {
97 remote-endpoint = <&panel_in>;
98 data-lanes = <0 1 2 3>;
99 };
100 };
101 };
102 };
103
104 &gpio_keys {
105 status = "okay";
106 };
107
108 &i2c4 {
109 status = "okay";
110 clock-frequency = <400000>;
111
112 ap_ts: touchscreen@5d {
113 compatible = "goodix,gt7375p";
114 reg = <0x5d>;
115 pinctrl-names = "default";
116 pinctrl-0 = <&ts_int_l>, <&ts_reset_l>;
117
118 interrupt-parent = <&tlmm>;
119 interrupts = <9 IRQ_TYPE_LEVEL_LOW>;
120
121 reset-gpios = <&tlmm 8 GPIO_ACTIVE_LOW>;
122
123 vdd-supply = <&pp3300_ts>;
124 };
125 };
126
127 &pp1800_uf_cam {
128 status = "okay";
129 };
130
131 &pp1800_wf_cam {
132 status = "okay";
133 };
134
135 &pp2800_uf_cam {
136 status = "okay";
137 };
138
139 &pp2800_wf_cam {
140 status = "okay";
141 };
142
143 &wifi {
144 qcom,ath10k-calibration-variant = "GO_MRBLAND";
145 };
146
147 /*
148 * No eDP on this board but it's logically the same signal so just give it
149 * a new name and assign the proper GPIO.
150 */
151 pp3300_disp_on: &pp3300_dx_edp {
152 gpio = <&tlmm 85 GPIO_ACTIVE_HIGH>;
153 };
154
155 /* PINCTRL - modifications to sc7180-trogdor.dtsi */
156
157 /*
158 * No eDP on this board but it's logically the same signal so just give it
159 * a new name and assign the proper GPIO.
160 */
161
162 tp_en: &en_pp3300_dx_edp {
163 pinmux {
164 pins = "gpio85";
165 };
166
167 pinconf {
168 pins = "gpio85";
169 };
170 };
171
172 /* PINCTRL - board-specific pinctrl */
173
174 &tlmm {
175 gpio-line-names = "HUB_RST_L",
176 "AP_RAM_ID0",
177 "AP_SKU_ID2",
178 "AP_RAM_ID1",
179 "",
180 "AP_RAM_ID2",
181 "UF_CAM_EN",
182 "WF_CAM_EN",
183 "TS_RESET_L",
184 "TS_INT_L",
185 "",
186 "",
187 "AP_EDP_BKLTEN",
188 "UF_CAM_MCLK",
189 "WF_CAM_CLK",
190 "",
191 "",
192 "UF_CAM_SDA",
193 "UF_CAM_SCL",
194 "WF_CAM_SDA",
195 "WF_CAM_SCL",
196 "AVEE_LCD_EN",
197 "",
198 "AMP_EN",
199 "",
200 "",
201 "",
202 "",
203 "HP_IRQ",
204 "WF_CAM_RST_L",
205 "UF_CAM_RST_L",
206 "AP_BRD_ID2",
207 "",
208 "AP_BRD_ID0",
209 "AP_H1_SPI_MISO",
210 "AP_H1_SPI_MOSI",
211 "AP_H1_SPI_CLK",
212 "AP_H1_SPI_CS_L",
213 "BT_UART_CTS",
214 "BT_UART_RTS",
215 "BT_UART_TXD",
216 "BT_UART_RXD",
217 "H1_AP_INT_ODL",
218 "",
219 "UART_AP_TX_DBG_RX",
220 "UART_DBG_TX_AP_RX",
221 "HP_I2C_SDA",
222 "HP_I2C_SCL",
223 "FORCED_USB_BOOT",
224 "AMP_BCLK",
225 "AMP_LRCLK",
226 "AMP_DIN",
227 "PEN_DET_ODL",
228 "HP_BCLK",
229 "HP_LRCLK",
230 "HP_DOUT",
231 "HP_DIN",
232 "HP_MCLK",
233 "AP_SKU_ID0",
234 "AP_EC_SPI_MISO",
235 "AP_EC_SPI_MOSI",
236 "AP_EC_SPI_CLK",
237 "AP_EC_SPI_CS_L",
238 "AP_SPI_CLK",
239 "AP_SPI_MOSI",
240 "AP_SPI_MISO",
241 /*
242 * AP_FLASH_WP_L is crossystem ABI. Schematics
243 * call it BIOS_FLASH_WP_L.
244 */
245 "AP_FLASH_WP_L",
246 "",
247 "AP_SPI_CS0_L",
248 "",
249 "",
250 "",
251 "",
252 "WLAN_SW_CTRL",
253 "",
254 "REPORT_E",
255 "",
256 "ID0",
257 "",
258 "ID1",
259 "",
260 "",
261 "",
262 "CODEC_PWR_EN",
263 "HUB_EN",
264 "TP_EN",
265 "MIPI_1.8V_EN",
266 "VDD_RESET_1.8V",
267 "AVDD_LCD_EN",
268 "",
269 "AP_SKU_ID1",
270 "AP_RST_REQ",
271 "",
272 "AP_BRD_ID1",
273 "AP_EC_INT_L",
274 "SDM_GRFC_3",
275 "",
276 "",
277 "BOOT_CONFIG_4",
278 "BOOT_CONFIG_2",
279 "",
280 "",
281 "",
282 "",
283 "",
284 "",
285 "",
286 "BOOT_CONFIG_3",
287 "WCI2_LTE_COEX_TXD",
288 "WCI2_LTE_COEX_RXD",
289 "",
290 "",
291 "",
292 "",
293 "FORCED_USB_BOOT_POL",
294 "AP_TS_PEN_I2C_SDA",
295 "AP_TS_PEN_I2C_SCL",
296 "DP_HOT_PLUG_DET",
297 "EC_IN_RW_ODL";
298
299 avdd_lcd_en: avdd-lcd-en {
300 pinmux {
301 pins = "gpio88";
302 function = "gpio";
303 };
304
305 pinconf {
306 pins = "gpio88";
307 drive-strength = <2>;
308 bias-disable;
309 };
310 };
311
312 avee_lcd_en: avee-lcd-en {
313 pinmux {
314 pins = "gpio21";
315 function = "gpio";
316 };
317
318 pinconf {
319 pins = "gpio21";
320 drive-strength = <2>;
321 bias-disable;
322 };
323 };
324
325 mipi_1800_en: mipi-1800-en {
326 pinmux {
327 pins = "gpio86";
328 function = "gpio";
329 };
330
331 pinconf {
332 pins = "gpio86";
333 drive-strength = <2>;
334 bias-disable;
335 };
336 };
337
338 vdd_reset_1800: vdd-reset-1800 {
339 pinmux {
340 pins = "gpio87";
341 function = "gpio";
342 };
343
344 pinconf {
345 pins = "gpio87";
346 drive-strength = <2>;
347 bias-disable;
348 };
349 };
350 };
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