1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3 * Google Herobrine board device tree source
4 *
5 * Copyright 2021 Google LLC.
6 */
7
8 /dts-v1/;
9
10 #include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h>
11 #include <dt-bindings/iio/qcom,spmi-adc7-pmr735a.h>
12 #include <dt-bindings/input/gpio-keys.h>
13 #include <dt-bindings/input/input.h>
14 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
15 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
16
17 #include "sc7280.dtsi"
18
19 /* PMICs depend on spmi_bus label and so must come after SoC */
20 #include "pm7325.dtsi"
21 #include "pm8350c.dtsi"
22 #include "pmk8350.dtsi"
23
24 #include "sc7280-chrome-common.dtsi"
25
26 / {
27 model = "Google Herobrine (rev0)";
28 compatible = "google,herobrine-rev0", "qcom,sc7280";
29 };
30
31 / {
32 aliases {
33 serial0 = &uart5;
34 serial1 = &uart7;
35 };
36
37 chosen {
38 stdout-path = "serial0:115200n8";
39 };
40
41 /* FIXED REGULATORS - parents above children */
42
43 /* This is the top level supply and variable voltage */
44 ppvar_sys: ppvar-sys-regulator {
45 compatible = "regulator-fixed";
46 regulator-name = "ppvar_sys";
47 regulator-always-on;
48 regulator-boot-on;
49 };
50
51 /* This divides ppvar_sys by 2, so voltage is variable */
52 src_vph_pwr: src-vph-pwr-regulator {
53 compatible = "regulator-fixed";
54 regulator-name = "src_vph_pwr";
55
56 /* EC turns on with switchcap_on; always on for AP */
57 regulator-always-on;
58 regulator-boot-on;
59
60 vin-supply = <&ppvar_sys>;
61 };
62
63 pp5000_s3: pp5000-s3-regulator {
64 compatible = "regulator-fixed";
65 regulator-name = "pp5000_s3";
66
67 /* EC turns on with en_pp5000_s3; always on for AP */
68 regulator-always-on;
69 regulator-boot-on;
70 regulator-min-microvolt = <5000000>;
71 regulator-max-microvolt = <5000000>;
72
73 vin-supply = <&ppvar_sys>;
74 };
75
76 pp3300_z1: pp3300-z1-regulator {
77 compatible = "regulator-fixed";
78 regulator-name = "pp3300_z1";
79
80 /* EC turns on with en_pp3300_z1; always on for AP */
81 regulator-always-on;
82 regulator-boot-on;
83 regulator-min-microvolt = <3300000>;
84 regulator-max-microvolt = <3300000>;
85
86 vin-supply = <&ppvar_sys>;
87 };
88
89 pp3300_audio:
90 pp3300_codec: pp3300-codec-regulator {
91 compatible = "regulator-fixed";
92 regulator-name = "pp3300_codec";
93
94 regulator-min-microvolt = <3300000>;
95 regulator-max-microvolt = <3300000>;
96
97 gpio = <&tlmm 67 GPIO_ACTIVE_HIGH>;
98 enable-active-high;
99 pinctrl-names = "default";
100 pinctrl-0 = <&en_pp3300_codec>;
101
102 vin-supply = <&pp3300_z1>;
103 };
104
105 pp3300_cam:
106 pp3300_edp:
107 pp3300_ts: pp3300-edp-regulator {
108 compatible = "regulator-fixed";
109 regulator-name = "pp3300_edp";
110
111 regulator-min-microvolt = <3300000>;
112 regulator-max-microvolt = <3300000>;
113
114 gpio = <&tlmm 80 GPIO_ACTIVE_HIGH>;
115 enable-active-high;
116 pinctrl-names = "default";
117 pinctrl-0 = <&en_pp3300_dx_edp>;
118
119 vin-supply = <&pp3300_z1>;
120 };
121
122 pp3300_fp:
123 pp3300_fp_ls:
124 pp3300_mcu: pp3300-fp-regulator {
125 compatible = "regulator-fixed";
126 regulator-name = "pp3300_fp";
127
128 regulator-min-microvolt = <3300000>;
129 regulator-max-microvolt = <3300000>;
130
131 regulator-boot-on;
132 regulator-always-on;
133
134 /*
135 * WARNING: it is intentional that GPIO 42 isn't listed here.
136 * The userspace script for updating the fingerprint firmware
137 * needs to control the FP regulators during a FW update,
138 * hence the signal can't be owned by the kernel regulator.
139 */
140
141 pinctrl-names = "default";
142 pinctrl-0 = <&en_fp_rails>;
143
144 vin-supply = <&pp3300_z1>;
145 };
146
147 pp3300_hub: pp3300-hub-regulator {
148 compatible = "regulator-fixed";
149 regulator-name = "pp3300_hub";
150
151 regulator-min-microvolt = <3300000>;
152 regulator-max-microvolt = <3300000>;
153
154 regulator-boot-on;
155 regulator-always-on;
156
157 gpio = <&tlmm 24 GPIO_ACTIVE_HIGH>;
158 enable-active-high;
159 pinctrl-names = "default";
160 pinctrl-0 = <&en_pp3300_hub>;
161
162 vin-supply = <&pp3300_z1>;
163 };
164
165 pp3300_tp: pp3300-tp-regulator {
166 compatible = "regulator-fixed";
167 regulator-name = "pp3300_tp";
168
169 regulator-min-microvolt = <3300000>;
170 regulator-max-microvolt = <3300000>;
171
172 /* AP turns on with PP1800_L18B_S0; always on for AP */
173 regulator-always-on;
174 regulator-boot-on;
175
176 vin-supply = <&pp3300_z1>;
177 };
178
179 pp2850_uf_cam: pp2850-uf-cam-regulator {
180 compatible = "regulator-fixed";
181 regulator-name = "pp2850_uf_cam";
182
183 regulator-min-microvolt = <2850000>;
184 regulator-max-microvolt = <2850000>;
185
186 gpio = <&tlmm 6 GPIO_ACTIVE_HIGH>;
187 enable-active-high;
188 pinctrl-names = "default";
189 pinctrl-0 = <&uf_cam_en>;
190
191 vin-supply = <&pp3300_cam>;
192 };
193
194 pp2850_vcm_wf_cam: pp2850-vcm-wf-cam-regulator {
195 compatible = "regulator-fixed";
196 regulator-name = "pp2850_vcm_wf_cam";
197
198 regulator-min-microvolt = <2850000>;
199 regulator-max-microvolt = <2850000>;
200
201 gpio = <&tlmm 7 GPIO_ACTIVE_HIGH>;
202 enable-active-high;
203 pinctrl-names = "default";
204 pinctrl-0 = <&wf_cam_en>;
205
206 vin-supply = <&pp3300_cam>;
207 };
208
209 pp2850_wf_cam: pp2850-wf-cam-regulator {
210 compatible = "regulator-fixed";
211 regulator-name = "pp2850_wf_cam";
212
213 regulator-min-microvolt = <2850000>;
214 regulator-max-microvolt = <2850000>;
215
216 gpio = <&tlmm 7 GPIO_ACTIVE_HIGH>;
217 enable-active-high;
218 /*
219 * The pinconf can only be referenced once so we put it on the
220 * first regulator and comment it out here.
221 *
222 * pinctrl-names = "default";
223 * pinctrl-0 = <&wf_cam_en>;
224 */
225
226 vin-supply = <&pp3300_cam>;
227 };
228
229 pp1800_fp: pp1800-fp-regulator {
230 compatible = "regulator-fixed";
231 regulator-name = "pp1800_fp";
232
233 regulator-min-microvolt = <1800000>;
234 regulator-max-microvolt = <1800000>;
235
236 regulator-boot-on;
237 regulator-always-on;
238
239 /*
240 * WARNING: it is intentional that GPIO 42 isn't listed here.
241 * The userspace script for updating the fingerprint firmware
242 * needs to control the FP regulators during a FW update,
243 * hence the signal can't be owned by the kernel regulator.
244 */
245
246 pinctrl-names = "default";
247 pinctrl-0 = <&en_fp_rails>;
248
249 vin-supply = <&pp1800_l18b_s0>;
250 status = "disabled";
251 };
252
253 pp1800_uf_cam: pp1800-uf-cam-regulator {
254 compatible = "regulator-fixed";
255 regulator-name = "pp1800_uf_cam";
256
257 regulator-min-microvolt = <1800000>;
258 regulator-max-microvolt = <1800000>;
259
260 gpio = <&tlmm 6 GPIO_ACTIVE_HIGH>;
261 enable-active-high;
262 /*
263 * The pinconf can only be referenced once so we put it on the
264 * first regulator and comment it out here.
265 *
266 * pinctrl-names = "default";
267 * pinctrl-0 = <&uf_cam_en>;
268 */
269
270 vin-supply = <&pp1800_l19b>;
271 };
272
273 pp1800_wf_cam: pp1800-wf-cam-regulator {
274 compatible = "regulator-fixed";
275 regulator-name = "pp1800_wf_cam";
276
277 regulator-min-microvolt = <1800000>;
278 regulator-max-microvolt = <1800000>;
279
280 gpio = <&tlmm 7 GPIO_ACTIVE_HIGH>;
281 enable-active-high;
282 /*
283 * The pinconf can only be referenced once so we put it on the
284 * first regulator and comment it out here.
285 *
286 * pinctrl-names = "default";
287 * pinctrl-0 = <&wf_cam_en>;
288 */
289
290 vin-supply = <&pp1800_l19b>;
291 };
292
293 pp1200_wf_cam: pp1200-wf-cam-regulator {
294 compatible = "regulator-fixed";
295 regulator-name = "pp1200_wf_cam";
296
297 regulator-min-microvolt = <1200000>;
298 regulator-max-microvolt = <1200000>;
299
300 gpio = <&tlmm 7 GPIO_ACTIVE_HIGH>;
301 enable-active-high;
302 /*
303 * The pinconf can only be referenced once so we put it on the
304 * first regulator and comment it out here.
305 *
306 * pinctrl-names = "default";
307 * pinctrl-0 = <&wf_cam_en>;
308 */
309
310 vin-supply = <&pp1200_l6b>;
311 };
312
313 /* BOARD-SPECIFIC TOP LEVEL NODES */
314
315 gpio_keys: gpio-keys {
316 compatible = "gpio-keys";
317 status = "disabled";
318 pinctrl-names = "default";
319 pinctrl-0 = <&pen_pdct_l>;
320
321 pen_insert: pen-insert {
322 label = "Pen Insert";
323
324 /* Insert = low, eject = high */
325 gpios = <&tlmm 39 GPIO_ACTIVE_LOW>;
326 linux,code = <SW_PEN_INSERTED>;
327 linux,input-type = <EV_SW>;
328 wakeup-event-action = <EV_ACT_DEASSERTED>;
329 wakeup-source;
330 };
331 };
332
333 pwmleds {
334 compatible = "pwm-leds";
335 status = "disabled";
336 keyboard_backlight: keyboard-backlight {
337 status = "disabled";
338 label = "cros_ec::kbd_backlight";
339 pwms = <&cros_ec_pwm 0>;
340 max-brightness = <1023>;
341 };
342 };
343 };
344
345 &apps_rsc {
346 pm7325-regulators {
347 compatible = "qcom,pm7325-rpmh-regulators";
348 qcom,pmic-id = "b";
349
350 vdd19_pmu_pcie_i:
351 vdd19_pmu_rfa_i:
352 vreg_s1b_wlan:
353 vreg_s1b: smps1 {
354 regulator-min-microvolt = <1856000>;
355 regulator-max-microvolt = <2040000>;
356 };
357
358 vdd_pmu_aon_i:
359 vreg_s7b_wlan:
360 vreg_s7b: smps7 {
361 regulator-min-microvolt = <535000>;
362 regulator-max-microvolt = <1120000>;
363 };
364
365 vdd13_pmu_pcie_i:
366 vdd13_pmu_rfa_i:
367 vreg_s8b_wlan:
368 vreg_s8b: smps8 {
369 regulator-min-microvolt = <1256000>;
370 regulator-max-microvolt = <1500000>;
371 };
372
373 vdda_usb_ss_dp_core:
374 vreg_l1b: ldo1 {
375 regulator-min-microvolt = <825000>;
376 regulator-max-microvolt = <925000>;
377 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
378 };
379
380 vdda_usb_hs0_3p1:
381 vreg_l2b: ldo2 {
382 regulator-min-microvolt = <2700000>;
383 regulator-max-microvolt = <3544000>;
384 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
385 };
386
387 pp1200_l6b:
388 vdd_ufs_1p2:
389 vdd_vref:
390 vdda_csi01_1p2:
391 vdda_csi23_1p2:
392 vdda_csi4_1p2:
393 vdda_dsi0_1p2:
394 vdda_pcie0_1p2:
395 vdda_pcie1_1p2:
396 vdda_usb_ss_dp_1p2:
397 vdda_qlink0_1p2_ck:
398 vdda_qlink1_1p2_ck:
399 vreg_l6b_1p2:
400 vreg_l6b: ldo6 {
401 regulator-min-microvolt = <1120000>;
402 regulator-max-microvolt = <1408000>;
403 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
404 };
405
406 pp2950_l7b:
407 vreg_l7b: ldo7 {
408 regulator-min-microvolt = <2960000>;
409 regulator-max-microvolt = <2960000>;
410 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
411 };
412
413 codec_vcc:
414 pp1800_l18b_s0:
415 pp1800_ts:
416 vdd1:
417 vddpx_0:
418 vddpx_3:
419 vddpx_7:
420 vreg_l18b: ldo18 {
421 regulator-min-microvolt = <1800000>;
422 regulator-max-microvolt = <2000000>;
423 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
424 };
425
426 pp1800_l19b:
427 vddpx_ts:
428 vddpx_wl4otp:
429 vreg_l19b: ldo19 {
430 regulator-min-microvolt = <1800000>;
431 regulator-max-microvolt = <1800000>;
432 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
433 };
434 };
435
436 pm8350c-regulators {
437 compatible = "qcom,pm8350c-rpmh-regulators";
438 qcom,pmic-id = "c";
439
440 vreg_s1c: smps1 {
441 regulator-min-microvolt = <2190000>;
442 regulator-max-microvolt = <2210000>;
443 };
444
445 vddpx_1:
446 vreg_s9c: smps9 {
447 regulator-min-microvolt = <1010000>;
448 regulator-max-microvolt = <1170000>;
449 };
450
451 pp1800_l1c:
452 pp1800_pen:
453 vdd_a_gfx_cs_1p1:
454 vdd_a_cxo_1p8:
455 vdd_qfprom:
456 vdda_apc_cs_1p8:
457 vdda_qrefs_1p8:
458 vdda_turing_q6_cs_1p8:
459 vdda_usb_hs0_1p8:
460 vreg_l1c: ldo1 {
461 regulator-min-microvolt = <1800000>;
462 regulator-max-microvolt = <1980000>;
463 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
464 };
465
466 dmic_vdd:
467 pp1800_alc5682:
468 pp1800_l2c:
469 pp1800_vreg_alc5682:
470 vreg_l2c: ldo2 {
471 regulator-min-microvolt = <1620000>;
472 regulator-max-microvolt = <1980000>;
473 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
474 };
475
476 pp3300_sar:
477 pp3300_sensor:
478 vreg_l3c: ldo3 {
479 regulator-min-microvolt = <2800000>;
480 regulator-max-microvolt = <3540000>;
481 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
482 };
483
484 ppvar_uim1:
485 vddpx_5:
486 vreg_l4c: ldo4 {
487 regulator-min-microvolt = <1620000>;
488 regulator-max-microvolt = <3300000>;
489 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
490 };
491
492 pp2950_l5c:
493 uim_vcc:
494 vddpx_6:
495 vreg_l5c: ldo5 {
496 regulator-min-microvolt = <1620000>;
497 regulator-max-microvolt = <3300000>;
498 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
499 };
500
501 ppvar_l6c:
502 vddpx_2:
503 vreg_l6c: ldo6 {
504 regulator-min-microvolt = <1800000>;
505 regulator-max-microvolt = <2950000>;
506 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
507 };
508
509 vreg_l7c: ldo7 {
510 regulator-min-microvolt = <3000000>;
511 regulator-max-microvolt = <3544000>;
512 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
513 };
514
515 pp1800_prox:
516 pp1800_sar:
517 vreg_l8c: ldo8 {
518 regulator-min-microvolt = <1620000>;
519 regulator-max-microvolt = <2000000>;
520 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
521 };
522
523 pp2950_l9c:
524 vreg_l9c: ldo9 {
525 regulator-min-microvolt = <2960000>;
526 regulator-max-microvolt = <2960000>;
527 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
528 };
529
530 vdd_a_gnss_0p9:
531 vdd_ufs_core:
532 vdd_usb_hs0_core:
533 vdd_vref_0p9:
534 vdda_csi01_0p9:
535 vdda_csi23_0p9:
536 vdda_csi4_0p9:
537 vdda_dsi0_pll_0p9:
538 vdda_dsi0_0p9:
539 vdda_pcie0_core:
540 vdda_pcie1_core:
541 vdda_qlink0_0p9:
542 vdda_qlink1_0p9:
543 vdda_qlink0_0p9_ck:
544 vdda_qlink1_0p9_ck:
545 vdda_qrefs_0p875:
546 vreg_l10c_0p8:
547 vreg_l10c: ldo10 {
548 regulator-min-microvolt = <720000>;
549 regulator-max-microvolt = <1050000>;
550 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
551 };
552
553 pp2800_l11c:
554 vreg_l11c: ldo11 {
555 regulator-min-microvolt = <2800000>;
556 regulator-max-microvolt = <3544000>;
557 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
558 };
559
560 pp1800_l12c:
561 vreg_l12c: ldo12 {
562 regulator-min-microvolt = <1650000>;
563 regulator-max-microvolt = <2000000>;
564 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
565 };
566
567 pp3300_l13c:
568 vreg_l13c: ldo13 {
569 regulator-min-microvolt = <2700000>;
570 regulator-max-microvolt = <3544000>;
571 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
572 };
573
574 vreg_bob: bob {
575 regulator-min-microvolt = <3008000>;
576 regulator-max-microvolt = <3960000>;
577 regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
578 };
579 };
580 };
581
582 ap_tp_i2c: &i2c1 {
583 status = "okay";
584 clock-frequency = <400000>;
585
586 trackpad: trackpad@15 {
587 compatible = "elan,ekth3000";
588 reg = <0x15>;
589 pinctrl-names = "default";
590 pinctrl-0 = <&tp_int_odl>;
591
592 interrupt-parent = <&tlmm>;
593 interrupts = <102 IRQ_TYPE_EDGE_FALLING>;
594
595 vcc-supply = <&pp3300_z1>;
596
597 wakeup-source;
598 };
599 };
600
601 ap_h1_i2c: &i2c12 {
602 status = "okay";
603 clock-frequency = <400000>;
604
605 tpm@50 {
606 compatible = "google,cr50";
607 reg = <0x50>;
608
609 pinctrl-names = "default";
610 pinctrl-0 = <&h1_ap_int_odl>;
611
612 interrupt-parent = <&tlmm>;
613 interrupts = <54 IRQ_TYPE_EDGE_RISING>;
614 };
615 };
616
617 ap_ts_pen: &i2c13 {
618 status = "okay";
619 clock-frequency = <400000>;
620
621 ap_ts: touchscreen@10 {
622 compatible = "hid-over-i2c";
623 reg = <0x10>;
624 pinctrl-names = "default";
625 pinctrl-0 = <&ts_int_l>, <&ts_reset_l>;
626
627 interrupt-parent = <&tlmm>;
628 interrupts = <81 IRQ_TYPE_LEVEL_LOW>;
629
630 post-power-on-delay-ms = <20>;
631 hid-descr-addr = <0x0001>;
632
633 vdd-supply = <&pp3300_ts>;
634 };
635 };
636
637 &pm7325_gpios {
638 status = "disabled"; /* No GPIOs are connected */
639 };
640
641 &pmk8350_gpios {
642 status = "disabled"; /* No GPIOs are connected */
643 };
644
645 &pmk8350_rtc {
646 status = "disabled";
647 };
648
649 &pmk8350_vadc {
650 pmk8350_die_temp {
651 reg = <PMK8350_ADC7_DIE_TEMP>;
652 label = "pmk8350_die_temp";
653 qcom,pre-scaling = <1 1>;
654 };
655
656 pmr735a_die_temp {
657 reg = <PMR735A_ADC7_DIE_TEMP>;
658 label = "pmr735a_die_temp";
659 qcom,pre-scaling = <1 1>;
660 };
661 };
662
663 &qfprom {
664 vcc-supply = <&vdd_qfprom>;
665 };
666
667 &qupv3_id_0 {
668 status = "okay";
669 };
670
671 &qupv3_id_1 {
672 status = "okay";
673 };
674
675 &sdhc_1 {
676 status = "okay";
677
678 vmmc-supply = <&pp2950_l7b>;
679 vqmmc-supply = <&pp1800_l19b>;
680 };
681
682 &sdhc_2 {
683 status = "okay";
684
685 pinctrl-0 = <&sdc2_clk>, <&sdc2_cmd>, <&sdc2_data>, <&sd_cd>;
686 pinctrl-1 = <&sdc2_clk_sleep>, <&sdc2_cmd_sleep>, <&sdc2_data_sleep>, <&sd_cd>;
687 vmmc-supply = <&pp2950_l9c>;
688 vqmmc-supply = <&ppvar_l6c>;
689
690 cd-gpios = <&tlmm 91 GPIO_ACTIVE_LOW>;
691 };
692
693 ap_ec_spi: &spi8 {
694 status = "okay";
695
696 pinctrl-0 = <&qup_spi8_data_clk>, <&qup_spi8_cs_gpio_init_high>, <&qup_spi8_cs_gpio>;
697 cs-gpios = <&tlmm 35 GPIO_ACTIVE_LOW>;
698
699 cros_ec: ec@0 {
700 compatible = "google,cros-ec-spi";
701 reg = <0>;
702 interrupt-parent = <&tlmm>;
703 interrupts = <142 IRQ_TYPE_LEVEL_LOW>;
704 pinctrl-names = "default";
705 pinctrl-0 = <&ap_ec_int_l>;
706 spi-max-frequency = <3000000>;
707
708 cros_ec_pwm: pwm {
709 compatible = "google,cros-ec-pwm";
710 #pwm-cells = <1>;
711 };
712
713 i2c_tunnel: i2c-tunnel {
714 compatible = "google,cros-ec-i2c-tunnel";
715 google,remote-bus = <0>;
716 #address-cells = <1>;
717 #size-cells = <0>;
718 };
719
720 typec {
721 compatible = "google,cros-ec-typec";
722 #address-cells = <1>;
723 #size-cells = <0>;
724
725 usb_c0: connector@0 {
726 compatible = "usb-c-connector";
727 reg = <0>;
728 label = "left";
729 power-role = "dual";
730 data-role = "host";
731 try-power-role = "source";
732 };
733
734 usb_c1: connector@1 {
735 compatible = "usb-c-connector";
736 reg = <1>;
737 label = "right";
738 power-role = "dual";
739 data-role = "host";
740 try-power-role = "source";
741 };
742 };
743 };
744 };
745
746 #include <arm/cros-ec-keyboard.dtsi>
747 #include <arm/cros-ec-sbs.dtsi>
748
749 &keyboard_controller {
750 function-row-physmap = <
751 MATRIX_KEY(0x00, 0x02, 0) /* T1 */
752 MATRIX_KEY(0x03, 0x02, 0) /* T2 */
753 MATRIX_KEY(0x02, 0x02, 0) /* T3 */
754 MATRIX_KEY(0x01, 0x02, 0) /* T4 */
755 MATRIX_KEY(0x03, 0x04, 0) /* T5 */
756 MATRIX_KEY(0x02, 0x04, 0) /* T6 */
757 MATRIX_KEY(0x01, 0x04, 0) /* T7 */
758 MATRIX_KEY(0x02, 0x09, 0) /* T8 */
759 MATRIX_KEY(0x01, 0x09, 0) /* T9 */
760 MATRIX_KEY(0x00, 0x04, 0) /* T10 */
761 >;
762 linux,keymap = <
763 MATRIX_KEY(0x00, 0x02, KEY_BACK)
764 MATRIX_KEY(0x03, 0x02, KEY_REFRESH)
765 MATRIX_KEY(0x02, 0x02, KEY_ZOOM)
766 MATRIX_KEY(0x01, 0x02, KEY_SCALE)
767 MATRIX_KEY(0x03, 0x04, KEY_SYSRQ)
768 MATRIX_KEY(0x02, 0x04, KEY_BRIGHTNESSDOWN)
769 MATRIX_KEY(0x01, 0x04, KEY_BRIGHTNESSUP)
770 MATRIX_KEY(0x02, 0x09, KEY_MUTE)
771 MATRIX_KEY(0x01, 0x09, KEY_VOLUMEDOWN)
772 MATRIX_KEY(0x00, 0x04, KEY_VOLUMEUP)
773
774 CROS_STD_MAIN_KEYMAP
775 >;
776 };
777
778 &uart5 {
779 compatible = "qcom,geni-debug-uart";
780 status = "okay";
781 };
782
783 &uart7 {
784 status = "okay";
785 };
786
787 &usb_1 {
788 status = "okay";
789 };
790
791 &usb_1_dwc3 {
792 dr_mode = "host";
793 };
794
795 &usb_1_hsphy {
796 status = "okay";
797
798 vdda-pll-supply = <&vdd_usb_hs0_core>;
799 vdda33-supply = <&vdda_usb_hs0_3p1>;
800 vdda18-supply = <&vdda_usb_hs0_1p8>;
801 };
802
803 &usb_1_qmpphy {
804 status = "okay";
805
806 vdda-phy-supply = <&vdda_usb_ss_dp_1p2>;
807 vdda-pll-supply = <&vdda_usb_ss_dp_core>;
808 };
809
810 &usb_2 {
811 status = "okay";
812 };
813
814 &usb_2_dwc3 {
815 dr_mode = "host";
816 };
817
818 &usb_2_hsphy {
819 status = "okay";
820
821 vdda-pll-supply = <&vdd_usb_hs0_core>;
822 vdda33-supply = <&vdda_usb_hs0_3p1>;
823 vdda18-supply = <&vdda_usb_hs0_1p8>;
824 };
825
826 /* PINCTRL - additions to nodes defined in sc7280.dtsi */
827
828 &dp_hot_plug_det {
829 bias-disable;
830 };
831
832 &pcie1_clkreq_n {
833 bias-pull-up;
834 drive-strength = <2>;
835 };
836
837 &qspi_cs0 {
838 bias-disable;
839 };
840
841 &qspi_clk {
842 bias-disable;
843 };
844
845 &qspi_data01 {
846 /* High-Z when no transfers; nice to park the lines */
847 bias-pull-up;
848 };
849
850 &qup_uart5_rx {
851 drive-strength = <2>;
852 bias-pull-up;
853 };
854
855 &qup_uart5_tx {
856 drive-strength = <2>;
857 bias-disable;
858 };
859
860 &qup_uart7_cts {
861 /*
862 * Configure a pull-down on CTS to match the pull of
863 * the Bluetooth module.
864 */
865 bias-pull-down;
866 };
867
868 &qup_uart7_rts {
869 /* We'll drive RTS, so no pull */
870 drive-strength = <2>;
871 bias-disable;
872 };
873
874 &qup_uart7_tx {
875 /* We'll drive TX, so no pull */
876 drive-strength = <2>;
877 bias-disable;
878 };
879
880 &qup_uart7_rx {
881 /*
882 * Configure a pull-up on RX. This is needed to avoid
883 * garbage data when the TX pin of the Bluetooth module is
884 * in tri-state (module powered off or not driving the
885 * signal yet).
886 */
887 bias-pull-up;
888 };
889
890 &sdc1_clk {
891 bias-disable;
892 drive-strength = <16>;
893 };
894
895 &sdc1_cmd {
896 bias-pull-up;
897 drive-strength = <10>;
898 };
899
900 &sdc1_data {
901 bias-pull-up;
902 drive-strength = <10>;
903 };
904
905 &sdc1_rclk {
906 bias-pull-down;
907 };
908
909 &sdc2_clk {
910 bias-disable;
911 drive-strength = <16>;
912 };
913
914 &sdc2_cmd {
915 bias-pull-up;
916 drive-strength = <10>;
917 };
918
919 &sdc2_data {
920 bias-pull-up;
921 drive-strength = <10>;
922 };
923
924 /* PINCTRL - board-specific pinctrl */
925
926 &pm8350c_gpios {
927 gpio-line-names = "AP_SUSPEND",
928 "",
929 "",
930 "AP_BL_EN",
931 "",
932 "SD_CD_ODL",
933 "",
934 "",
935 "AP_BL_PWM";
936
937 ap_bl_en: ap-bl-en {
938 pins = "gpio4";
939 function = "normal";
940 qcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>;
941 bias-disable;
942
943 /* Force backlight to be disabled to match state at boot. */
944 output-low;
945 };
946 };
947
948 &tlmm {
949 gpio-line-names = "HP_I2C_SDA", /* 0 */
950 "HP_I2C_SCL",
951 "SSD_RST_L",
952 "PE_WAKE_ODL",
953 "AP_TP_I2C_SDA",
954 "AP_TP_I2C_SCL",
955 "UF_CAM_EN",
956 "WF_CAM_EN",
957 "AP_SAR_SENSOR_SDA",
958 "AP_SAR_SENSOR_SCL",
959
960 "", /* 10 */
961 "",
962 "AP_SPI_MOSI",
963 "AP_SPI_MISO",
964 "AP_SPI_CLK",
965 "AP_SPI_CS0_L",
966 "",
967 "",
968 "EDP_HPD",
969 "",
970
971 "UF_CAM_RST_L", /* 20 */
972 "WF_CAM_RST_L",
973 "UART_AP_TX_DBG_RX",
974 "UART_DBG_TX_AP_RX",
975 "EN_PP3300_HUB",
976 "",
977 "HOST2WLAN_SOL",
978 "WLAN2HOST_SOL",
979 "BT_UART_CTS",
980 "BT_UART_RTS",
981
982 "BT_UART_TXD", /* 30 */
983 "BT_UART_RXD",
984 "AP_EC_SPI_MISO",
985 "AP_EC_SPI_MOSI",
986 "AP_EC_SPI_CLK",
987 "AP_EC_SPI_CS_L",
988 "",
989 "",
990 "",
991 "PEN_PDCT_L",
992
993 "IO_BRD_ID0", /* 40 */
994 "IO_BRD_ID1",
995 "EN_FP_RAILS",
996 "PEN_IRQ_L",
997 "AP_SPI_FP_MISO",
998 "AP_SPI_FP_MOSI",
999 "AP_SPI_FP_CLK",
1000 "AP_SPI_FP_CS_L",
1001 "AP_H1_SPI_MISO",
1002 "AP_H1_SPI_MOSI",
1003
1004 "AP_H1_SPI_CLK", /* 50 */
1005 "AP_H1_SPI_CS_L",
1006 "AP_TS_PEN_I2C_SDA",
1007 "AP_TS_PEN_I2C_SCL",
1008 "H1_AP_INT_ODL",
1009 "",
1010 "LCM_RST_1V8_L",
1011 "AMP_EN",
1012 "",
1013 "DP_HOT_PLUG_DET",
1014
1015 "HUB_RST_L", /* 60 */
1016 "FP_TO_AP_IRQ_L",
1017 "",
1018 "",
1019 "UF_CAM_MCLK",
1020 "WF_CAM_MCLK",
1021 "IO_BRD_ID2",
1022 "EN_PP3300_CODEC",
1023 "EC_IN_RW_ODL",
1024 "UF_CAM_SDA",
1025
1026 "UF_CAM_SCL", /* 70 */
1027 "WF_CAM_SDA",
1028 "WF_CAM_SCL",
1029 "AP_BRD_ID0",
1030 "AP_BRD_ID1",
1031 "AP_BRD_ID2",
1032 "",
1033 "FPMCU_BOOT0",
1034 "FP_RST_L",
1035 "PE_CLKREQ_ODL",
1036
1037 "EN_EDP_PP3300", /* 80 */
1038 "TS_INT_L",
1039 "FORCE_USB_BOOT",
1040 "WCD_RST_L",
1041 "WLAN_EN",
1042 "BT_EN",
1043 "WLAN_SW_CTRL",
1044 "PCIE0_RESET_L",
1045 "PCIE0_CLK_REQ_L",
1046 "PCIE0_WAKE_L",
1047
1048 "AS_EN", /* 90 */
1049 "SD_CD_ODL",
1050 "",
1051 /*
1052 * AP_FLASH_WP_L is crossystem ABI. Schematics
1053 * call it BIOS_FLASH_WP_L.
1054 */
1055 "AP_FLASH_WP_L",
1056 "BT_WLAN_SB_CLK",
1057 "BT_WLAN_SB_DATA",
1058 "HP_MCLK",
1059 "HP_BCLK",
1060 "HP_DOUT",
1061 "HP_DIN",
1062
1063 "HP_LRCLK", /* 100 */
1064 "HP_IRQ",
1065 "TP_INT_ODL",
1066 "",
1067 "IO_SKU_ID2",
1068 "TS_RESET_L",
1069 "AMP_BCLK",
1070 "AMP_DIN",
1071 "AMP_LRCLK",
1072 "UIM2_DATA",
1073
1074 "UIM2_CLK", /* 110 */
1075 "UIM2_RST",
1076 "UIM2_PRESENT",
1077 "UIM1_DATA",
1078 "UIM1_CLK",
1079 "UIM1_RST",
1080 "",
1081 "RFFE0_CLK",
1082 "RFFE0_DATA/BOOT_CONFIG_0",
1083 "RFFE1_CLK",
1084
1085 "RFFE1_DATA/BOOT_CONFIG_1", /* 120 */
1086 "RFFE2_CLK",
1087 "RFFE2_DATA/BOOT_CONFIG_2",
1088 "RFFE3_CLK",
1089 "RFFE3_DATA/BOOT_CONFIG_3",
1090 "RFFE4_CLK",
1091 "RFFE4_DATA",
1092 "WCI2_LTE_COEX_RXD",
1093 "WCI2_LTE_COEX_TXD",
1094 "IO_SKU_ID0",
1095
1096 "IO_SKU_ID1", /* 130 */
1097 "",
1098 "",
1099 "QLINK0_REQ",
1100 "QLINK0_EN",
1101 "QLINK0_WMSS_RESET_L",
1102 "QLINK1_REQ",
1103 "QLINK1_EN",
1104 "QLINK1_WMSS_RESET_L",
1105 "FORCED_USB_BOOT_POL",
1106
1107 "", /* 140 */
1108 "P_SENSOR_INT_L",
1109 "AP_EC_INT_L",
1110 "",
1111 "WCD_SWR_TX_CLK",
1112 "WCD_SWR_TX_DATA_0",
1113 "WCD_SWR_TX_DATA_1",
1114 "WCD_SWR_RX_CLK",
1115 "WCD_SWR_RX_DATA_0",
1116 "WCD_SWR_RX_DATA_1",
1117
1118 "", /* 150 */
1119 "",
1120 "",
1121 "",
1122 "",
1123 "",
1124 "",
1125 "",
1126 "WCD_SWR_TX_DATA_2",
1127 "",
1128
1129 "", /* 160 */
1130 "",
1131 "",
1132 "",
1133 "",
1134 "",
1135 "",
1136 "",
1137 "",
1138 "",
1139
1140 "", /* 170 */
1141 "SENS_UART_TXD",
1142 "SENS_UART_RXD",
1143 "",
1144 "",
1145 "";
1146
1147 /*
1148 * pinctrl settings for pins that have no real owners.
1149 */
1150 pinctrl-names = "default";
1151 pinctrl-0 = <&bios_flash_wp_l>;
1152
1153 amp_en: amp-en {
1154 pins = "gpio57";
1155 function = "gpio";
1156 bias-pull-down;
1157 };
1158
1159 ap_ec_int_l: ap-ec-int-l {
1160 pins = "gpio142";
1161 input-enable;
1162 bias-pull-up;
1163 };
1164
1165 bios_flash_wp_l: bios-flash-wp-l {
1166 pins = "gpio93";
1167 function = "gpio";
1168 input-enable;
1169 bias-disable;
1170 };
1171
1172 bt_en: bt-en {
1173 pins = "gpio85";
1174 function = "gpio";
1175 drive-strength = <2>;
1176 output-low;
1177 bias-pull-down;
1178 };
1179
1180 en_fp_rails: en-fp-rails {
1181 pins = "gpio42";
1182 drive-strength = <2>;
1183 output-high;
1184 bias-disable;
1185 };
1186
1187 en_pp3300_codec: en-pp3300-codec {
1188 pins = "gpio67";
1189 drive-strength = <2>;
1190 bias-disable;
1191 };
1192
1193 en_pp3300_dx_edp: en-pp3300-dx-edp {
1194 pins = "gpio80";
1195 function = "gpio";
1196 drive-strength = <2>;
1197 /* Has external pulldown */
1198 bias-disable;
1199 };
1200
1201 en_pp3300_hub: en-pp3300-hub {
1202 pins = "gpio24";
1203 function = "gpio";
1204 drive-strength = <2>;
1205 /* Has external pulldown */
1206 bias-disable;
1207 };
1208
1209 fp_to_ap_irq_l: fp-to-ap-irq-l {
1210 pins = "gpio61";
1211 function = "gpio";
1212 input-enable;
1213 /* Has external pullup */
1214 bias-disable;
1215 };
1216
1217 h1_ap_int_odl: h1-ap-int-odl {
1218 pins = "gpio54";
1219 function = "gpio";
1220 input-enable;
1221 bias-pull-up;
1222 };
1223
1224 hp_irq: hp-irq {
1225 pins = "gpio101";
1226 function = "gpio";
1227 bias-pull-up;
1228 };
1229
1230 p_sensor_int_l: p-sensor-int-l {
1231 pins = "gpio141";
1232 function = "gpio";
1233 input-enable;
1234 bias-pull-up;
1235 };
1236
1237 pen_irq_l: pen-irq-l {
1238 pins = "gpio43";
1239 function = "gpio";
1240 /* Has external pullup */
1241 bias-disable;
1242 };
1243
1244 pen_pdct_l: pen-pdct-l {
1245 pins = "gpio39";
1246 function = "gpio";
1247 /* Has external pullup */
1248 bias-disable;
1249 };
1250
1251 qup_spi8_cs_gpio_init_high: qup-spi8-cs-gpio-init-high {
1252 pins = "gpio35";
1253 output-high;
1254 };
1255
1256 qup_spi11_cs_gpio_init_high: qup-spi11-cs-gpio-init-high {
1257 pins = "gpio47";
1258 output-high;
1259 };
1260
1261 qup_spi12_cs_gpio_init_high: qup-spi12-cs-gpio-init-high {
1262 pins = "gpio51";
1263 output-high;
1264 };
1265
1266 qup_uart7_sleep_cts: qup-uart7-sleep-cts {
1267 pins = "gpio28";
1268 function = "gpio";
1269 /*
1270 * Configure a pull-down on CTS to match the pull of
1271 * the Bluetooth module.
1272 */
1273 bias-pull-down;
1274 };
1275
1276 qup_uart7_sleep_rts: qup-uart7-sleep-rts {
1277 pins = "gpio29";
1278 function = "gpio";
1279 /*
1280 * Configure pull-down on RTS. As RTS is active low
1281 * signal, pull it low to indicate the BT SoC that it
1282 * can wakeup the system anytime from suspend state by
1283 * pulling RX low (by sending wakeup bytes).
1284 */
1285 bias-pull-down;
1286 };
1287
1288 qup_uart7_sleep_rx: qup-uart7-sleep-rx {
1289 pins = "gpio31";
1290 function = "gpio";
1291 /*
1292 * Configure a pull-up on RX. This is needed to avoid
1293 * garbage data when the TX pin of the Bluetooth module
1294 * is floating which may cause spurious wakeups.
1295 */
1296 bias-pull-up;
1297 };
1298
1299 qup_uart7_sleep_tx: qup-uart7-sleep-tx {
1300 pins = "gpio30";
1301 function = "gpio";
1302 /*
1303 * Configure pull-up on TX when it isn't actively driven
1304 * to prevent BT SoC from receiving garbage during sleep.
1305 */
1306 bias-pull-up;
1307 };
1308
1309 sd_cd: sd-cd {
1310 pins = "gpio91";
1311 function = "gpio";
1312 bias-pull-up;
1313 };
1314
1315 tp_int_odl: tp-int-odl {
1316 pins = "gpio102";
1317 function = "gpio";
1318 /* Has external pullup */
1319 bias-disable;
1320 };
1321
1322 ts_int_l: ts-int-l {
1323 pins = "gpio81";
1324 function = "gpio";
1325 /* Has external pullup */
1326 bias-pull-up;
1327 };
1328
1329 ts_reset_l: ts-reset-l {
1330 pins = "gpio105";
1331 function = "gpio";
1332 /* Has external pullup */
1333 bias-disable;
1334 drive-strength = <2>;
1335 };
1336
1337 uf_cam_en: uf-cam-en {
1338 pins = "gpio6";
1339 function = "gpio";
1340 drive-strength = <2>;
1341 /* Has external pulldown */
1342 bias-disable;
1343 };
1344
1345 wf_cam_en: wf-cam-en {
1346 pins = "gpio7";
1347 function = "gpio";
1348 drive-strength = <2>;
1349 /* Has external pulldown */
1350 bias-disable;
1351 };
1352 };
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