sdm845-db845c.dts

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    1 // SPDX-License-Identifier: GPL-2.0
    2 /*
    3  * Copyright (c) 2019, Linaro Ltd.
    4  */
    5 
    6 /dts-v1/;
    7 
    8 #include <dt-bindings/leds/common.h>
    9 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
   10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
   11 #include <dt-bindings/sound/qcom,q6afe.h>
   12 #include <dt-bindings/sound/qcom,q6asm.h>
   13 #include "sdm845.dtsi"
   14 #include "pm8998.dtsi"
   15 #include "pmi8998.dtsi"
   16 
   17 / {
   18         model = "Thundercomm Dragonboard 845c";
   19         compatible = "thundercomm,db845c", "qcom,sdm845";
   20         qcom,msm-id = <341 0x20001>;
   21         qcom,board-id = <8 0>;
   22 
   23         aliases {
   24                 serial0 = &uart9;
   25                 hsuart0 = &uart6;
   26         };
   27 
   28         chosen {
   29                 stdout-path = "serial0:115200n8";
   30         };
   31 
   32         /* Fixed crystal oscillator dedicated to MCP2517FD */
   33         clk40M: can-clock {
   34                 compatible = "fixed-clock";
   35                 #clock-cells = <0>;
   36                 clock-frequency = <40000000>;
   37         };
   38 
   39         dc12v: dc12v-regulator {
   40                 compatible = "regulator-fixed";
   41                 regulator-name = "DC12V";
   42                 regulator-min-microvolt = <12000000>;
   43                 regulator-max-microvolt = <12000000>;
   44                 regulator-always-on;
   45         };
   46 
   47         gpio-keys {
   48                 compatible = "gpio-keys";
   49                 autorepeat;
   50 
   51                 pinctrl-names = "default";
   52                 pinctrl-0 = <&vol_up_pin_a>;
   53 
   54                 key-vol-up {
   55                         label = "Volume Up";
   56                         linux,code = <KEY_VOLUMEUP>;
   57                         gpios = <&pm8998_gpio 6 GPIO_ACTIVE_LOW>;
   58                 };
   59         };
   60 
   61         leds {
   62                 compatible = "gpio-leds";
   63 
   64                 led-0 {
   65                         label = "green:user4";
   66                         function = LED_FUNCTION_INDICATOR;
   67                         color = <LED_COLOR_ID_GREEN>;
   68                         gpios = <&pm8998_gpio 13 GPIO_ACTIVE_HIGH>;
   69                         linux,default-trigger = "panic-indicator";
   70                         default-state = "off";
   71                 };
   72 
   73                 led-1 {
   74                         label = "yellow:wlan";
   75                         function = LED_FUNCTION_WLAN;
   76                         color = <LED_COLOR_ID_YELLOW>;
   77                         gpios = <&pm8998_gpio 9 GPIO_ACTIVE_HIGH>;
   78                         linux,default-trigger = "phy0tx";
   79                         default-state = "off";
   80                 };
   81 
   82                 led-2 {
   83                         label = "blue:bt";
   84                         function = LED_FUNCTION_BLUETOOTH;
   85                         color = <LED_COLOR_ID_BLUE>;
   86                         gpios = <&pm8998_gpio 5 GPIO_ACTIVE_HIGH>;
   87                         linux,default-trigger = "bluetooth-power";
   88                         default-state = "off";
   89                 };
   90         };
   91 
   92         hdmi-out {
   93                 compatible = "hdmi-connector";
   94                 type = "a";
   95 
   96                 port {
   97                         hdmi_con: endpoint {
   98                                 remote-endpoint = <&lt9611_out>;
   99                         };
  100                 };
  101         };
  102 
  103         lt9611_1v8: lt9611-vdd18-regulator {
  104                 compatible = "regulator-fixed";
  105                 regulator-name = "LT9611_1V8";
  106 
  107                 vin-supply = <&vdc_5v>;
  108                 regulator-min-microvolt = <1800000>;
  109                 regulator-max-microvolt = <1800000>;
  110 
  111                 gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
  112                 enable-active-high;
  113         };
  114 
  115         lt9611_3v3: lt9611-3v3 {
  116                 compatible = "regulator-fixed";
  117                 regulator-name = "LT9611_3V3";
  118 
  119                 vin-supply = <&vdc_3v3>;
  120                 regulator-min-microvolt = <3300000>;
  121                 regulator-max-microvolt = <3300000>;
  122 
  123                 // TODO: make it possible to drive same GPIO from two clients
  124                 // gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
  125                 // enable-active-high;
  126         };
  127 
  128         pcie0_1p05v: pcie-0-1p05v-regulator {
  129                 compatible = "regulator-fixed";
  130                 regulator-name = "PCIE0_1.05V";
  131 
  132                 vin-supply = <&vbat>;
  133                 regulator-min-microvolt = <1050000>;
  134                 regulator-max-microvolt = <1050000>;
  135 
  136                 // TODO: make it possible to drive same GPIO from two clients
  137                 // gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>;
  138                 // enable-active-high;
  139         };
  140 
  141         cam0_dvdd_1v2: reg_cam0_dvdd_1v2 {
  142                 compatible = "regulator-fixed";
  143                 regulator-name = "CAM0_DVDD_1V2";
  144                 regulator-min-microvolt = <1200000>;
  145                 regulator-max-microvolt = <1200000>;
  146                 enable-active-high;
  147                 gpio = <&pm8998_gpio 12 GPIO_ACTIVE_HIGH>;
  148                 pinctrl-names = "default";
  149                 pinctrl-0 = <&cam0_dvdd_1v2_en_default>;
  150                 vin-supply = <&vbat>;
  151         };
  152 
  153         cam0_avdd_2v8: reg_cam0_avdd_2v8 {
  154                 compatible = "regulator-fixed";
  155                 regulator-name = "CAM0_AVDD_2V8";
  156                 regulator-min-microvolt = <2800000>;
  157                 regulator-max-microvolt = <2800000>;
  158                 enable-active-high;
  159                 gpio = <&pm8998_gpio 10 GPIO_ACTIVE_HIGH>;
  160                 pinctrl-names = "default";
  161                 pinctrl-0 = <&cam0_avdd_2v8_en_default>;
  162                 vin-supply = <&vbat>;
  163         };
  164 
  165         /* This regulator is enabled when the VREG_LVS1A_1P8 trace is enabled */
  166         cam3_avdd_2v8: reg_cam3_avdd_2v8 {
  167                 compatible = "regulator-fixed";
  168                 regulator-name = "CAM3_AVDD_2V8";
  169                 regulator-min-microvolt = <2800000>;
  170                 regulator-max-microvolt = <2800000>;
  171                 regulator-always-on;
  172                 vin-supply = <&vbat>;
  173         };
  174 
  175         pcie0_3p3v_dual: vldo-3v3-regulator {
  176                 compatible = "regulator-fixed";
  177                 regulator-name = "VLDO_3V3";
  178 
  179                 vin-supply = <&vbat>;
  180                 regulator-min-microvolt = <3300000>;
  181                 regulator-max-microvolt = <3300000>;
  182 
  183                 gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>;
  184                 enable-active-high;
  185 
  186                 pinctrl-names = "default";
  187                 pinctrl-0 = <&pcie0_pwren_state>;
  188         };
  189 
  190         v5p0_hdmiout: v5p0-hdmiout-regulator {
  191                 compatible = "regulator-fixed";
  192                 regulator-name = "V5P0_HDMIOUT";
  193 
  194                 vin-supply = <&vdc_5v>;
  195                 regulator-min-microvolt = <500000>;
  196                 regulator-max-microvolt = <500000>;
  197 
  198                 // TODO: make it possible to drive same GPIO from two clients
  199                 // gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
  200                 // enable-active-high;
  201         };
  202 
  203         vbat: vbat-regulator {
  204                 compatible = "regulator-fixed";
  205                 regulator-name = "VBAT";
  206 
  207                 vin-supply = <&dc12v>;
  208                 regulator-min-microvolt = <4200000>;
  209                 regulator-max-microvolt = <4200000>;
  210                 regulator-always-on;
  211         };
  212 
  213         vbat_som: vbat-som-regulator {
  214                 compatible = "regulator-fixed";
  215                 regulator-name = "VBAT_SOM";
  216 
  217                 vin-supply = <&dc12v>;
  218                 regulator-min-microvolt = <4200000>;
  219                 regulator-max-microvolt = <4200000>;
  220                 regulator-always-on;
  221         };
  222 
  223         vdc_3v3: vdc-3v3-regulator {
  224                 compatible = "regulator-fixed";
  225                 regulator-name = "VDC_3V3";
  226                 vin-supply = <&dc12v>;
  227                 regulator-min-microvolt = <3300000>;
  228                 regulator-max-microvolt = <3300000>;
  229                 regulator-always-on;
  230         };
  231 
  232         vdc_5v: vdc-5v-regulator {
  233                 compatible = "regulator-fixed";
  234                 regulator-name = "VDC_5V";
  235 
  236                 vin-supply = <&dc12v>;
  237                 regulator-min-microvolt = <500000>;
  238                 regulator-max-microvolt = <500000>;
  239                 regulator-always-on;
  240         };
  241 
  242         vreg_s4a_1p8: vreg-s4a-1p8 {
  243                 compatible = "regulator-fixed";
  244                 regulator-name = "vreg_s4a_1p8";
  245 
  246                 regulator-min-microvolt = <1800000>;
  247                 regulator-max-microvolt = <1800000>;
  248                 regulator-always-on;
  249         };
  250 
  251         vph_pwr: vph-pwr-regulator {
  252                 compatible = "regulator-fixed";
  253                 regulator-name = "vph_pwr";
  254 
  255                 vin-supply = <&vbat_som>;
  256         };
  257 };
  258 
  259 &adsp_pas {
  260         status = "okay";
  261 
  262         firmware-name = "qcom/sdm845/adsp.mbn";
  263 };
  264 
  265 &apps_rsc {
  266         pm8998-rpmh-regulators {
  267                 compatible = "qcom,pm8998-rpmh-regulators";
  268                 qcom,pmic-id = "a";
  269                 vdd-s1-supply = <&vph_pwr>;
  270                 vdd-s2-supply = <&vph_pwr>;
  271                 vdd-s3-supply = <&vph_pwr>;
  272                 vdd-s4-supply = <&vph_pwr>;
  273                 vdd-s5-supply = <&vph_pwr>;
  274                 vdd-s6-supply = <&vph_pwr>;
  275                 vdd-s7-supply = <&vph_pwr>;
  276                 vdd-s8-supply = <&vph_pwr>;
  277                 vdd-s9-supply = <&vph_pwr>;
  278                 vdd-s10-supply = <&vph_pwr>;
  279                 vdd-s11-supply = <&vph_pwr>;
  280                 vdd-s12-supply = <&vph_pwr>;
  281                 vdd-s13-supply = <&vph_pwr>;
  282                 vdd-l1-l27-supply = <&vreg_s7a_1p025>;
  283                 vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>;
  284                 vdd-l3-l11-supply = <&vreg_s7a_1p025>;
  285                 vdd-l4-l5-supply = <&vreg_s7a_1p025>;
  286                 vdd-l6-supply = <&vph_pwr>;
  287                 vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
  288                 vdd-l9-supply = <&vreg_bob>;
  289                 vdd-l10-l23-l25-supply = <&vreg_bob>;
  290                 vdd-l13-l19-l21-supply = <&vreg_bob>;
  291                 vdd-l16-l28-supply = <&vreg_bob>;
  292                 vdd-l18-l22-supply = <&vreg_bob>;
  293                 vdd-l20-l24-supply = <&vreg_bob>;
  294                 vdd-l26-supply = <&vreg_s3a_1p35>;
  295                 vin-lvs-1-2-supply = <&vreg_s4a_1p8>;
  296 
  297                 vreg_s3a_1p35: smps3 {
  298                         regulator-min-microvolt = <1352000>;
  299                         regulator-max-microvolt = <1352000>;
  300                 };
  301 
  302                 vreg_s5a_2p04: smps5 {
  303                         regulator-min-microvolt = <1904000>;
  304                         regulator-max-microvolt = <2040000>;
  305                 };
  306 
  307                 vreg_s7a_1p025: smps7 {
  308                         regulator-min-microvolt = <900000>;
  309                         regulator-max-microvolt = <1028000>;
  310                 };
  311 
  312                 vreg_l1a_0p875: ldo1 {
  313                         regulator-min-microvolt = <880000>;
  314                         regulator-max-microvolt = <880000>;
  315                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
  316                 };
  317 
  318                 vreg_l5a_0p8: ldo5 {
  319                         regulator-min-microvolt = <800000>;
  320                         regulator-max-microvolt = <800000>;
  321                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
  322                 };
  323 
  324                 vreg_l12a_1p8: ldo12 {
  325                         regulator-min-microvolt = <1800000>;
  326                         regulator-max-microvolt = <1800000>;
  327                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
  328                 };
  329 
  330                 vreg_l7a_1p8: ldo7 {
  331                         regulator-min-microvolt = <1800000>;
  332                         regulator-max-microvolt = <1800000>;
  333                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
  334                 };
  335 
  336                 vreg_l13a_2p95: ldo13 {
  337                         regulator-min-microvolt = <1800000>;
  338                         regulator-max-microvolt = <2960000>;
  339                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
  340                 };
  341 
  342                 vreg_l17a_1p3: ldo17 {
  343                         regulator-min-microvolt = <1304000>;
  344                         regulator-max-microvolt = <1304000>;
  345                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
  346                 };
  347 
  348                 vreg_l20a_2p95: ldo20 {
  349                         regulator-min-microvolt = <2960000>;
  350                         regulator-max-microvolt = <2968000>;
  351                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
  352                 };
  353 
  354                 vreg_l21a_2p95: ldo21 {
  355                         regulator-min-microvolt = <2960000>;
  356                         regulator-max-microvolt = <2968000>;
  357                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
  358                 };
  359 
  360                 vreg_l24a_3p075: ldo24 {
  361                         regulator-min-microvolt = <3088000>;
  362                         regulator-max-microvolt = <3088000>;
  363                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
  364                 };
  365 
  366                 vreg_l25a_3p3: ldo25 {
  367                         regulator-min-microvolt = <3300000>;
  368                         regulator-max-microvolt = <3312000>;
  369                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
  370                 };
  371 
  372                 vreg_l26a_1p2: ldo26 {
  373                         regulator-min-microvolt = <1200000>;
  374                         regulator-max-microvolt = <1200000>;
  375                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
  376                 };
  377 
  378                 vreg_lvs1a_1p8: lvs1 {
  379                         regulator-min-microvolt = <1800000>;
  380                         regulator-max-microvolt = <1800000>;
  381                         regulator-always-on;
  382                 };
  383 
  384                 vreg_lvs2a_1p8: lvs2 {
  385                         regulator-min-microvolt = <1800000>;
  386                         regulator-max-microvolt = <1800000>;
  387                         regulator-always-on;
  388                 };
  389         };
  390 
  391         pmi8998-rpmh-regulators {
  392                 compatible = "qcom,pmi8998-rpmh-regulators";
  393                 qcom,pmic-id = "b";
  394 
  395                 vdd-bob-supply = <&vph_pwr>;
  396 
  397                 vreg_bob: bob {
  398                         regulator-min-microvolt = <3312000>;
  399                         regulator-max-microvolt = <3600000>;
  400                         regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
  401                         regulator-allow-bypass;
  402                 };
  403         };
  404 };
  405 
  406 &cdsp_pas {
  407         status = "okay";
  408         firmware-name = "qcom/sdm845/cdsp.mbn";
  409 };
  410 
  411 &dsi0 {
  412         status = "okay";
  413         vdda-supply = <&vreg_l26a_1p2>;
  414 
  415         ports {
  416                 port@1 {
  417                         endpoint {
  418                                 remote-endpoint = <&lt9611_a>;
  419                                 data-lanes = <0 1 2 3>;
  420                         };
  421                 };
  422         };
  423 };
  424 
  425 &dsi0_phy {
  426         status = "okay";
  427         vdds-supply = <&vreg_l1a_0p875>;
  428 };
  429 
  430 &gcc {
  431         protected-clocks = <GCC_QSPI_CORE_CLK>,
  432                            <GCC_QSPI_CORE_CLK_SRC>,
  433                            <GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
  434                            <GCC_LPASS_Q6_AXI_CLK>,
  435                            <GCC_LPASS_SWAY_CLK>;
  436 };
  437 
  438 &gmu {
  439         status = "okay";
  440 };
  441 
  442 &gpi_dma0 {
  443         status = "okay";
  444 };
  445 
  446 &gpi_dma1 {
  447         status = "okay";
  448 };
  449 
  450 &gpu {
  451         status = "okay";
  452         zap-shader {
  453                 memory-region = <&gpu_mem>;
  454                 firmware-name = "qcom/sdm845/a630_zap.mbn";
  455         };
  456 };
  457 
  458 &i2c10 {
  459         status = "okay";
  460         clock-frequency = <400000>;
  461 
  462         lt9611_codec: hdmi-bridge@3b {
  463                 compatible = "lontium,lt9611";
  464                 reg = <0x3b>;
  465                 #sound-dai-cells = <1>;
  466 
  467                 interrupts-extended = <&tlmm 84 IRQ_TYPE_EDGE_FALLING>;
  468 
  469                 reset-gpios = <&tlmm 128 GPIO_ACTIVE_HIGH>;
  470 
  471                 vdd-supply = <&lt9611_1v8>;
  472                 vcc-supply = <&lt9611_3v3>;
  473 
  474                 pinctrl-names = "default";
  475                 pinctrl-0 = <&lt9611_irq_pin>, <&dsi_sw_sel>;
  476 
  477                 ports {
  478                         #address-cells = <1>;
  479                         #size-cells = <0>;
  480 
  481                         port@0 {
  482                                 reg = <0>;
  483 
  484                                 lt9611_a: endpoint {
  485                                         remote-endpoint = <&dsi0_out>;
  486                                 };
  487                         };
  488 
  489                         port@2 {
  490                                 reg = <2>;
  491 
  492                                 lt9611_out: endpoint {
  493                                         remote-endpoint = <&hdmi_con>;
  494                                 };
  495                         };
  496                 };
  497         };
  498 };
  499 
  500 &i2c11 {
  501         /* On Low speed expansion */
  502         clock-frequency = <100000>;
  503         label = "LS-I2C1";
  504         status = "okay";
  505 };
  506 
  507 &i2c14 {
  508         /* On Low speed expansion */
  509         clock-frequency = <100000>;
  510         label = "LS-I2C0";
  511         status = "okay";
  512 };
  513 
  514 &mdss {
  515         status = "okay";
  516 };
  517 
  518 &mss_pil {
  519         status = "okay";
  520         firmware-name = "qcom/sdm845/mba.mbn", "qcom/sdm845/modem.mbn";
  521 };
  522 
  523 &pcie0 {
  524         status = "okay";
  525         perst-gpio = <&tlmm 35 GPIO_ACTIVE_LOW>;
  526         enable-gpio = <&tlmm 134 GPIO_ACTIVE_HIGH>;
  527 
  528         vddpe-3v3-supply = <&pcie0_3p3v_dual>;
  529 
  530         pinctrl-names = "default";
  531         pinctrl-0 = <&pcie0_default_state>;
  532 };
  533 
  534 &pcie0_phy {
  535         status = "okay";
  536 
  537         vdda-phy-supply = <&vreg_l1a_0p875>;
  538         vdda-pll-supply = <&vreg_l26a_1p2>;
  539 };
  540 
  541 &pcie1 {
  542         status = "okay";
  543         perst-gpio = <&tlmm 102 GPIO_ACTIVE_LOW>;
  544 
  545         pinctrl-names = "default";
  546         pinctrl-0 = <&pcie1_default_state>;
  547 };
  548 
  549 &pcie1_phy {
  550         status = "okay";
  551 
  552         vdda-phy-supply = <&vreg_l1a_0p875>;
  553         vdda-pll-supply = <&vreg_l26a_1p2>;
  554 };
  555 
  556 &pm8998_gpio {
  557         gpio-line-names =
  558                 "NC",
  559                 "NC",
  560                 "WLAN_SW_CTRL",
  561                 "NC",
  562                 "PM_GPIO5_BLUE_BT_LED",
  563                 "VOL_UP_N",
  564                 "NC",
  565                 "ADC_IN1",
  566                 "PM_GPIO9_YEL_WIFI_LED",
  567                 "CAM0_AVDD_EN",
  568                 "NC",
  569                 "CAM0_DVDD_EN",
  570                 "PM_GPIO13_GREEN_U4_LED",
  571                 "DIV_CLK2",
  572                 "NC",
  573                 "NC",
  574                 "NC",
  575                 "SMB_STAT",
  576                 "NC",
  577                 "NC",
  578                 "ADC_IN2",
  579                 "OPTION1",
  580                 "WCSS_PWR_REQ",
  581                 "PM845_GPIO24",
  582                 "OPTION2",
  583                 "PM845_SLB";
  584 
  585         cam0_dvdd_1v2_en_default: cam0-dvdd-1v2-en-state {
  586                 pins = "gpio12";
  587                 function = "normal";
  588 
  589                 bias-pull-up;
  590                 drive-push-pull;
  591                 qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>;
  592         };
  593 
  594         cam0_avdd_2v8_en_default: cam0-avdd-2v8-en-state {
  595                 pins = "gpio10";
  596                 function = "normal";
  597 
  598                 bias-pull-up;
  599                 drive-push-pull;
  600                 qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>;
  601         };
  602 
  603         vol_up_pin_a: vol-up-active-state {
  604                 pins = "gpio6";
  605                 function = "normal";
  606                 input-enable;
  607                 bias-pull-up;
  608                 qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
  609         };
  610 };
  611 
  612 &pm8998_pon {
  613         resin {
  614                 compatible = "qcom,pm8941-resin";
  615                 interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>;
  616                 debounce = <15625>;
  617                 bias-pull-up;
  618                 linux,code = <KEY_VOLUMEDOWN>;
  619         };
  620 };
  621 
  622 &pmi8998_lpg {
  623         status = "okay";
  624 
  625         qcom,power-source = <1>;
  626 
  627         led@3 {
  628                 reg = <3>;
  629                 color = <LED_COLOR_ID_GREEN>;
  630                 function = LED_FUNCTION_HEARTBEAT;
  631                 function-enumerator = <3>;
  632 
  633                 linux,default-trigger = "heartbeat";
  634                 default-state = "on";
  635         };
  636 
  637         led@4 {
  638                 reg = <4>;
  639                 color = <LED_COLOR_ID_GREEN>;
  640                 function = LED_FUNCTION_INDICATOR;
  641                 function-enumerator = <2>;
  642         };
  643 
  644         led@5 {
  645                 reg = <5>;
  646                 color = <LED_COLOR_ID_GREEN>;
  647                 function = LED_FUNCTION_INDICATOR;
  648                 function-enumerator = <1>;
  649         };
  650 };
  651 
  652 /* QUAT I2S Uses 4 I2S SD Lines for audio on LT9611 HDMI Bridge */
  653 &q6afedai {
  654         qi2s@22 {
  655                 reg = <QUATERNARY_MI2S_RX>;
  656                 qcom,sd-lines = <0 1 2 3>;
  657         };
  658 };
  659 
  660 &q6asmdai {
  661         dai@0 {
  662                 reg = <0>;
  663         };
  664 
  665         dai@1 {
  666                 reg = <1>;
  667         };
  668 
  669         dai@2 {
  670                 reg = <2>;
  671         };
  672 
  673         dai@3 {
  674                 reg = <3>;
  675                 direction = <2>;
  676                 is-compress-dai;
  677         };
  678 };
  679 
  680 &qupv3_id_0 {
  681         status = "okay";
  682 };
  683 
  684 &qupv3_id_1 {
  685         status = "okay";
  686 };
  687 
  688 &sdhc_2 {
  689         status = "okay";
  690 
  691         pinctrl-names = "default";
  692         pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>;
  693 
  694         vmmc-supply = <&vreg_l21a_2p95>;
  695         vqmmc-supply = <&vreg_l13a_2p95>;
  696 
  697         bus-width = <4>;
  698         cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW>;
  699 };
  700 
  701 &sound {
  702         compatible = "qcom,db845c-sndcard";
  703         pinctrl-0 = <&quat_mi2s_active
  704                          &quat_mi2s_sd0_active
  705                          &quat_mi2s_sd1_active
  706                          &quat_mi2s_sd2_active
  707                          &quat_mi2s_sd3_active>;
  708         pinctrl-names = "default";
  709         model = "DB845c";
  710         audio-routing =
  711                 "RX_BIAS", "MCLK",
  712                 "AMIC1", "MIC BIAS1",
  713                 "AMIC2", "MIC BIAS2",
  714                 "DMIC0", "MIC BIAS1",
  715                 "DMIC1", "MIC BIAS1",
  716                 "DMIC2", "MIC BIAS3",
  717                 "DMIC3", "MIC BIAS3",
  718                 "SpkrLeft IN", "SPK1 OUT",
  719                 "SpkrRight IN", "SPK2 OUT",
  720                 "MM_DL1",  "MultiMedia1 Playback",
  721                 "MM_DL2",  "MultiMedia2 Playback",
  722                 "MM_DL4",  "MultiMedia4 Playback",
  723                 "MultiMedia3 Capture", "MM_UL3";
  724 
  725         mm1-dai-link {
  726                 link-name = "MultiMedia1";
  727                 cpu {
  728                         sound-dai = <&q6asmdai  MSM_FRONTEND_DAI_MULTIMEDIA1>;
  729                 };
  730         };
  731 
  732         mm2-dai-link {
  733                 link-name = "MultiMedia2";
  734                 cpu {
  735                         sound-dai = <&q6asmdai  MSM_FRONTEND_DAI_MULTIMEDIA2>;
  736                 };
  737         };
  738 
  739         mm3-dai-link {
  740                 link-name = "MultiMedia3";
  741                 cpu {
  742                         sound-dai = <&q6asmdai  MSM_FRONTEND_DAI_MULTIMEDIA3>;
  743                 };
  744         };
  745 
  746         mm4-dai-link {
  747                 link-name = "MultiMedia4";
  748                 cpu {
  749                         sound-dai = <&q6asmdai  MSM_FRONTEND_DAI_MULTIMEDIA4>;
  750                 };
  751         };
  752 
  753         hdmi-dai-link {
  754                 link-name = "HDMI Playback";
  755                 cpu {
  756                         sound-dai = <&q6afedai QUATERNARY_MI2S_RX>;
  757                 };
  758 
  759                 platform {
  760                         sound-dai = <&q6routing>;
  761                 };
  762 
  763                 codec {
  764                         sound-dai = <&lt9611_codec 0>;
  765                 };
  766         };
  767 
  768         slim-dai-link {
  769                 link-name = "SLIM Playback";
  770                 cpu {
  771                         sound-dai = <&q6afedai SLIMBUS_0_RX>;
  772                 };
  773 
  774                 platform {
  775                         sound-dai = <&q6routing>;
  776                 };
  777 
  778                 codec {
  779                         sound-dai = <&left_spkr>, <&right_spkr>, <&swm 0>, <&wcd9340 0>;
  780                 };
  781         };
  782 
  783         slimcap-dai-link {
  784                 link-name = "SLIM Capture";
  785                 cpu {
  786                         sound-dai = <&q6afedai SLIMBUS_0_TX>;
  787                 };
  788 
  789                 platform {
  790                         sound-dai = <&q6routing>;
  791                 };
  792 
  793                 codec {
  794                         sound-dai = <&wcd9340 1>;
  795                 };
  796         };
  797 };
  798 
  799 &spi0 {
  800         status = "okay";
  801         pinctrl-names = "default";
  802         pinctrl-0 = <&qup_spi0_default>;
  803         cs-gpios = <&tlmm 3 GPIO_ACTIVE_LOW>;
  804 
  805         can@0 {
  806                 compatible = "microchip,mcp2517fd";
  807                 reg = <0>;
  808                 clocks = <&clk40M>;
  809                 interrupts-extended = <&tlmm 104 IRQ_TYPE_LEVEL_LOW>;
  810                 spi-max-frequency = <10000000>;
  811                 vdd-supply = <&vdc_5v>;
  812                 xceiver-supply = <&vdc_5v>;
  813         };
  814 };
  815 
  816 &spi2 {
  817         /* On Low speed expansion */
  818         label = "LS-SPI0";
  819         status = "okay";
  820 };
  821 
  822 &tlmm {
  823         cam0_default: cam0_default {
  824                 rst {
  825                         pins = "gpio9";
  826                         function = "gpio";
  827 
  828                         drive-strength = <16>;
  829                         bias-disable;
  830                 };
  831 
  832                 mclk0 {
  833                         pins = "gpio13";
  834                         function = "cam_mclk";
  835 
  836                         drive-strength = <16>;
  837                         bias-disable;
  838                 };
  839         };
  840 
  841         cam3_default: cam3_default {
  842                 rst {
  843                         function = "gpio";
  844                         pins = "gpio21";
  845 
  846                         drive-strength = <16>;
  847                         bias-disable;
  848                 };
  849 
  850                 mclk3 {
  851                         function = "cam_mclk";
  852                         pins = "gpio16";
  853 
  854                         drive-strength = <16>;
  855                         bias-disable;
  856                 };
  857         };
  858 
  859         dsi_sw_sel: dsi-sw-sel {
  860                 pins = "gpio120";
  861                 function = "gpio";
  862 
  863                 drive-strength = <2>;
  864                 bias-disable;
  865                 output-high;
  866         };
  867 
  868         lt9611_irq_pin: lt9611-irq {
  869                 pins = "gpio84";
  870                 function = "gpio";
  871                 bias-disable;
  872         };
  873 
  874         pcie0_default_state: pcie0-default {
  875                 clkreq {
  876                         pins = "gpio36";
  877                         function = "pci_e0";
  878                         bias-pull-up;
  879                 };
  880 
  881                 reset-n {
  882                         pins = "gpio35";
  883                         function = "gpio";
  884 
  885                         drive-strength = <2>;
  886                         output-low;
  887                         bias-pull-down;
  888                 };
  889 
  890                 wake-n {
  891                         pins = "gpio37";
  892                         function = "gpio";
  893 
  894                         drive-strength = <2>;
  895                         bias-pull-up;
  896                 };
  897         };
  898 
  899         pcie0_pwren_state: pcie0-pwren {
  900                 pins = "gpio90";
  901                 function = "gpio";
  902 
  903                 drive-strength = <2>;
  904                 bias-disable;
  905         };
  906 
  907         pcie1_default_state: pcie1-default {
  908                 perst-n {
  909                         pins = "gpio102";
  910                         function = "gpio";
  911 
  912                         drive-strength = <16>;
  913                         bias-disable;
  914                 };
  915 
  916                 clkreq {
  917                         pins = "gpio103";
  918                         function = "pci_e1";
  919                         bias-pull-up;
  920                 };
  921 
  922                 wake-n {
  923                         pins = "gpio11";
  924                         function = "gpio";
  925 
  926                         drive-strength = <2>;
  927                         bias-pull-up;
  928                 };
  929 
  930                 reset-n {
  931                         pins = "gpio75";
  932                         function = "gpio";
  933 
  934                         drive-strength = <16>;
  935                         bias-pull-up;
  936                         output-high;
  937                 };
  938         };
  939 
  940         sdc2_default_state: sdc2-default {
  941                 clk {
  942                         pins = "sdc2_clk";
  943                         bias-disable;
  944 
  945                         /*
  946                          * It seems that mmc_test reports errors if drive
  947                          * strength is not 16 on clk, cmd, and data pins.
  948                          */
  949                         drive-strength = <16>;
  950                 };
  951 
  952                 cmd {
  953                         pins = "sdc2_cmd";
  954                         bias-pull-up;
  955                         drive-strength = <10>;
  956                 };
  957 
  958                 data {
  959                         pins = "sdc2_data";
  960                         bias-pull-up;
  961                         drive-strength = <10>;
  962                 };
  963         };
  964 
  965         sdc2_card_det_n: sd-card-det-n {
  966                 pins = "gpio126";
  967                 function = "gpio";
  968                 bias-pull-up;
  969         };
  970 
  971         wcd_intr_default: wcd_intr_default {
  972                 pins = <54>;
  973                 function = "gpio";
  974 
  975                 input-enable;
  976                 bias-pull-down;
  977                 drive-strength = <2>;
  978         };
  979 };
  980 
  981 &uart3 {
  982         label = "LS-UART0";
  983         status = "disabled";
  984 };
  985 
  986 &uart6 {
  987         status = "okay";
  988 
  989         bluetooth {
  990                 compatible = "qcom,wcn3990-bt";
  991 
  992                 vddio-supply = <&vreg_s4a_1p8>;
  993                 vddxo-supply = <&vreg_l7a_1p8>;
  994                 vddrf-supply = <&vreg_l17a_1p3>;
  995                 vddch0-supply = <&vreg_l25a_3p3>;
  996                 max-speed = <3200000>;
  997         };
  998 };
  999 
 1000 &uart9 {
 1001         label = "LS-UART1";
 1002         status = "okay";
 1003 };
 1004 
 1005 &usb_1 {
 1006         status = "okay";
 1007 };
 1008 
 1009 &usb_1_dwc3 {
 1010         dr_mode = "peripheral";
 1011 };
 1012 
 1013 &usb_1_hsphy {
 1014         status = "okay";
 1015 
 1016         vdd-supply = <&vreg_l1a_0p875>;
 1017         vdda-pll-supply = <&vreg_l12a_1p8>;
 1018         vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
 1019 
 1020         qcom,imp-res-offset-value = <8>;
 1021         qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
 1022         qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
 1023         qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
 1024 };
 1025 
 1026 &usb_1_qmpphy {
 1027         status = "okay";
 1028 
 1029         vdda-phy-supply = <&vreg_l26a_1p2>;
 1030         vdda-pll-supply = <&vreg_l1a_0p875>;
 1031 };
 1032 
 1033 &usb_2 {
 1034         status = "okay";
 1035 };
 1036 
 1037 &usb_2_dwc3 {
 1038         dr_mode = "host";
 1039 };
 1040 
 1041 &usb_2_hsphy {
 1042         status = "okay";
 1043 
 1044         vdd-supply = <&vreg_l1a_0p875>;
 1045         vdda-pll-supply = <&vreg_l12a_1p8>;
 1046         vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
 1047 
 1048         qcom,imp-res-offset-value = <8>;
 1049         qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
 1050 };
 1051 
 1052 &usb_2_qmpphy {
 1053         status = "okay";
 1054 
 1055         vdda-phy-supply = <&vreg_l26a_1p2>;
 1056         vdda-pll-supply = <&vreg_l1a_0p875>;
 1057 };
 1058 
 1059 &ufs_mem_hc {
 1060         status = "okay";
 1061 
 1062         reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
 1063 
 1064         vcc-supply = <&vreg_l20a_2p95>;
 1065         vcc-max-microamp = <800000>;
 1066 };
 1067 
 1068 &ufs_mem_phy {
 1069         status = "okay";
 1070 
 1071         vdda-phy-supply = <&vreg_l1a_0p875>;
 1072         vdda-pll-supply = <&vreg_l26a_1p2>;
 1073 };
 1074 
 1075 &venus {
 1076         status = "okay";
 1077 };
 1078 
 1079 &wcd9340{
 1080         pinctrl-0 = <&wcd_intr_default>;
 1081         pinctrl-names = "default";
 1082         clock-names = "extclk";
 1083         clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
 1084         reset-gpios = <&tlmm 64 0>;
 1085         vdd-buck-supply = <&vreg_s4a_1p8>;
 1086         vdd-buck-sido-supply = <&vreg_s4a_1p8>;
 1087         vdd-tx-supply = <&vreg_s4a_1p8>;
 1088         vdd-rx-supply = <&vreg_s4a_1p8>;
 1089         vdd-io-supply = <&vreg_s4a_1p8>;
 1090 
 1091         swm: swm@c85 {
 1092                 left_spkr: wsa8810-left{
 1093                         compatible = "sdw10217201000";
 1094                         reg = <0 1>;
 1095                         powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>;
 1096                         #thermal-sensor-cells = <0>;
 1097                         sound-name-prefix = "SpkrLeft";
 1098                         #sound-dai-cells = <0>;
 1099                 };
 1100 
 1101                 right_spkr: wsa8810-right{
 1102                         compatible = "sdw10217201000";
 1103                         powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>;
 1104                         reg = <0 2>;
 1105                         #thermal-sensor-cells = <0>;
 1106                         sound-name-prefix = "SpkrRight";
 1107                         #sound-dai-cells = <0>;
 1108                 };
 1109         };
 1110 };
 1111 
 1112 &wifi {
 1113         status = "okay";
 1114 
 1115         vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
 1116         vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
 1117         vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
 1118         vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
 1119 
 1120         qcom,snoc-host-cap-8bit-quirk;
 1121         qcom,ath10k-calibration-variant = "Thundercomm_DB845C";
 1122 };
 1123 
 1124 /* PINCTRL - additions to nodes defined in sdm845.dtsi */
 1125 &qup_spi2_default {
 1126         drive-strength = <16>;
 1127 };
 1128 
 1129 &qup_uart3_default{
 1130         pinmux {
 1131                 pins = "gpio41", "gpio42", "gpio43", "gpio44";
 1132                 function = "qup3";
 1133         };
 1134 };
 1135 
 1136 &qup_i2c10_default {
 1137         pinconf {
 1138                 pins = "gpio55", "gpio56";
 1139                 drive-strength = <2>;
 1140                 bias-disable;
 1141         };
 1142 };
 1143 
 1144 &qup_uart6_default {
 1145         pinmux {
 1146                 pins = "gpio45", "gpio46", "gpio47", "gpio48";
 1147                 function = "qup6";
 1148         };
 1149 
 1150         cts {
 1151                 pins = "gpio45";
 1152                 bias-disable;
 1153         };
 1154 
 1155         rts-tx {
 1156                 pins = "gpio46", "gpio47";
 1157                 drive-strength = <2>;
 1158                 bias-disable;
 1159         };
 1160 
 1161         rx {
 1162                 pins = "gpio48";
 1163                 bias-pull-up;
 1164         };
 1165 };
 1166 
 1167 &qup_uart9_default {
 1168         pinconf-tx {
 1169                 pins = "gpio4";
 1170                 drive-strength = <2>;
 1171                 bias-disable;
 1172         };
 1173 
 1174         pinconf-rx {
 1175                 pins = "gpio5";
 1176                 drive-strength = <2>;
 1177                 bias-pull-up;
 1178         };
 1179 };
 1180 
 1181 &pm8998_gpio {
 1182 
 1183 };
 1184 
 1185 &cci {
 1186         status = "okay";
 1187 };
 1188 
 1189 &camss {
 1190         vdda-phy-supply = <&vreg_l1a_0p875>;
 1191         vdda-pll-supply = <&vreg_l26a_1p2>;
 1192 
 1193         status = "ok";
 1194 
 1195         ports {
 1196                 #address-cells = <1>;
 1197                 #size-cells = <0>;
 1198                 port@0 {
 1199                         reg = <0>;
 1200                         csiphy0_ep: endpoint {
 1201                                 data-lanes = <0 1 2 3>;
 1202                                 remote-endpoint = <&ov8856_ep>;
 1203                         };
 1204                 };
 1205         };
 1206 };
 1207 
 1208 &cci_i2c0 {
 1209         camera@10 {
 1210                 compatible = "ovti,ov8856";
 1211                 reg = <0x10>;
 1212 
 1213                 // CAM0_RST_N
 1214                 reset-gpios = <&tlmm 9 GPIO_ACTIVE_LOW>;
 1215                 pinctrl-names = "default";
 1216                 pinctrl-0 = <&cam0_default>;
 1217                 gpios = <&tlmm 13 0>,
 1218                         <&tlmm 9 GPIO_ACTIVE_LOW>;
 1219 
 1220                 clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
 1221                 clock-names = "xvclk";
 1222                 clock-frequency = <19200000>;
 1223 
 1224                 /* The &vreg_s4a_1p8 trace is powered on as a,
 1225                  * so it is represented by a fixed regulator.
 1226                  *
 1227                  * The 2.8V vdda-supply and 1.2V vddd-supply regulators
 1228                  * both have to be enabled through the power management
 1229                  * gpios.
 1230                  */
 1231                 power-domains = <&clock_camcc TITAN_TOP_GDSC>;
 1232 
 1233                 dovdd-supply = <&vreg_lvs1a_1p8>;
 1234                 avdd-supply = <&cam0_avdd_2v8>;
 1235                 dvdd-supply = <&cam0_dvdd_1v2>;
 1236 
 1237                 status = "ok";
 1238 
 1239                 port {
 1240                         ov8856_ep: endpoint {
 1241                                 link-frequencies = /bits/ 64
 1242                                         <360000000 180000000>;
 1243                                 data-lanes = <1 2 3 4>;
 1244                                 remote-endpoint = <&csiphy0_ep>;
 1245                         };
 1246                 };
 1247         };
 1248 };
 1249 
 1250 &cci_i2c1 {
 1251         camera@60 {
 1252                 compatible = "ovti,ov7251";
 1253 
 1254                 // I2C address as per ov7251.txt linux documentation
 1255                 reg = <0x60>;
 1256 
 1257                 // CAM3_RST_N
 1258                 enable-gpios = <&tlmm 21 0>;
 1259                 pinctrl-names = "default";
 1260                 pinctrl-0 = <&cam3_default>;
 1261                 gpios = <&tlmm 16 0>,
 1262                         <&tlmm 21 0>;
 1263 
 1264                 clocks = <&clock_camcc CAM_CC_MCLK3_CLK>;
 1265                 clock-names = "xclk";
 1266                 clock-frequency = <24000000>;
 1267 
 1268                 /* The &vreg_s4a_1p8 trace always powered on.
 1269                  *
 1270                  * The 2.8V vdda-supply regulator is enabled when the
 1271                  * vreg_s4a_1p8 trace is pulled high.
 1272                  * It too is represented by a fixed regulator.
 1273                  *
 1274                  * No 1.2V vddd-supply regulator is used.
 1275                  */
 1276                 power-domains = <&clock_camcc TITAN_TOP_GDSC>;
 1277 
 1278                 vdddo-supply = <&vreg_lvs1a_1p8>;
 1279                 vdda-supply = <&cam3_avdd_2v8>;
 1280 
 1281                 status = "disable";
 1282 
 1283                 port {
 1284                         ov7251_ep: endpoint {
 1285                                 data-lanes = <0 1>;
 1286 //                              remote-endpoint = <&csiphy3_ep>;
 1287                         };
 1288                 };
 1289         };
 1290 };
 1291 
 1292 /* PINCTRL - additions to nodes defined in sdm845.dtsi */
 1293 &qup_spi0_default {
 1294         config {
 1295                 drive-strength = <6>;
 1296                 bias-disable;
 1297         };
 1298 };
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FreeBSD/Linux Kernel Cross Reference sys/contrib/device-tree/src/arm64/qcom/sdm845-db845c.dts

FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/src/arm64/qcom/sdm845-db845c.dts
