The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)

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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/src/arm64/renesas/r8a774e1-beacon-rzg2h-kit.dts

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    1 // SPDX-License-Identifier: GPL-2.0
    2 /*
    3  * Copyright 2020, Compass Electronics Group, LLC
    4  */
    5 
    6 /dts-v1/;
    7 
    8 #include "r8a774e1.dtsi"
    9 #include "beacon-renesom-som.dtsi"
   10 #include "beacon-renesom-baseboard.dtsi"
   11 
   12 / {
   13         model = "Beacon Embedded Works RZ/G2H Development Kit";
   14         compatible = "beacon,beacon-rzg2h", "renesas,r8a774e1";
   15 
   16         aliases {
   17                 serial0 = &scif2;
   18                 serial1 = &hscif0;
   19                 serial2 = &hscif1;
   20                 serial3 = &scif0;
   21                 serial4 = &hscif2;
   22                 serial5 = &scif5;
   23                 serial6 = &scif4;
   24                 ethernet0 = &avb;
   25                 mmc0 = &sdhi3;
   26                 mmc1 = &sdhi0;
   27                 mmc2 = &sdhi2;
   28         };
   29 
   30         chosen {
   31                 stdout-path = "serial0:115200n8";
   32         };
   33 
   34         memory@500000000 {
   35                 device_type = "memory";
   36                 reg = <0x5 0x00000000 0x0 0x80000000>;
   37         };
   38 };
   39 
   40 &du {
   41         pinctrl-0 = <&du_pins>;
   42         pinctrl-names = "default";
   43         status = "okay";
   44 
   45         clocks = <&cpg CPG_MOD 724>,
   46                 <&cpg CPG_MOD 723>,
   47                 <&cpg CPG_MOD 721>,
   48                 <&versaclock5 1>,
   49                 <&x302_clk>,
   50                 <&versaclock5 2>;
   51         clock-names = "du.0", "du.1", "du.3",
   52                 "dclkin.0", "dclkin.1", "dclkin.3";
   53 };
   54 
   55 /* Reference versaclock instead of audio_clk_a */
   56 &rcar_sound {
   57         clocks = <&cpg CPG_MOD 1005>,
   58                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
   59                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
   60                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
   61                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
   62                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
   63                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
   64                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
   65                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
   66                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
   67                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
   68                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
   69                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
   70                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
   71                  <&versaclock6_bb 4>, <&audio_clk_b>,
   72                  <&audio_clk_c>,
   73                  <&cpg CPG_CORE R8A774E1_CLK_S0D4>;
   74 };

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