r8a77970-v3msk.dts

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    1 // SPDX-License-Identifier: GPL-2.0
    2 /*
    3  * Device Tree Source for the V3M Starter Kit board
    4  *
    5  * Copyright (C) 2017 Renesas Electronics Corp.
    6  * Copyright (C) 2017 Cogent Embedded, Inc.
    7  */
    8 
    9 /dts-v1/;
   10 #include "r8a77970.dtsi"
   11 #include <dt-bindings/gpio/gpio.h>
   12 
   13 / {
   14         model = "Renesas V3M Starter Kit board";
   15         compatible = "renesas,v3msk", "renesas,r8a77970";
   16 
   17         aliases {
   18                 serial0 = &scif0;
   19         };
   20 
   21         chosen {
   22                 stdout-path = "serial0:115200n8";
   23         };
   24 
   25         hdmi-out {
   26                 compatible = "hdmi-connector";
   27                 type = "a";
   28 
   29                 port {
   30                         hdmi_con: endpoint {
   31                                 remote-endpoint = <&adv7511_out>;
   32                         };
   33                 };
   34         };
   35 
   36         lvds-decoder {
   37                 compatible = "thine,thc63lvd1024";
   38                 vcc-supply = <&vcc_d3_3v>;
   39 
   40                 ports {
   41                         #address-cells = <1>;
   42                         #size-cells = <0>;
   43 
   44                         port@0 {
   45                                 reg = <0>;
   46                                 thc63lvd1024_in: endpoint {
   47                                         remote-endpoint = <&lvds0_out>;
   48                                 };
   49                         };
   50 
   51                         port@2 {
   52                                 reg = <2>;
   53                                 thc63lvd1024_out: endpoint {
   54                                         remote-endpoint = <&adv7511_in>;
   55                                 };
   56                         };
   57                 };
   58         };
   59 
   60         memory@48000000 {
   61                 device_type = "memory";
   62                 /* first 128MB is reserved for secure area. */
   63                 reg = <0x0 0x48000000 0x0 0x78000000>;
   64         };
   65 
   66         osc5_clk: osc5-clock {
   67                 compatible = "fixed-clock";
   68                 #clock-cells = <0>;
   69                 clock-frequency = <148500000>;
   70         };
   71 
   72         vcc_d1_8v: regulator-0 {
   73                 compatible = "regulator-fixed";
   74                 regulator-name = "VCC_D1.8V";
   75                 regulator-min-microvolt = <1800000>;
   76                 regulator-max-microvolt = <1800000>;
   77                 regulator-boot-on;
   78                 regulator-always-on;
   79         };
   80 
   81         vcc_d3_3v: regulator-1 {
   82                 compatible = "regulator-fixed";
   83                 regulator-name = "VCC_D3.3V";
   84                 regulator-min-microvolt = <3300000>;
   85                 regulator-max-microvolt = <3300000>;
   86                 regulator-boot-on;
   87                 regulator-always-on;
   88         };
   89 
   90         vcc_vddq_vin0: regulator-2 {
   91                 compatible = "regulator-fixed";
   92                 regulator-name = "VCC_VDDQ_VIN0";
   93                 regulator-min-microvolt = <3300000>;
   94                 regulator-max-microvolt = <3300000>;
   95                 regulator-boot-on;
   96                 regulator-always-on;
   97         };
   98 };
   99 
  100 &avb {
  101         pinctrl-0 = <&avb_pins>;
  102         pinctrl-names = "default";
  103 
  104         renesas,no-ether-link;
  105         phy-handle = <&phy0>;
  106         rx-internal-delay-ps = <1800>;
  107         tx-internal-delay-ps = <2000>;
  108         status = "okay";
  109 
  110         phy0: ethernet-phy@0 {
  111                 compatible = "ethernet-phy-id0022.1622",
  112                              "ethernet-phy-ieee802.3-c22";
  113                 rxc-skew-ps = <1500>;
  114                 reg = <0>;
  115                 interrupt-parent = <&gpio1>;
  116                 interrupts = <17 IRQ_TYPE_LEVEL_LOW>;
  117                 reset-gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
  118         };
  119 };
  120 
  121 &du {
  122         clocks = <&cpg CPG_MOD 724>,
  123                  <&osc5_clk>;
  124         clock-names = "du.0", "dclkin.0";
  125         status = "okay";
  126 };
  127 
  128 &extal_clk {
  129         clock-frequency = <16666666>;
  130 };
  131 
  132 &extalr_clk {
  133         clock-frequency = <32768>;
  134 };
  135 
  136 &i2c0 {
  137         pinctrl-0 = <&i2c0_pins>;
  138         pinctrl-names = "default";
  139 
  140         status = "okay";
  141         clock-frequency = <400000>;
  142 
  143         hdmi@39{
  144                 compatible = "adi,adv7511w";
  145                 #sound-dai-cells = <0>;
  146                 reg = <0x39>;
  147                 interrupt-parent = <&gpio1>;
  148                 interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
  149                 avdd-supply = <&vcc_d1_8v>;
  150                 dvdd-supply = <&vcc_d1_8v>;
  151                 pvdd-supply = <&vcc_d1_8v>;
  152                 bgvdd-supply = <&vcc_d1_8v>;
  153                 dvdd-3v-supply = <&vcc_d3_3v>;
  154 
  155                 adi,input-depth = <8>;
  156                 adi,input-colorspace = "rgb";
  157                 adi,input-clock = "1x";
  158 
  159                 ports {
  160                         #address-cells = <1>;
  161                         #size-cells = <0>;
  162 
  163                         port@0 {
  164                                 reg = <0>;
  165                                 adv7511_in: endpoint {
  166                                         remote-endpoint = <&thc63lvd1024_out>;
  167                                 };
  168                         };
  169 
  170                         port@1 {
  171                                 reg = <1>;
  172                                 adv7511_out: endpoint {
  173                                         remote-endpoint = <&hdmi_con>;
  174                                 };
  175                         };
  176                 };
  177         };
  178 };
  179 
  180 &lvds0 {
  181         status = "okay";
  182 
  183         ports {
  184                 port@1 {
  185                         lvds0_out: endpoint {
  186                                 remote-endpoint = <&thc63lvd1024_in>;
  187                         };
  188                 };
  189         };
  190 };
  191 
  192 &mmc0 {
  193         pinctrl-0 = <&mmc_pins>;
  194         pinctrl-names = "default";
  195 
  196         vmmc-supply = <&vcc_d3_3v>;
  197         vqmmc-supply = <&vcc_vddq_vin0>;
  198         bus-width = <8>;
  199         non-removable;
  200         status = "okay";
  201 };
  202 
  203 &pfc {
  204         avb_pins: avb0 {
  205                 groups = "avb0_mdio", "avb0_rgmii", "avb0_txcrefclk";
  206                 function = "avb0";
  207         };
  208 
  209         i2c0_pins: i2c0 {
  210                 groups = "i2c0";
  211                 function = "i2c0";
  212         };
  213 
  214         mmc_pins: mmc_3_3v {
  215                 groups = "mmc_data8", "mmc_ctrl";
  216                 function = "mmc";
  217                 power-source = <3300>;
  218         };
  219 
  220         qspi0_pins: qspi0 {
  221                 groups = "qspi0_ctrl", "qspi0_data4";
  222                 function = "qspi0";
  223         };
  224 
  225         scif0_pins: scif0 {
  226                 groups = "scif0_data";
  227                 function = "scif0";
  228         };
  229 };
  230 
  231 &rpc {
  232         pinctrl-0 = <&qspi0_pins>;
  233         pinctrl-names = "default";
  234 
  235         status = "okay";
  236 
  237         flash@0 {
  238                 compatible = "spansion,s25fs512s", "jedec,spi-nor";
  239                 reg = <0>;
  240                 spi-max-frequency = <50000000>;
  241                 spi-rx-bus-width = <4>;
  242 
  243                 partitions {
  244                         compatible = "fixed-partitions";
  245                         #address-cells = <1>;
  246                         #size-cells = <1>;
  247 
  248                         bootparam@0 {
  249                                 reg = <0x00000000 0x040000>;
  250                                 read-only;
  251                         };
  252                         cr7@40000 {
  253                                 reg = <0x00040000 0x080000>;
  254                                 read-only;
  255                         };
  256                         cert_header_sa3@c0000 {
  257                                 reg = <0x000c0000 0x080000>;
  258                                 read-only;
  259                         };
  260                         bl2@140000 {
  261                                 reg = <0x00140000 0x040000>;
  262                                 read-only;
  263                         };
  264                         cert_header_sa6@180000 {
  265                                 reg = <0x00180000 0x040000>;
  266                                 read-only;
  267                         };
  268                         bl31@1c0000 {
  269                                 reg = <0x001c0000 0x460000>;
  270                                 read-only;
  271                         };
  272                         uboot@640000 {
  273                                 reg = <0x00640000 0x0c0000>;
  274                                 read-only;
  275                         };
  276                         uboot-env@700000 {
  277                                 reg = <0x00700000 0x040000>;
  278                                 read-only;
  279                         };
  280                         dtb@740000 {
  281                                 reg = <0x00740000 0x080000>;
  282                         };
  283                         kernel@7c0000 {
  284                                 reg = <0x007c0000 0x1400000>;
  285                         };
  286                         user@1bc0000 {
  287                                 reg = <0x01bc0000 0x2440000>;
  288                         };
  289                 };
  290         };
  291 };
  292 
  293 &scif0 {
  294         pinctrl-0 = <&scif0_pins>;
  295         pinctrl-names = "default";
  296 
  297         status = "okay";
  298 };

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FreeBSD/Linux Kernel Cross Reference sys/contrib/device-tree/src/arm64/renesas/r8a77970-v3msk.dts

FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/src/arm64/renesas/r8a77970-v3msk.dts