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sys/contrib/device-tree/src/arm64/renesas/r8a77990.dtsi
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1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Device Tree Source for the R-Car E3 (R8A77990) SoC 4 * 5 * Copyright (C) 2018-2019 Renesas Electronics Corp. 6 */ 7 8 #include <dt-bindings/clock/r8a77990-cpg-mssr.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/power/r8a77990-sysc.h> 11 12 / { 13 compatible = "renesas,r8a77990"; 14 #address-cells = <2>; 15 #size-cells = <2>; 16 17 aliases { 18 i2c0 = &i2c0; 19 i2c1 = &i2c1; 20 i2c2 = &i2c2; 21 i2c3 = &i2c3; 22 i2c4 = &i2c4; 23 i2c5 = &i2c5; 24 i2c6 = &i2c6; 25 i2c7 = &i2c7; 26 }; 27 28 /* 29 * The external audio clocks are configured as 0 Hz fixed frequency 30 * clocks by default. 31 * Boards that provide audio clocks should override them. 32 */ 33 audio_clk_a: audio_clk_a { 34 compatible = "fixed-clock"; 35 #clock-cells = <0>; 36 clock-frequency = <0>; 37 }; 38 39 audio_clk_b: audio_clk_b { 40 compatible = "fixed-clock"; 41 #clock-cells = <0>; 42 clock-frequency = <0>; 43 }; 44 45 audio_clk_c: audio_clk_c { 46 compatible = "fixed-clock"; 47 #clock-cells = <0>; 48 clock-frequency = <0>; 49 }; 50 51 /* External CAN clock - to be overridden by boards that provide it */ 52 can_clk: can { 53 compatible = "fixed-clock"; 54 #clock-cells = <0>; 55 clock-frequency = <0>; 56 }; 57 58 cluster1_opp: opp-table-1 { 59 compatible = "operating-points-v2"; 60 opp-shared; 61 opp-800000000 { 62 opp-hz = /bits/ 64 <800000000>; 63 opp-microvolt = <820000>; 64 clock-latency-ns = <300000>; 65 }; 66 opp-1000000000 { 67 opp-hz = /bits/ 64 <1000000000>; 68 opp-microvolt = <820000>; 69 clock-latency-ns = <300000>; 70 }; 71 opp-1200000000 { 72 opp-hz = /bits/ 64 <1200000000>; 73 opp-microvolt = <820000>; 74 clock-latency-ns = <300000>; 75 opp-suspend; 76 }; 77 }; 78 79 cpus { 80 #address-cells = <1>; 81 #size-cells = <0>; 82 83 a53_0: cpu@0 { 84 compatible = "arm,cortex-a53"; 85 reg = <0>; 86 device_type = "cpu"; 87 #cooling-cells = <2>; 88 power-domains = <&sysc R8A77990_PD_CA53_CPU0>; 89 next-level-cache = <&L2_CA53>; 90 enable-method = "psci"; 91 cpu-idle-states = <&CPU_SLEEP_0>; 92 dynamic-power-coefficient = <277>; 93 clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>; 94 operating-points-v2 = <&cluster1_opp>; 95 }; 96 97 a53_1: cpu@1 { 98 compatible = "arm,cortex-a53"; 99 reg = <1>; 100 device_type = "cpu"; 101 power-domains = <&sysc R8A77990_PD_CA53_CPU1>; 102 next-level-cache = <&L2_CA53>; 103 enable-method = "psci"; 104 cpu-idle-states = <&CPU_SLEEP_0>; 105 clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>; 106 operating-points-v2 = <&cluster1_opp>; 107 }; 108 109 L2_CA53: cache-controller-0 { 110 compatible = "cache"; 111 power-domains = <&sysc R8A77990_PD_CA53_SCU>; 112 cache-unified; 113 cache-level = <2>; 114 }; 115 116 idle-states { 117 entry-method = "psci"; 118 119 CPU_SLEEP_0: cpu-sleep-0 { 120 compatible = "arm,idle-state"; 121 arm,psci-suspend-param = <0x0010000>; 122 local-timer-stop; 123 entry-latency-us = <700>; 124 exit-latency-us = <700>; 125 min-residency-us = <5000>; 126 }; 127 }; 128 }; 129 130 extal_clk: extal { 131 compatible = "fixed-clock"; 132 #clock-cells = <0>; 133 /* This value must be overridden by the board */ 134 clock-frequency = <0>; 135 }; 136 137 /* External PCIe clock - can be overridden by the board */ 138 pcie_bus_clk: pcie_bus { 139 compatible = "fixed-clock"; 140 #clock-cells = <0>; 141 clock-frequency = <0>; 142 }; 143 144 pmu_a53 { 145 compatible = "arm,cortex-a53-pmu"; 146 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 147 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; 148 interrupt-affinity = <&a53_0>, <&a53_1>; 149 }; 150 151 psci { 152 compatible = "arm,psci-1.0", "arm,psci-0.2"; 153 method = "smc"; 154 }; 155 156 /* External SCIF clock - to be overridden by boards that provide it */ 157 scif_clk: scif { 158 compatible = "fixed-clock"; 159 #clock-cells = <0>; 160 clock-frequency = <0>; 161 }; 162 163 soc: soc { 164 compatible = "simple-bus"; 165 interrupt-parent = <&gic>; 166 #address-cells = <2>; 167 #size-cells = <2>; 168 ranges; 169 170 rwdt: watchdog@e6020000 { 171 compatible = "renesas,r8a77990-wdt", 172 "renesas,rcar-gen3-wdt"; 173 reg = <0 0xe6020000 0 0x0c>; 174 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; 175 clocks = <&cpg CPG_MOD 402>; 176 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 177 resets = <&cpg 402>; 178 status = "disabled"; 179 }; 180 181 gpio0: gpio@e6050000 { 182 compatible = "renesas,gpio-r8a77990", 183 "renesas,rcar-gen3-gpio"; 184 reg = <0 0xe6050000 0 0x50>; 185 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 186 #gpio-cells = <2>; 187 gpio-controller; 188 gpio-ranges = <&pfc 0 0 18>; 189 #interrupt-cells = <2>; 190 interrupt-controller; 191 clocks = <&cpg CPG_MOD 912>; 192 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 193 resets = <&cpg 912>; 194 }; 195 196 gpio1: gpio@e6051000 { 197 compatible = "renesas,gpio-r8a77990", 198 "renesas,rcar-gen3-gpio"; 199 reg = <0 0xe6051000 0 0x50>; 200 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 201 #gpio-cells = <2>; 202 gpio-controller; 203 gpio-ranges = <&pfc 0 32 23>; 204 #interrupt-cells = <2>; 205 interrupt-controller; 206 clocks = <&cpg CPG_MOD 911>; 207 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 208 resets = <&cpg 911>; 209 }; 210 211 gpio2: gpio@e6052000 { 212 compatible = "renesas,gpio-r8a77990", 213 "renesas,rcar-gen3-gpio"; 214 reg = <0 0xe6052000 0 0x50>; 215 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 216 #gpio-cells = <2>; 217 gpio-controller; 218 gpio-ranges = <&pfc 0 64 26>; 219 #interrupt-cells = <2>; 220 interrupt-controller; 221 clocks = <&cpg CPG_MOD 910>; 222 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 223 resets = <&cpg 910>; 224 }; 225 226 gpio3: gpio@e6053000 { 227 compatible = "renesas,gpio-r8a77990", 228 "renesas,rcar-gen3-gpio"; 229 reg = <0 0xe6053000 0 0x50>; 230 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 231 #gpio-cells = <2>; 232 gpio-controller; 233 gpio-ranges = <&pfc 0 96 16>; 234 #interrupt-cells = <2>; 235 interrupt-controller; 236 clocks = <&cpg CPG_MOD 909>; 237 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 238 resets = <&cpg 909>; 239 }; 240 241 gpio4: gpio@e6054000 { 242 compatible = "renesas,gpio-r8a77990", 243 "renesas,rcar-gen3-gpio"; 244 reg = <0 0xe6054000 0 0x50>; 245 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 246 #gpio-cells = <2>; 247 gpio-controller; 248 gpio-ranges = <&pfc 0 128 11>; 249 #interrupt-cells = <2>; 250 interrupt-controller; 251 clocks = <&cpg CPG_MOD 908>; 252 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 253 resets = <&cpg 908>; 254 }; 255 256 gpio5: gpio@e6055000 { 257 compatible = "renesas,gpio-r8a77990", 258 "renesas,rcar-gen3-gpio"; 259 reg = <0 0xe6055000 0 0x50>; 260 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 261 #gpio-cells = <2>; 262 gpio-controller; 263 gpio-ranges = <&pfc 0 160 20>; 264 #interrupt-cells = <2>; 265 interrupt-controller; 266 clocks = <&cpg CPG_MOD 907>; 267 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 268 resets = <&cpg 907>; 269 }; 270 271 gpio6: gpio@e6055400 { 272 compatible = "renesas,gpio-r8a77990", 273 "renesas,rcar-gen3-gpio"; 274 reg = <0 0xe6055400 0 0x50>; 275 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 276 #gpio-cells = <2>; 277 gpio-controller; 278 gpio-ranges = <&pfc 0 192 18>; 279 #interrupt-cells = <2>; 280 interrupt-controller; 281 clocks = <&cpg CPG_MOD 906>; 282 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 283 resets = <&cpg 906>; 284 }; 285 286 pfc: pinctrl@e6060000 { 287 compatible = "renesas,pfc-r8a77990"; 288 reg = <0 0xe6060000 0 0x508>; 289 }; 290 291 i2c_dvfs: i2c@e60b0000 { 292 #address-cells = <1>; 293 #size-cells = <0>; 294 compatible = "renesas,iic-r8a77990", 295 "renesas,rcar-gen3-iic", 296 "renesas,rmobile-iic"; 297 reg = <0 0xe60b0000 0 0x425>; 298 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 299 clocks = <&cpg CPG_MOD 926>; 300 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 301 resets = <&cpg 926>; 302 dmas = <&dmac0 0x11>, <&dmac0 0x10>; 303 dma-names = "tx", "rx"; 304 status = "disabled"; 305 }; 306 307 cmt0: timer@e60f0000 { 308 compatible = "renesas,r8a77990-cmt0", 309 "renesas,rcar-gen3-cmt0"; 310 reg = <0 0xe60f0000 0 0x1004>; 311 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 312 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 313 clocks = <&cpg CPG_MOD 303>; 314 clock-names = "fck"; 315 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 316 resets = <&cpg 303>; 317 status = "disabled"; 318 }; 319 320 cmt1: timer@e6130000 { 321 compatible = "renesas,r8a77990-cmt1", 322 "renesas,rcar-gen3-cmt1"; 323 reg = <0 0xe6130000 0 0x1004>; 324 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 325 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 326 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 327 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 328 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 329 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 330 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 331 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 332 clocks = <&cpg CPG_MOD 302>; 333 clock-names = "fck"; 334 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 335 resets = <&cpg 302>; 336 status = "disabled"; 337 }; 338 339 cmt2: timer@e6140000 { 340 compatible = "renesas,r8a77990-cmt1", 341 "renesas,rcar-gen3-cmt1"; 342 reg = <0 0xe6140000 0 0x1004>; 343 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 344 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 345 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 346 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 347 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 348 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 349 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 350 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; 351 clocks = <&cpg CPG_MOD 301>; 352 clock-names = "fck"; 353 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 354 resets = <&cpg 301>; 355 status = "disabled"; 356 }; 357 358 cmt3: timer@e6148000 { 359 compatible = "renesas,r8a77990-cmt1", 360 "renesas,rcar-gen3-cmt1"; 361 reg = <0 0xe6148000 0 0x1004>; 362 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, 363 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>, 364 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, 365 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, 366 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, 367 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>, 368 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, 369 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>; 370 clocks = <&cpg CPG_MOD 300>; 371 clock-names = "fck"; 372 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 373 resets = <&cpg 300>; 374 status = "disabled"; 375 }; 376 377 cpg: clock-controller@e6150000 { 378 compatible = "renesas,r8a77990-cpg-mssr"; 379 reg = <0 0xe6150000 0 0x1000>; 380 clocks = <&extal_clk>; 381 clock-names = "extal"; 382 #clock-cells = <2>; 383 #power-domain-cells = <0>; 384 #reset-cells = <1>; 385 }; 386 387 rst: reset-controller@e6160000 { 388 compatible = "renesas,r8a77990-rst"; 389 reg = <0 0xe6160000 0 0x0200>; 390 }; 391 392 sysc: system-controller@e6180000 { 393 compatible = "renesas,r8a77990-sysc"; 394 reg = <0 0xe6180000 0 0x0400>; 395 #power-domain-cells = <1>; 396 }; 397 398 thermal: thermal@e6190000 { 399 compatible = "renesas,thermal-r8a77990"; 400 reg = <0 0xe6190000 0 0x10>, <0 0xe6190100 0 0x38>; 401 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 402 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 403 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 404 clocks = <&cpg CPG_MOD 522>; 405 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 406 resets = <&cpg 522>; 407 #thermal-sensor-cells = <0>; 408 }; 409 410 intc_ex: interrupt-controller@e61c0000 { 411 compatible = "renesas,intc-ex-r8a77990", "renesas,irqc"; 412 #interrupt-cells = <2>; 413 interrupt-controller; 414 reg = <0 0xe61c0000 0 0x200>; 415 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 416 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 417 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 418 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 419 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, 420 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 421 clocks = <&cpg CPG_MOD 407>; 422 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 423 resets = <&cpg 407>; 424 }; 425 426 tmu0: timer@e61e0000 { 427 compatible = "renesas,tmu-r8a77990", "renesas,tmu"; 428 reg = <0 0xe61e0000 0 0x30>; 429 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 430 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, 431 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 432 clocks = <&cpg CPG_MOD 125>; 433 clock-names = "fck"; 434 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 435 resets = <&cpg 125>; 436 status = "disabled"; 437 }; 438 439 tmu1: timer@e6fc0000 { 440 compatible = "renesas,tmu-r8a77990", "renesas,tmu"; 441 reg = <0 0xe6fc0000 0 0x30>; 442 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, 443 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, 444 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>; 445 clocks = <&cpg CPG_MOD 124>; 446 clock-names = "fck"; 447 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 448 resets = <&cpg 124>; 449 status = "disabled"; 450 }; 451 452 tmu2: timer@e6fd0000 { 453 compatible = "renesas,tmu-r8a77990", "renesas,tmu"; 454 reg = <0 0xe6fd0000 0 0x30>; 455 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, 456 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 457 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>; 458 clocks = <&cpg CPG_MOD 123>; 459 clock-names = "fck"; 460 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 461 resets = <&cpg 123>; 462 status = "disabled"; 463 }; 464 465 tmu3: timer@e6fe0000 { 466 compatible = "renesas,tmu-r8a77990", "renesas,tmu"; 467 reg = <0 0xe6fe0000 0 0x30>; 468 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 469 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, 470 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 471 clocks = <&cpg CPG_MOD 122>; 472 clock-names = "fck"; 473 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 474 resets = <&cpg 122>; 475 status = "disabled"; 476 }; 477 478 tmu4: timer@ffc00000 { 479 compatible = "renesas,tmu-r8a77990", "renesas,tmu"; 480 reg = <0 0xffc00000 0 0x30>; 481 interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 482 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 483 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>; 484 clocks = <&cpg CPG_MOD 121>; 485 clock-names = "fck"; 486 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 487 resets = <&cpg 121>; 488 status = "disabled"; 489 }; 490 491 i2c0: i2c@e6500000 { 492 #address-cells = <1>; 493 #size-cells = <0>; 494 compatible = "renesas,i2c-r8a77990", 495 "renesas,rcar-gen3-i2c"; 496 reg = <0 0xe6500000 0 0x40>; 497 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 498 clocks = <&cpg CPG_MOD 931>; 499 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 500 resets = <&cpg 931>; 501 dmas = <&dmac1 0x91>, <&dmac1 0x90>, 502 <&dmac2 0x91>, <&dmac2 0x90>; 503 dma-names = "tx", "rx", "tx", "rx"; 504 i2c-scl-internal-delay-ns = <110>; 505 status = "disabled"; 506 }; 507 508 i2c1: i2c@e6508000 { 509 #address-cells = <1>; 510 #size-cells = <0>; 511 compatible = "renesas,i2c-r8a77990", 512 "renesas,rcar-gen3-i2c"; 513 reg = <0 0xe6508000 0 0x40>; 514 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 515 clocks = <&cpg CPG_MOD 930>; 516 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 517 resets = <&cpg 930>; 518 dmas = <&dmac1 0x93>, <&dmac1 0x92>, 519 <&dmac2 0x93>, <&dmac2 0x92>; 520 dma-names = "tx", "rx", "tx", "rx"; 521 i2c-scl-internal-delay-ns = <6>; 522 status = "disabled"; 523 }; 524 525 i2c2: i2c@e6510000 { 526 #address-cells = <1>; 527 #size-cells = <0>; 528 compatible = "renesas,i2c-r8a77990", 529 "renesas,rcar-gen3-i2c"; 530 reg = <0 0xe6510000 0 0x40>; 531 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 532 clocks = <&cpg CPG_MOD 929>; 533 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 534 resets = <&cpg 929>; 535 dmas = <&dmac1 0x95>, <&dmac1 0x94>, 536 <&dmac2 0x95>, <&dmac2 0x94>; 537 dma-names = "tx", "rx", "tx", "rx"; 538 i2c-scl-internal-delay-ns = <6>; 539 status = "disabled"; 540 }; 541 542 i2c3: i2c@e66d0000 { 543 #address-cells = <1>; 544 #size-cells = <0>; 545 compatible = "renesas,i2c-r8a77990", 546 "renesas,rcar-gen3-i2c"; 547 reg = <0 0xe66d0000 0 0x40>; 548 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 549 clocks = <&cpg CPG_MOD 928>; 550 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 551 resets = <&cpg 928>; 552 dmas = <&dmac0 0x97>, <&dmac0 0x96>; 553 dma-names = "tx", "rx"; 554 i2c-scl-internal-delay-ns = <110>; 555 status = "disabled"; 556 }; 557 558 i2c4: i2c@e66d8000 { 559 #address-cells = <1>; 560 #size-cells = <0>; 561 compatible = "renesas,i2c-r8a77990", 562 "renesas,rcar-gen3-i2c"; 563 reg = <0 0xe66d8000 0 0x40>; 564 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 565 clocks = <&cpg CPG_MOD 927>; 566 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 567 resets = <&cpg 927>; 568 dmas = <&dmac0 0x99>, <&dmac0 0x98>; 569 dma-names = "tx", "rx"; 570 i2c-scl-internal-delay-ns = <6>; 571 status = "disabled"; 572 }; 573 574 i2c5: i2c@e66e0000 { 575 #address-cells = <1>; 576 #size-cells = <0>; 577 compatible = "renesas,i2c-r8a77990", 578 "renesas,rcar-gen3-i2c"; 579 reg = <0 0xe66e0000 0 0x40>; 580 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 581 clocks = <&cpg CPG_MOD 919>; 582 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 583 resets = <&cpg 919>; 584 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; 585 dma-names = "tx", "rx"; 586 i2c-scl-internal-delay-ns = <6>; 587 status = "disabled"; 588 }; 589 590 i2c6: i2c@e66e8000 { 591 #address-cells = <1>; 592 #size-cells = <0>; 593 compatible = "renesas,i2c-r8a77990", 594 "renesas,rcar-gen3-i2c"; 595 reg = <0 0xe66e8000 0 0x40>; 596 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 597 clocks = <&cpg CPG_MOD 918>; 598 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 599 resets = <&cpg 918>; 600 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; 601 dma-names = "tx", "rx"; 602 i2c-scl-internal-delay-ns = <6>; 603 status = "disabled"; 604 }; 605 606 i2c7: i2c@e6690000 { 607 #address-cells = <1>; 608 #size-cells = <0>; 609 compatible = "renesas,i2c-r8a77990", 610 "renesas,rcar-gen3-i2c"; 611 reg = <0 0xe6690000 0 0x40>; 612 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 613 clocks = <&cpg CPG_MOD 1003>; 614 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 615 resets = <&cpg 1003>; 616 i2c-scl-internal-delay-ns = <6>; 617 status = "disabled"; 618 }; 619 620 hscif0: serial@e6540000 { 621 compatible = "renesas,hscif-r8a77990", 622 "renesas,rcar-gen3-hscif", 623 "renesas,hscif"; 624 reg = <0 0xe6540000 0 0x60>; 625 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 626 clocks = <&cpg CPG_MOD 520>, 627 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 628 <&scif_clk>; 629 clock-names = "fck", "brg_int", "scif_clk"; 630 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 631 <&dmac2 0x31>, <&dmac2 0x30>; 632 dma-names = "tx", "rx", "tx", "rx"; 633 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 634 resets = <&cpg 520>; 635 status = "disabled"; 636 }; 637 638 hscif1: serial@e6550000 { 639 compatible = "renesas,hscif-r8a77990", 640 "renesas,rcar-gen3-hscif", 641 "renesas,hscif"; 642 reg = <0 0xe6550000 0 0x60>; 643 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 644 clocks = <&cpg CPG_MOD 519>, 645 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 646 <&scif_clk>; 647 clock-names = "fck", "brg_int", "scif_clk"; 648 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 649 <&dmac2 0x33>, <&dmac2 0x32>; 650 dma-names = "tx", "rx", "tx", "rx"; 651 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 652 resets = <&cpg 519>; 653 status = "disabled"; 654 }; 655 656 hscif2: serial@e6560000 { 657 compatible = "renesas,hscif-r8a77990", 658 "renesas,rcar-gen3-hscif", 659 "renesas,hscif"; 660 reg = <0 0xe6560000 0 0x60>; 661 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 662 clocks = <&cpg CPG_MOD 518>, 663 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 664 <&scif_clk>; 665 clock-names = "fck", "brg_int", "scif_clk"; 666 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 667 <&dmac2 0x35>, <&dmac2 0x34>; 668 dma-names = "tx", "rx", "tx", "rx"; 669 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 670 resets = <&cpg 518>; 671 status = "disabled"; 672 }; 673 674 hscif3: serial@e66a0000 { 675 compatible = "renesas,hscif-r8a77990", 676 "renesas,rcar-gen3-hscif", 677 "renesas,hscif"; 678 reg = <0 0xe66a0000 0 0x60>; 679 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 680 clocks = <&cpg CPG_MOD 517>, 681 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 682 <&scif_clk>; 683 clock-names = "fck", "brg_int", "scif_clk"; 684 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 685 dma-names = "tx", "rx"; 686 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 687 resets = <&cpg 517>; 688 status = "disabled"; 689 }; 690 691 hscif4: serial@e66b0000 { 692 compatible = "renesas,hscif-r8a77990", 693 "renesas,rcar-gen3-hscif", 694 "renesas,hscif"; 695 reg = <0 0xe66b0000 0 0x60>; 696 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 697 clocks = <&cpg CPG_MOD 516>, 698 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 699 <&scif_clk>; 700 clock-names = "fck", "brg_int", "scif_clk"; 701 dmas = <&dmac0 0x39>, <&dmac0 0x38>; 702 dma-names = "tx", "rx"; 703 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 704 resets = <&cpg 516>; 705 status = "disabled"; 706 }; 707 708 hsusb: usb@e6590000 { 709 compatible = "renesas,usbhs-r8a77990", 710 "renesas,rcar-gen3-usbhs"; 711 reg = <0 0xe6590000 0 0x200>; 712 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 713 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; 714 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 715 <&usb_dmac1 0>, <&usb_dmac1 1>; 716 dma-names = "ch0", "ch1", "ch2", "ch3"; 717 renesas,buswait = <11>; 718 phys = <&usb2_phy0 3>; 719 phy-names = "usb"; 720 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 721 resets = <&cpg 704>, <&cpg 703>; 722 status = "disabled"; 723 }; 724 725 usb_dmac0: dma-controller@e65a0000 { 726 compatible = "renesas,r8a77990-usb-dmac", 727 "renesas,usb-dmac"; 728 reg = <0 0xe65a0000 0 0x100>; 729 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 730 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 731 interrupt-names = "ch0", "ch1"; 732 clocks = <&cpg CPG_MOD 330>; 733 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 734 resets = <&cpg 330>; 735 #dma-cells = <1>; 736 dma-channels = <2>; 737 }; 738 739 usb_dmac1: dma-controller@e65b0000 { 740 compatible = "renesas,r8a77990-usb-dmac", 741 "renesas,usb-dmac"; 742 reg = <0 0xe65b0000 0 0x100>; 743 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 744 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 745 interrupt-names = "ch0", "ch1"; 746 clocks = <&cpg CPG_MOD 331>; 747 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 748 resets = <&cpg 331>; 749 #dma-cells = <1>; 750 dma-channels = <2>; 751 }; 752 753 arm_cc630p: crypto@e6601000 { 754 compatible = "arm,cryptocell-630p-ree"; 755 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 756 reg = <0x0 0xe6601000 0 0x1000>; 757 clocks = <&cpg CPG_MOD 229>; 758 resets = <&cpg 229>; 759 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 760 }; 761 762 dmac0: dma-controller@e6700000 { 763 compatible = "renesas,dmac-r8a77990", 764 "renesas,rcar-dmac"; 765 reg = <0 0xe6700000 0 0x10000>; 766 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>, 767 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, 768 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, 769 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, 770 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, 771 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 772 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, 773 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, 774 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, 775 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, 776 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, 777 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 778 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, 779 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, 780 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, 781 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>, 782 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 783 interrupt-names = "error", 784 "ch0", "ch1", "ch2", "ch3", 785 "ch4", "ch5", "ch6", "ch7", 786 "ch8", "ch9", "ch10", "ch11", 787 "ch12", "ch13", "ch14", "ch15"; 788 clocks = <&cpg CPG_MOD 219>; 789 clock-names = "fck"; 790 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 791 resets = <&cpg 219>; 792 #dma-cells = <1>; 793 dma-channels = <16>; 794 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 795 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 796 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 797 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 798 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 799 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 800 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 801 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 802 }; 803 804 dmac1: dma-controller@e7300000 { 805 compatible = "renesas,dmac-r8a77990", 806 "renesas,rcar-dmac"; 807 reg = <0 0xe7300000 0 0x10000>; 808 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, 809 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, 810 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, 811 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, 812 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, 813 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, 814 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, 815 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, 816 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, 817 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, 818 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, 819 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, 820 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 821 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 822 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 823 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, 824 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 825 interrupt-names = "error", 826 "ch0", "ch1", "ch2", "ch3", 827 "ch4", "ch5", "ch6", "ch7", 828 "ch8", "ch9", "ch10", "ch11", 829 "ch12", "ch13", "ch14", "ch15"; 830 clocks = <&cpg CPG_MOD 218>; 831 clock-names = "fck"; 832 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 833 resets = <&cpg 218>; 834 #dma-cells = <1>; 835 dma-channels = <16>; 836 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, 837 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, 838 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, 839 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, 840 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, 841 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, 842 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, 843 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; 844 }; 845 846 dmac2: dma-controller@e7310000 { 847 compatible = "renesas,dmac-r8a77990", 848 "renesas,rcar-dmac"; 849 reg = <0 0xe7310000 0 0x10000>; 850 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, 851 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, 852 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, 853 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, 854 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, 855 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, 856 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, 857 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, 858 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, 859 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, 860 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>, 861 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>, 862 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>, 863 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>, 864 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>, 865 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>, 866 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 867 interrupt-names = "error", 868 "ch0", "ch1", "ch2", "ch3", 869 "ch4", "ch5", "ch6", "ch7", 870 "ch8", "ch9", "ch10", "ch11", 871 "ch12", "ch13", "ch14", "ch15"; 872 clocks = <&cpg CPG_MOD 217>; 873 clock-names = "fck"; 874 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 875 resets = <&cpg 217>; 876 #dma-cells = <1>; 877 dma-channels = <16>; 878 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, 879 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, 880 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, 881 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, 882 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, 883 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, 884 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, 885 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; 886 }; 887 888 ipmmu_ds0: iommu@e6740000 { 889 compatible = "renesas,ipmmu-r8a77990"; 890 reg = <0 0xe6740000 0 0x1000>; 891 renesas,ipmmu-main = <&ipmmu_mm 0>; 892 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 893 #iommu-cells = <1>; 894 }; 895 896 ipmmu_ds1: iommu@e7740000 { 897 compatible = "renesas,ipmmu-r8a77990"; 898 reg = <0 0xe7740000 0 0x1000>; 899 renesas,ipmmu-main = <&ipmmu_mm 1>; 900 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 901 #iommu-cells = <1>; 902 }; 903 904 ipmmu_hc: iommu@e6570000 { 905 compatible = "renesas,ipmmu-r8a77990"; 906 reg = <0 0xe6570000 0 0x1000>; 907 renesas,ipmmu-main = <&ipmmu_mm 2>; 908 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 909 #iommu-cells = <1>; 910 }; 911 912 ipmmu_mm: iommu@e67b0000 { 913 compatible = "renesas,ipmmu-r8a77990"; 914 reg = <0 0xe67b0000 0 0x1000>; 915 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 916 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 917 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 918 #iommu-cells = <1>; 919 }; 920 921 ipmmu_mp: iommu@ec670000 { 922 compatible = "renesas,ipmmu-r8a77990"; 923 reg = <0 0xec670000 0 0x1000>; 924 renesas,ipmmu-main = <&ipmmu_mm 4>; 925 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 926 #iommu-cells = <1>; 927 }; 928 929 ipmmu_pv0: iommu@fd800000 { 930 compatible = "renesas,ipmmu-r8a77990"; 931 reg = <0 0xfd800000 0 0x1000>; 932 renesas,ipmmu-main = <&ipmmu_mm 6>; 933 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 934 #iommu-cells = <1>; 935 }; 936 937 ipmmu_rt: iommu@ffc80000 { 938 compatible = "renesas,ipmmu-r8a77990"; 939 reg = <0 0xffc80000 0 0x1000>; 940 renesas,ipmmu-main = <&ipmmu_mm 10>; 941 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 942 #iommu-cells = <1>; 943 }; 944 945 ipmmu_vc0: iommu@fe6b0000 { 946 compatible = "renesas,ipmmu-r8a77990"; 947 reg = <0 0xfe6b0000 0 0x1000>; 948 renesas,ipmmu-main = <&ipmmu_mm 12>; 949 power-domains = <&sysc R8A77990_PD_A3VC>; 950 #iommu-cells = <1>; 951 }; 952 953 ipmmu_vi0: iommu@febd0000 { 954 compatible = "renesas,ipmmu-r8a77990"; 955 reg = <0 0xfebd0000 0 0x1000>; 956 renesas,ipmmu-main = <&ipmmu_mm 14>; 957 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 958 #iommu-cells = <1>; 959 }; 960 961 ipmmu_vp0: iommu@fe990000 { 962 compatible = "renesas,ipmmu-r8a77990"; 963 reg = <0 0xfe990000 0 0x1000>; 964 renesas,ipmmu-main = <&ipmmu_mm 16>; 965 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 966 #iommu-cells = <1>; 967 }; 968 969 avb: ethernet@e6800000 { 970 compatible = "renesas,etheravb-r8a77990", 971 "renesas,etheravb-rcar-gen3"; 972 reg = <0 0xe6800000 0 0x800>; 973 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 974 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 975 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 976 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 977 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 978 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 979 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 980 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 981 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 982 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 983 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 984 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 985 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 986 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 987 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 988 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 989 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 990 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 991 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 992 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 993 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 994 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 995 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 996 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 997 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 998 interrupt-names = "ch0", "ch1", "ch2", "ch3", 999 "ch4", "ch5", "ch6", "ch7", 1000 "ch8", "ch9", "ch10", "ch11", 1001 "ch12", "ch13", "ch14", "ch15", 1002 "ch16", "ch17", "ch18", "ch19", 1003 "ch20", "ch21", "ch22", "ch23", 1004 "ch24"; 1005 clocks = <&cpg CPG_MOD 812>; 1006 clock-names = "fck"; 1007 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1008 resets = <&cpg 812>; 1009 phy-mode = "rgmii"; 1010 rx-internal-delay-ps = <0>; 1011 iommus = <&ipmmu_ds0 16>; 1012 #address-cells = <1>; 1013 #size-cells = <0>; 1014 status = "disabled"; 1015 }; 1016 1017 can0: can@e6c30000 { 1018 compatible = "renesas,can-r8a77990", 1019 "renesas,rcar-gen3-can"; 1020 reg = <0 0xe6c30000 0 0x1000>; 1021 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 1022 clocks = <&cpg CPG_MOD 916>, 1023 <&cpg CPG_CORE R8A77990_CLK_CANFD>, 1024 <&can_clk>; 1025 clock-names = "clkp1", "clkp2", "can_clk"; 1026 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>; 1027 assigned-clock-rates = <40000000>; 1028 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1029 resets = <&cpg 916>; 1030 status = "disabled"; 1031 }; 1032 1033 can1: can@e6c38000 { 1034 compatible = "renesas,can-r8a77990", 1035 "renesas,rcar-gen3-can"; 1036 reg = <0 0xe6c38000 0 0x1000>; 1037 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 1038 clocks = <&cpg CPG_MOD 915>, 1039 <&cpg CPG_CORE R8A77990_CLK_CANFD>, 1040 <&can_clk>; 1041 clock-names = "clkp1", "clkp2", "can_clk"; 1042 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>; 1043 assigned-clock-rates = <40000000>; 1044 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1045 resets = <&cpg 915>; 1046 status = "disabled"; 1047 }; 1048 1049 canfd: can@e66c0000 { 1050 compatible = "renesas,r8a77990-canfd", 1051 "renesas,rcar-gen3-canfd"; 1052 reg = <0 0xe66c0000 0 0x8000>; 1053 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, 1054 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 1055 interrupt-names = "ch_int", "g_int"; 1056 clocks = <&cpg CPG_MOD 914>, 1057 <&cpg CPG_CORE R8A77990_CLK_CANFD>, 1058 <&can_clk>; 1059 clock-names = "fck", "canfd", "can_clk"; 1060 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>; 1061 assigned-clock-rates = <40000000>; 1062 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1063 resets = <&cpg 914>; 1064 status = "disabled"; 1065 1066 channel0 { 1067 status = "disabled"; 1068 }; 1069 1070 channel1 { 1071 status = "disabled"; 1072 }; 1073 }; 1074 1075 pwm0: pwm@e6e30000 { 1076 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1077 reg = <0 0xe6e30000 0 0x8>; 1078 clocks = <&cpg CPG_MOD 523>; 1079 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1080 resets = <&cpg 523>; 1081 #pwm-cells = <2>; 1082 status = "disabled"; 1083 }; 1084 1085 pwm1: pwm@e6e31000 { 1086 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1087 reg = <0 0xe6e31000 0 0x8>; 1088 clocks = <&cpg CPG_MOD 523>; 1089 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1090 resets = <&cpg 523>; 1091 #pwm-cells = <2>; 1092 status = "disabled"; 1093 }; 1094 1095 pwm2: pwm@e6e32000 { 1096 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1097 reg = <0 0xe6e32000 0 0x8>; 1098 clocks = <&cpg CPG_MOD 523>; 1099 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1100 resets = <&cpg 523>; 1101 #pwm-cells = <2>; 1102 status = "disabled"; 1103 }; 1104 1105 pwm3: pwm@e6e33000 { 1106 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1107 reg = <0 0xe6e33000 0 0x8>; 1108 clocks = <&cpg CPG_MOD 523>; 1109 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1110 resets = <&cpg 523>; 1111 #pwm-cells = <2>; 1112 status = "disabled"; 1113 }; 1114 1115 pwm4: pwm@e6e34000 { 1116 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1117 reg = <0 0xe6e34000 0 0x8>; 1118 clocks = <&cpg CPG_MOD 523>; 1119 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1120 resets = <&cpg 523>; 1121 #pwm-cells = <2>; 1122 status = "disabled"; 1123 }; 1124 1125 pwm5: pwm@e6e35000 { 1126 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1127 reg = <0 0xe6e35000 0 0x8>; 1128 clocks = <&cpg CPG_MOD 523>; 1129 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1130 resets = <&cpg 523>; 1131 #pwm-cells = <2>; 1132 status = "disabled"; 1133 }; 1134 1135 pwm6: pwm@e6e36000 { 1136 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1137 reg = <0 0xe6e36000 0 0x8>; 1138 clocks = <&cpg CPG_MOD 523>; 1139 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1140 resets = <&cpg 523>; 1141 #pwm-cells = <2>; 1142 status = "disabled"; 1143 }; 1144 1145 scif0: serial@e6e60000 { 1146 compatible = "renesas,scif-r8a77990", 1147 "renesas,rcar-gen3-scif", "renesas,scif"; 1148 reg = <0 0xe6e60000 0 64>; 1149 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 1150 clocks = <&cpg CPG_MOD 207>, 1151 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1152 <&scif_clk>; 1153 clock-names = "fck", "brg_int", "scif_clk"; 1154 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 1155 <&dmac2 0x51>, <&dmac2 0x50>; 1156 dma-names = "tx", "rx", "tx", "rx"; 1157 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1158 resets = <&cpg 207>; 1159 status = "disabled"; 1160 }; 1161 1162 scif1: serial@e6e68000 { 1163 compatible = "renesas,scif-r8a77990", 1164 "renesas,rcar-gen3-scif", "renesas,scif"; 1165 reg = <0 0xe6e68000 0 64>; 1166 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 1167 clocks = <&cpg CPG_MOD 206>, 1168 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1169 <&scif_clk>; 1170 clock-names = "fck", "brg_int", "scif_clk"; 1171 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 1172 <&dmac2 0x53>, <&dmac2 0x52>; 1173 dma-names = "tx", "rx", "tx", "rx"; 1174 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1175 resets = <&cpg 206>; 1176 status = "disabled"; 1177 }; 1178 1179 scif2: serial@e6e88000 { 1180 compatible = "renesas,scif-r8a77990", 1181 "renesas,rcar-gen3-scif", "renesas,scif"; 1182 reg = <0 0xe6e88000 0 64>; 1183 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 1184 clocks = <&cpg CPG_MOD 310>, 1185 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1186 <&scif_clk>; 1187 clock-names = "fck", "brg_int", "scif_clk"; 1188 dmas = <&dmac1 0x13>, <&dmac1 0x12>, 1189 <&dmac2 0x13>, <&dmac2 0x12>; 1190 dma-names = "tx", "rx", "tx", "rx"; 1191 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1192 resets = <&cpg 310>; 1193 status = "disabled"; 1194 }; 1195 1196 scif3: serial@e6c50000 { 1197 compatible = "renesas,scif-r8a77990", 1198 "renesas,rcar-gen3-scif", "renesas,scif"; 1199 reg = <0 0xe6c50000 0 64>; 1200 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 1201 clocks = <&cpg CPG_MOD 204>, 1202 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1203 <&scif_clk>; 1204 clock-names = "fck", "brg_int", "scif_clk"; 1205 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 1206 dma-names = "tx", "rx"; 1207 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1208 resets = <&cpg 204>; 1209 status = "disabled"; 1210 }; 1211 1212 scif4: serial@e6c40000 { 1213 compatible = "renesas,scif-r8a77990", 1214 "renesas,rcar-gen3-scif", "renesas,scif"; 1215 reg = <0 0xe6c40000 0 64>; 1216 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 1217 clocks = <&cpg CPG_MOD 203>, 1218 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1219 <&scif_clk>; 1220 clock-names = "fck", "brg_int", "scif_clk"; 1221 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 1222 dma-names = "tx", "rx"; 1223 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1224 resets = <&cpg 203>; 1225 status = "disabled"; 1226 }; 1227 1228 scif5: serial@e6f30000 { 1229 compatible = "renesas,scif-r8a77990", 1230 "renesas,rcar-gen3-scif", "renesas,scif"; 1231 reg = <0 0xe6f30000 0 64>; 1232 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 1233 clocks = <&cpg CPG_MOD 202>, 1234 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1235 <&scif_clk>; 1236 clock-names = "fck", "brg_int", "scif_clk"; 1237 dmas = <&dmac0 0x5b>, <&dmac0 0x5a>; 1238 dma-names = "tx", "rx"; 1239 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1240 resets = <&cpg 202>; 1241 status = "disabled"; 1242 }; 1243 1244 msiof0: spi@e6e90000 { 1245 compatible = "renesas,msiof-r8a77990", 1246 "renesas,rcar-gen3-msiof"; 1247 reg = <0 0xe6e90000 0 0x0064>; 1248 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1249 clocks = <&cpg CPG_MOD 211>; 1250 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 1251 <&dmac2 0x41>, <&dmac2 0x40>; 1252 dma-names = "tx", "rx", "tx", "rx"; 1253 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1254 resets = <&cpg 211>; 1255 #address-cells = <1>; 1256 #size-cells = <0>; 1257 status = "disabled"; 1258 }; 1259 1260 msiof1: spi@e6ea0000 { 1261 compatible = "renesas,msiof-r8a77990", 1262 "renesas,rcar-gen3-msiof"; 1263 reg = <0 0xe6ea0000 0 0x0064>; 1264 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1265 clocks = <&cpg CPG_MOD 210>; 1266 dmas = <&dmac0 0x43>, <&dmac0 0x42>; 1267 dma-names = "tx", "rx"; 1268 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1269 resets = <&cpg 210>; 1270 #address-cells = <1>; 1271 #size-cells = <0>; 1272 status = "disabled"; 1273 }; 1274 1275 msiof2: spi@e6c00000 { 1276 compatible = "renesas,msiof-r8a77990", 1277 "renesas,rcar-gen3-msiof"; 1278 reg = <0 0xe6c00000 0 0x0064>; 1279 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1280 clocks = <&cpg CPG_MOD 209>; 1281 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 1282 dma-names = "tx", "rx"; 1283 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1284 resets = <&cpg 209>; 1285 #address-cells = <1>; 1286 #size-cells = <0>; 1287 status = "disabled"; 1288 }; 1289 1290 msiof3: spi@e6c10000 { 1291 compatible = "renesas,msiof-r8a77990", 1292 "renesas,rcar-gen3-msiof"; 1293 reg = <0 0xe6c10000 0 0x0064>; 1294 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 1295 clocks = <&cpg CPG_MOD 208>; 1296 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 1297 dma-names = "tx", "rx"; 1298 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1299 resets = <&cpg 208>; 1300 #address-cells = <1>; 1301 #size-cells = <0>; 1302 status = "disabled"; 1303 }; 1304 1305 vin4: video@e6ef4000 { 1306 compatible = "renesas,vin-r8a77990"; 1307 reg = <0 0xe6ef4000 0 0x1000>; 1308 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1309 clocks = <&cpg CPG_MOD 807>; 1310 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1311 resets = <&cpg 807>; 1312 renesas,id = <4>; 1313 status = "disabled"; 1314 1315 ports { 1316 #address-cells = <1>; 1317 #size-cells = <0>; 1318 1319 port@1 { 1320 #address-cells = <1>; 1321 #size-cells = <0>; 1322 1323 reg = <1>; 1324 1325 vin4csi40: endpoint@2 { 1326 reg = <2>; 1327 remote-endpoint = <&csi40vin4>; 1328 }; 1329 }; 1330 }; 1331 }; 1332 1333 vin5: video@e6ef5000 { 1334 compatible = "renesas,vin-r8a77990"; 1335 reg = <0 0xe6ef5000 0 0x1000>; 1336 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1337 clocks = <&cpg CPG_MOD 806>; 1338 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1339 resets = <&cpg 806>; 1340 renesas,id = <5>; 1341 status = "disabled"; 1342 1343 ports { 1344 #address-cells = <1>; 1345 #size-cells = <0>; 1346 1347 port@1 { 1348 #address-cells = <1>; 1349 #size-cells = <0>; 1350 1351 reg = <1>; 1352 1353 vin5csi40: endpoint@2 { 1354 reg = <2>; 1355 remote-endpoint = <&csi40vin5>; 1356 }; 1357 }; 1358 }; 1359 }; 1360 1361 drif00: rif@e6f40000 { 1362 compatible = "renesas,r8a77990-drif", 1363 "renesas,rcar-gen3-drif"; 1364 reg = <0 0xe6f40000 0 0x84>; 1365 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 1366 clocks = <&cpg CPG_MOD 515>; 1367 clock-names = "fck"; 1368 dmas = <&dmac1 0x20>, <&dmac2 0x20>; 1369 dma-names = "rx", "rx"; 1370 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1371 resets = <&cpg 515>; 1372 renesas,bonding = <&drif01>; 1373 status = "disabled"; 1374 }; 1375 1376 drif01: rif@e6f50000 { 1377 compatible = "renesas,r8a77990-drif", 1378 "renesas,rcar-gen3-drif"; 1379 reg = <0 0xe6f50000 0 0x84>; 1380 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 1381 clocks = <&cpg CPG_MOD 514>; 1382 clock-names = "fck"; 1383 dmas = <&dmac1 0x22>, <&dmac2 0x22>; 1384 dma-names = "rx", "rx"; 1385 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1386 resets = <&cpg 514>; 1387 renesas,bonding = <&drif00>; 1388 status = "disabled"; 1389 }; 1390 1391 drif10: rif@e6f60000 { 1392 compatible = "renesas,r8a77990-drif", 1393 "renesas,rcar-gen3-drif"; 1394 reg = <0 0xe6f60000 0 0x84>; 1395 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 1396 clocks = <&cpg CPG_MOD 513>; 1397 clock-names = "fck"; 1398 dmas = <&dmac1 0x24>, <&dmac2 0x24>; 1399 dma-names = "rx", "rx"; 1400 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1401 resets = <&cpg 513>; 1402 renesas,bonding = <&drif11>; 1403 status = "disabled"; 1404 }; 1405 1406 drif11: rif@e6f70000 { 1407 compatible = "renesas,r8a77990-drif", 1408 "renesas,rcar-gen3-drif"; 1409 reg = <0 0xe6f70000 0 0x84>; 1410 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 1411 clocks = <&cpg CPG_MOD 512>; 1412 clock-names = "fck"; 1413 dmas = <&dmac1 0x26>, <&dmac2 0x26>; 1414 dma-names = "rx", "rx"; 1415 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1416 resets = <&cpg 512>; 1417 renesas,bonding = <&drif10>; 1418 status = "disabled"; 1419 }; 1420 1421 drif20: rif@e6f80000 { 1422 compatible = "renesas,r8a77990-drif", 1423 "renesas,rcar-gen3-drif"; 1424 reg = <0 0xe6f80000 0 0x84>; 1425 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 1426 clocks = <&cpg CPG_MOD 511>; 1427 clock-names = "fck"; 1428 dmas = <&dmac0 0x28>; 1429 dma-names = "rx"; 1430 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1431 resets = <&cpg 511>; 1432 renesas,bonding = <&drif21>; 1433 status = "disabled"; 1434 }; 1435 1436 drif21: rif@e6f90000 { 1437 compatible = "renesas,r8a77990-drif", 1438 "renesas,rcar-gen3-drif"; 1439 reg = <0 0xe6f90000 0 0x84>; 1440 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 1441 clocks = <&cpg CPG_MOD 510>; 1442 clock-names = "fck"; 1443 dmas = <&dmac0 0x2a>; 1444 dma-names = "rx"; 1445 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1446 resets = <&cpg 510>; 1447 renesas,bonding = <&drif20>; 1448 status = "disabled"; 1449 }; 1450 1451 drif30: rif@e6fa0000 { 1452 compatible = "renesas,r8a77990-drif", 1453 "renesas,rcar-gen3-drif"; 1454 reg = <0 0xe6fa0000 0 0x84>; 1455 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; 1456 clocks = <&cpg CPG_MOD 509>; 1457 clock-names = "fck"; 1458 dmas = <&dmac0 0x2c>; 1459 dma-names = "rx"; 1460 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1461 resets = <&cpg 509>; 1462 renesas,bonding = <&drif31>; 1463 status = "disabled"; 1464 }; 1465 1466 drif31: rif@e6fb0000 { 1467 compatible = "renesas,r8a77990-drif", 1468 "renesas,rcar-gen3-drif"; 1469 reg = <0 0xe6fb0000 0 0x84>; 1470 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; 1471 clocks = <&cpg CPG_MOD 508>; 1472 clock-names = "fck"; 1473 dmas = <&dmac0 0x2e>; 1474 dma-names = "rx"; 1475 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1476 resets = <&cpg 508>; 1477 renesas,bonding = <&drif30>; 1478 status = "disabled"; 1479 }; 1480 1481 rcar_sound: sound@ec500000 { 1482 /* 1483 * #sound-dai-cells is required 1484 * 1485 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1486 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1487 */ 1488 /* 1489 * #clock-cells is required for audio_clkout0/1/2/3 1490 * 1491 * clkout : #clock-cells = <0>; <&rcar_sound>; 1492 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; 1493 */ 1494 compatible = "renesas,rcar_sound-r8a77990", "renesas,rcar_sound-gen3"; 1495 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1496 <0 0xec5a0000 0 0x100>, /* ADG */ 1497 <0 0xec540000 0 0x1000>, /* SSIU */ 1498 <0 0xec541000 0 0x280>, /* SSI */ 1499 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ 1500 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1501 1502 clocks = <&cpg CPG_MOD 1005>, 1503 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1504 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1505 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1506 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1507 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1508 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 1509 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 1510 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 1511 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 1512 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 1513 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1514 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1515 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1516 <&audio_clk_a>, <&audio_clk_b>, 1517 <&audio_clk_c>, 1518 <&cpg CPG_CORE R8A77990_CLK_ZA2>; 1519 clock-names = "ssi-all", 1520 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1521 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1522 "ssi.1", "ssi.0", 1523 "src.9", "src.8", "src.7", "src.6", 1524 "src.5", "src.4", "src.3", "src.2", 1525 "src.1", "src.0", 1526 "mix.1", "mix.0", 1527 "ctu.1", "ctu.0", 1528 "dvc.0", "dvc.1", 1529 "clk_a", "clk_b", "clk_c", "clk_i"; 1530 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1531 resets = <&cpg 1005>, 1532 <&cpg 1006>, <&cpg 1007>, 1533 <&cpg 1008>, <&cpg 1009>, 1534 <&cpg 1010>, <&cpg 1011>, 1535 <&cpg 1012>, <&cpg 1013>, 1536 <&cpg 1014>, <&cpg 1015>; 1537 reset-names = "ssi-all", 1538 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1539 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1540 "ssi.1", "ssi.0"; 1541 status = "disabled"; 1542 1543 rcar_sound,ctu { 1544 ctu00: ctu-0 { }; 1545 ctu01: ctu-1 { }; 1546 ctu02: ctu-2 { }; 1547 ctu03: ctu-3 { }; 1548 ctu10: ctu-4 { }; 1549 ctu11: ctu-5 { }; 1550 ctu12: ctu-6 { }; 1551 ctu13: ctu-7 { }; 1552 }; 1553 1554 rcar_sound,dvc { 1555 dvc0: dvc-0 { 1556 dmas = <&audma0 0xbc>; 1557 dma-names = "tx"; 1558 }; 1559 dvc1: dvc-1 { 1560 dmas = <&audma0 0xbe>; 1561 dma-names = "tx"; 1562 }; 1563 }; 1564 1565 rcar_sound,mix { 1566 mix0: mix-0 { }; 1567 mix1: mix-1 { }; 1568 }; 1569 1570 rcar_sound,src { 1571 src0: src-0 { 1572 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1573 dmas = <&audma0 0x85>, <&audma0 0x9a>; 1574 dma-names = "rx", "tx"; 1575 }; 1576 src1: src-1 { 1577 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1578 dmas = <&audma0 0x87>, <&audma0 0x9c>; 1579 dma-names = "rx", "tx"; 1580 }; 1581 src2: src-2 { 1582 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1583 dmas = <&audma0 0x89>, <&audma0 0x9e>; 1584 dma-names = "rx", "tx"; 1585 }; 1586 src3: src-3 { 1587 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1588 dmas = <&audma0 0x8b>, <&audma0 0xa0>; 1589 dma-names = "rx", "tx"; 1590 }; 1591 src4: src-4 { 1592 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1593 dmas = <&audma0 0x8d>, <&audma0 0xb0>; 1594 dma-names = "rx", "tx"; 1595 }; 1596 src5: src-5 { 1597 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1598 dmas = <&audma0 0x8f>, <&audma0 0xb2>; 1599 dma-names = "rx", "tx"; 1600 }; 1601 src6: src-6 { 1602 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1603 dmas = <&audma0 0x91>, <&audma0 0xb4>; 1604 dma-names = "rx", "tx"; 1605 }; 1606 src7: src-7 { 1607 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 1608 dmas = <&audma0 0x93>, <&audma0 0xb6>; 1609 dma-names = "rx", "tx"; 1610 }; 1611 src8: src-8 { 1612 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1613 dmas = <&audma0 0x95>, <&audma0 0xb8>; 1614 dma-names = "rx", "tx"; 1615 }; 1616 src9: src-9 { 1617 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1618 dmas = <&audma0 0x97>, <&audma0 0xba>; 1619 dma-names = "rx", "tx"; 1620 }; 1621 }; 1622 1623 rcar_sound,ssi { 1624 ssi0: ssi-0 { 1625 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 1626 dmas = <&audma0 0x01>, <&audma0 0x02>, 1627 <&audma0 0x15>, <&audma0 0x16>; 1628 dma-names = "rx", "tx", "rxu", "txu"; 1629 }; 1630 ssi1: ssi-1 { 1631 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 1632 dmas = <&audma0 0x03>, <&audma0 0x04>, 1633 <&audma0 0x49>, <&audma0 0x4a>; 1634 dma-names = "rx", "tx", "rxu", "txu"; 1635 }; 1636 ssi2: ssi-2 { 1637 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 1638 dmas = <&audma0 0x05>, <&audma0 0x06>, 1639 <&audma0 0x63>, <&audma0 0x64>; 1640 dma-names = "rx", "tx", "rxu", "txu"; 1641 }; 1642 ssi3: ssi-3 { 1643 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 1644 dmas = <&audma0 0x07>, <&audma0 0x08>, 1645 <&audma0 0x6f>, <&audma0 0x70>; 1646 dma-names = "rx", "tx", "rxu", "txu"; 1647 }; 1648 ssi4: ssi-4 { 1649 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 1650 dmas = <&audma0 0x09>, <&audma0 0x0a>, 1651 <&audma0 0x71>, <&audma0 0x72>; 1652 dma-names = "rx", "tx", "rxu", "txu"; 1653 }; 1654 ssi5: ssi-5 { 1655 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 1656 dmas = <&audma0 0x0b>, <&audma0 0x0c>, 1657 <&audma0 0x73>, <&audma0 0x74>; 1658 dma-names = "rx", "tx", "rxu", "txu"; 1659 }; 1660 ssi6: ssi-6 { 1661 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 1662 dmas = <&audma0 0x0d>, <&audma0 0x0e>, 1663 <&audma0 0x75>, <&audma0 0x76>; 1664 dma-names = "rx", "tx", "rxu", "txu"; 1665 }; 1666 ssi7: ssi-7 { 1667 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 1668 dmas = <&audma0 0x0f>, <&audma0 0x10>, 1669 <&audma0 0x79>, <&audma0 0x7a>; 1670 dma-names = "rx", "tx", "rxu", "txu"; 1671 }; 1672 ssi8: ssi-8 { 1673 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 1674 dmas = <&audma0 0x11>, <&audma0 0x12>, 1675 <&audma0 0x7b>, <&audma0 0x7c>; 1676 dma-names = "rx", "tx", "rxu", "txu"; 1677 }; 1678 ssi9: ssi-9 { 1679 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 1680 dmas = <&audma0 0x13>, <&audma0 0x14>, 1681 <&audma0 0x7d>, <&audma0 0x7e>; 1682 dma-names = "rx", "tx", "rxu", "txu"; 1683 }; 1684 }; 1685 }; 1686 1687 mlp: mlp@ec520000 { 1688 compatible = "renesas,r8a77990-mlp", 1689 "renesas,rcar-gen3-mlp"; 1690 reg = <0 0xec520000 0 0x800>; 1691 interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>, 1692 <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>; 1693 clocks = <&cpg CPG_MOD 802>; 1694 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1695 resets = <&cpg 802>; 1696 status = "disabled"; 1697 }; 1698 1699 audma0: dma-controller@ec700000 { 1700 compatible = "renesas,dmac-r8a77990", 1701 "renesas,rcar-dmac"; 1702 reg = <0 0xec700000 0 0x10000>; 1703 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, 1704 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 1705 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 1706 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 1707 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 1708 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 1709 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 1710 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 1711 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 1712 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 1713 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 1714 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 1715 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 1716 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, 1717 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 1718 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 1719 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; 1720 interrupt-names = "error", 1721 "ch0", "ch1", "ch2", "ch3", 1722 "ch4", "ch5", "ch6", "ch7", 1723 "ch8", "ch9", "ch10", "ch11", 1724 "ch12", "ch13", "ch14", "ch15"; 1725 clocks = <&cpg CPG_MOD 502>; 1726 clock-names = "fck"; 1727 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1728 resets = <&cpg 502>; 1729 #dma-cells = <1>; 1730 dma-channels = <16>; 1731 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>, 1732 <&ipmmu_mp 2>, <&ipmmu_mp 3>, 1733 <&ipmmu_mp 4>, <&ipmmu_mp 5>, 1734 <&ipmmu_mp 6>, <&ipmmu_mp 7>, 1735 <&ipmmu_mp 8>, <&ipmmu_mp 9>, 1736 <&ipmmu_mp 10>, <&ipmmu_mp 11>, 1737 <&ipmmu_mp 12>, <&ipmmu_mp 13>, 1738 <&ipmmu_mp 14>, <&ipmmu_mp 15>; 1739 }; 1740 1741 xhci0: usb@ee000000 { 1742 compatible = "renesas,xhci-r8a77990", 1743 "renesas,rcar-gen3-xhci"; 1744 reg = <0 0xee000000 0 0xc00>; 1745 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 1746 clocks = <&cpg CPG_MOD 328>; 1747 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1748 resets = <&cpg 328>; 1749 status = "disabled"; 1750 }; 1751 1752 usb3_peri0: usb@ee020000 { 1753 compatible = "renesas,r8a77990-usb3-peri", 1754 "renesas,rcar-gen3-usb3-peri"; 1755 reg = <0 0xee020000 0 0x400>; 1756 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 1757 clocks = <&cpg CPG_MOD 328>; 1758 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1759 resets = <&cpg 328>; 1760 status = "disabled"; 1761 }; 1762 1763 ohci0: usb@ee080000 { 1764 compatible = "generic-ohci"; 1765 reg = <0 0xee080000 0 0x100>; 1766 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1767 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1768 phys = <&usb2_phy0 1>; 1769 phy-names = "usb"; 1770 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1771 resets = <&cpg 703>, <&cpg 704>; 1772 status = "disabled"; 1773 }; 1774 1775 ehci0: usb@ee080100 { 1776 compatible = "generic-ehci"; 1777 reg = <0 0xee080100 0 0x100>; 1778 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1779 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1780 phys = <&usb2_phy0 2>; 1781 phy-names = "usb"; 1782 companion = <&ohci0>; 1783 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1784 resets = <&cpg 703>, <&cpg 704>; 1785 status = "disabled"; 1786 }; 1787 1788 usb2_phy0: usb-phy@ee080200 { 1789 compatible = "renesas,usb2-phy-r8a77990", 1790 "renesas,rcar-gen3-usb2-phy"; 1791 reg = <0 0xee080200 0 0x700>; 1792 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1793 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1794 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1795 resets = <&cpg 703>, <&cpg 704>; 1796 #phy-cells = <1>; 1797 status = "disabled"; 1798 }; 1799 1800 sdhi0: mmc@ee100000 { 1801 compatible = "renesas,sdhi-r8a77990", 1802 "renesas,rcar-gen3-sdhi"; 1803 reg = <0 0xee100000 0 0x2000>; 1804 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 1805 clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A77990_CLK_SD0H>; 1806 clock-names = "core", "clkh"; 1807 max-frequency = <200000000>; 1808 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1809 resets = <&cpg 314>; 1810 iommus = <&ipmmu_ds1 32>; 1811 status = "disabled"; 1812 }; 1813 1814 sdhi1: mmc@ee120000 { 1815 compatible = "renesas,sdhi-r8a77990", 1816 "renesas,rcar-gen3-sdhi"; 1817 reg = <0 0xee120000 0 0x2000>; 1818 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 1819 clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A77990_CLK_SD1H>; 1820 clock-names = "core", "clkh"; 1821 max-frequency = <200000000>; 1822 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1823 resets = <&cpg 313>; 1824 iommus = <&ipmmu_ds1 33>; 1825 status = "disabled"; 1826 }; 1827 1828 sdhi3: mmc@ee160000 { 1829 compatible = "renesas,sdhi-r8a77990", 1830 "renesas,rcar-gen3-sdhi"; 1831 reg = <0 0xee160000 0 0x2000>; 1832 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 1833 clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A77990_CLK_SD3H>; 1834 clock-names = "core", "clkh"; 1835 max-frequency = <200000000>; 1836 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1837 resets = <&cpg 311>; 1838 iommus = <&ipmmu_ds1 35>; 1839 status = "disabled"; 1840 }; 1841 1842 rpc: spi@ee200000 { 1843 compatible = "renesas,r8a77990-rpc-if", 1844 "renesas,rcar-gen3-rpc-if"; 1845 reg = <0 0xee200000 0 0x200>, 1846 <0 0x08000000 0 0x04000000>, 1847 <0 0xee208000 0 0x100>; 1848 reg-names = "regs", "dirmap", "wbuf"; 1849 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; 1850 clocks = <&cpg CPG_MOD 917>; 1851 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1852 resets = <&cpg 917>; 1853 #address-cells = <1>; 1854 #size-cells = <0>; 1855 status = "disabled"; 1856 }; 1857 1858 gic: interrupt-controller@f1010000 { 1859 compatible = "arm,gic-400"; 1860 #interrupt-cells = <3>; 1861 #address-cells = <0>; 1862 interrupt-controller; 1863 reg = <0x0 0xf1010000 0 0x1000>, 1864 <0x0 0xf1020000 0 0x20000>, 1865 <0x0 0xf1040000 0 0x20000>, 1866 <0x0 0xf1060000 0 0x20000>; 1867 interrupts = <GIC_PPI 9 1868 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 1869 clocks = <&cpg CPG_MOD 408>; 1870 clock-names = "clk"; 1871 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1872 resets = <&cpg 408>; 1873 }; 1874 1875 pciec0: pcie@fe000000 { 1876 compatible = "renesas,pcie-r8a77990", 1877 "renesas,pcie-rcar-gen3"; 1878 reg = <0 0xfe000000 0 0x80000>; 1879 #address-cells = <3>; 1880 #size-cells = <2>; 1881 bus-range = <0x00 0xff>; 1882 device_type = "pci"; 1883 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, 1884 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, 1885 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, 1886 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 1887 /* Map all possible DDR as inbound ranges */ 1888 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>; 1889 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 1890 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 1891 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 1892 #interrupt-cells = <1>; 1893 interrupt-map-mask = <0 0 0 0>; 1894 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 1895 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 1896 clock-names = "pcie", "pcie_bus"; 1897 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1898 resets = <&cpg 319>; 1899 status = "disabled"; 1900 }; 1901 1902 vspb0: vsp@fe960000 { 1903 compatible = "renesas,vsp2"; 1904 reg = <0 0xfe960000 0 0x8000>; 1905 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 1906 clocks = <&cpg CPG_MOD 626>; 1907 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1908 resets = <&cpg 626>; 1909 renesas,fcp = <&fcpvb0>; 1910 }; 1911 1912 fcpvb0: fcp@fe96f000 { 1913 compatible = "renesas,fcpv"; 1914 reg = <0 0xfe96f000 0 0x200>; 1915 clocks = <&cpg CPG_MOD 607>; 1916 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1917 resets = <&cpg 607>; 1918 iommus = <&ipmmu_vp0 5>; 1919 }; 1920 1921 vspi0: vsp@fe9a0000 { 1922 compatible = "renesas,vsp2"; 1923 reg = <0 0xfe9a0000 0 0x8000>; 1924 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 1925 clocks = <&cpg CPG_MOD 631>; 1926 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1927 resets = <&cpg 631>; 1928 renesas,fcp = <&fcpvi0>; 1929 }; 1930 1931 fcpvi0: fcp@fe9af000 { 1932 compatible = "renesas,fcpv"; 1933 reg = <0 0xfe9af000 0 0x200>; 1934 clocks = <&cpg CPG_MOD 611>; 1935 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1936 resets = <&cpg 611>; 1937 iommus = <&ipmmu_vp0 8>; 1938 }; 1939 1940 vspd0: vsp@fea20000 { 1941 compatible = "renesas,vsp2"; 1942 reg = <0 0xfea20000 0 0x7000>; 1943 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 1944 clocks = <&cpg CPG_MOD 623>; 1945 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1946 resets = <&cpg 623>; 1947 renesas,fcp = <&fcpvd0>; 1948 }; 1949 1950 fcpvd0: fcp@fea27000 { 1951 compatible = "renesas,fcpv"; 1952 reg = <0 0xfea27000 0 0x200>; 1953 clocks = <&cpg CPG_MOD 603>; 1954 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1955 resets = <&cpg 603>; 1956 iommus = <&ipmmu_vi0 8>; 1957 }; 1958 1959 vspd1: vsp@fea28000 { 1960 compatible = "renesas,vsp2"; 1961 reg = <0 0xfea28000 0 0x7000>; 1962 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 1963 clocks = <&cpg CPG_MOD 622>; 1964 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1965 resets = <&cpg 622>; 1966 renesas,fcp = <&fcpvd1>; 1967 }; 1968 1969 fcpvd1: fcp@fea2f000 { 1970 compatible = "renesas,fcpv"; 1971 reg = <0 0xfea2f000 0 0x200>; 1972 clocks = <&cpg CPG_MOD 602>; 1973 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1974 resets = <&cpg 602>; 1975 iommus = <&ipmmu_vi0 9>; 1976 }; 1977 1978 cmm0: cmm@fea40000 { 1979 compatible = "renesas,r8a77990-cmm", 1980 "renesas,rcar-gen3-cmm"; 1981 reg = <0 0xfea40000 0 0x1000>; 1982 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1983 clocks = <&cpg CPG_MOD 711>; 1984 resets = <&cpg 711>; 1985 }; 1986 1987 cmm1: cmm@fea50000 { 1988 compatible = "renesas,r8a77990-cmm", 1989 "renesas,rcar-gen3-cmm"; 1990 reg = <0 0xfea50000 0 0x1000>; 1991 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1992 clocks = <&cpg CPG_MOD 710>; 1993 resets = <&cpg 710>; 1994 }; 1995 1996 csi40: csi2@feaa0000 { 1997 compatible = "renesas,r8a77990-csi2"; 1998 reg = <0 0xfeaa0000 0 0x10000>; 1999 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 2000 clocks = <&cpg CPG_MOD 716>; 2001 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 2002 resets = <&cpg 716>; 2003 status = "disabled"; 2004 2005 ports { 2006 #address-cells = <1>; 2007 #size-cells = <0>; 2008 2009 port@0 { 2010 reg = <0>; 2011 }; 2012 2013 port@1 { 2014 #address-cells = <1>; 2015 #size-cells = <0>; 2016 2017 reg = <1>; 2018 2019 csi40vin4: endpoint@0 { 2020 reg = <0>; 2021 remote-endpoint = <&vin4csi40>; 2022 }; 2023 csi40vin5: endpoint@1 { 2024 reg = <1>; 2025 remote-endpoint = <&vin5csi40>; 2026 }; 2027 }; 2028 }; 2029 }; 2030 2031 du: display@feb00000 { 2032 compatible = "renesas,du-r8a77990"; 2033 reg = <0 0xfeb00000 0 0x40000>; 2034 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 2035 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; 2036 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>; 2037 clock-names = "du.0", "du.1"; 2038 resets = <&cpg 724>; 2039 reset-names = "du.0"; 2040 2041 renesas,cmms = <&cmm0>, <&cmm1>; 2042 renesas,vsps = <&vspd0 0>, <&vspd1 0>; 2043 2044 status = "disabled"; 2045 2046 ports { 2047 #address-cells = <1>; 2048 #size-cells = <0>; 2049 2050 port@0 { 2051 reg = <0>; 2052 }; 2053 2054 port@1 { 2055 reg = <1>; 2056 du_out_lvds0: endpoint { 2057 remote-endpoint = <&lvds0_in>; 2058 }; 2059 }; 2060 2061 port@2 { 2062 reg = <2>; 2063 du_out_lvds1: endpoint { 2064 remote-endpoint = <&lvds1_in>; 2065 }; 2066 }; 2067 }; 2068 }; 2069 2070 lvds0: lvds-encoder@feb90000 { 2071 compatible = "renesas,r8a77990-lvds"; 2072 reg = <0 0xfeb90000 0 0x20>; 2073 clocks = <&cpg CPG_MOD 727>; 2074 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 2075 resets = <&cpg 727>; 2076 status = "disabled"; 2077 2078 renesas,companion = <&lvds1>; 2079 2080 ports { 2081 #address-cells = <1>; 2082 #size-cells = <0>; 2083 2084 port@0 { 2085 reg = <0>; 2086 lvds0_in: endpoint { 2087 remote-endpoint = <&du_out_lvds0>; 2088 }; 2089 }; 2090 2091 port@1 { 2092 reg = <1>; 2093 }; 2094 }; 2095 }; 2096 2097 lvds1: lvds-encoder@feb90100 { 2098 compatible = "renesas,r8a77990-lvds"; 2099 reg = <0 0xfeb90100 0 0x20>; 2100 clocks = <&cpg CPG_MOD 727>; 2101 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 2102 resets = <&cpg 726>; 2103 status = "disabled"; 2104 2105 ports { 2106 #address-cells = <1>; 2107 #size-cells = <0>; 2108 2109 port@0 { 2110 reg = <0>; 2111 lvds1_in: endpoint { 2112 remote-endpoint = <&du_out_lvds1>; 2113 }; 2114 }; 2115 2116 port@1 { 2117 reg = <1>; 2118 }; 2119 }; 2120 }; 2121 2122 prr: chipid@fff00044 { 2123 compatible = "renesas,prr"; 2124 reg = <0 0xfff00044 0 4>; 2125 }; 2126 }; 2127 2128 thermal-zones { 2129 cpu-thermal { 2130 polling-delay-passive = <250>; 2131 polling-delay = <0>; 2132 thermal-sensors = <&thermal>; 2133 sustainable-power = <717>; 2134 2135 cooling-maps { 2136 map0 { 2137 trip = <&target>; 2138 cooling-device = <&a53_0 0 2>; 2139 contribution = <1024>; 2140 }; 2141 }; 2142 2143 trips { 2144 sensor1_crit: sensor1-crit { 2145 temperature = <120000>; 2146 hysteresis = <2000>; 2147 type = "critical"; 2148 }; 2149 2150 target: trip-point1 { 2151 temperature = <100000>; 2152 hysteresis = <2000>; 2153 type = "passive"; 2154 }; 2155 }; 2156 }; 2157 }; 2158 2159 timer { 2160 compatible = "arm,armv8-timer"; 2161 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2162 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2163 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2164 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 2165 }; 2166 };
Cache object: 8718bbb0562e524f19c9f2bb5c51d32a
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