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sys/contrib/device-tree/src/arm64/renesas/r8a779a0.dtsi
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1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Device Tree Source for the R-Car V3U (R8A779A0) SoC 4 * 5 * Copyright (C) 2020 Renesas Electronics Corp. 6 */ 7 8 #include <dt-bindings/clock/r8a779a0-cpg-mssr.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/power/r8a779a0-sysc.h> 11 12 / { 13 compatible = "renesas,r8a779a0"; 14 #address-cells = <2>; 15 #size-cells = <2>; 16 17 aliases { 18 i2c0 = &i2c0; 19 i2c1 = &i2c1; 20 i2c2 = &i2c2; 21 i2c3 = &i2c3; 22 i2c4 = &i2c4; 23 i2c5 = &i2c5; 24 i2c6 = &i2c6; 25 }; 26 27 /* External CAN clock - to be overridden by boards that provide it */ 28 can_clk: can { 29 compatible = "fixed-clock"; 30 #clock-cells = <0>; 31 clock-frequency = <0>; 32 }; 33 34 cpus { 35 #address-cells = <1>; 36 #size-cells = <0>; 37 38 a76_0: cpu@0 { 39 compatible = "arm,cortex-a76"; 40 reg = <0>; 41 device_type = "cpu"; 42 power-domains = <&sysc R8A779A0_PD_A1E0D0C0>; 43 next-level-cache = <&L3_CA76_0>; 44 clocks = <&cpg CPG_CORE R8A779A0_CLK_Z0>; 45 }; 46 47 L3_CA76_0: cache-controller-0 { 48 compatible = "cache"; 49 power-domains = <&sysc R8A779A0_PD_A2E0D0>; 50 cache-unified; 51 cache-level = <3>; 52 }; 53 }; 54 55 extal_clk: extal { 56 compatible = "fixed-clock"; 57 #clock-cells = <0>; 58 /* This value must be overridden by the board */ 59 clock-frequency = <0>; 60 }; 61 62 extalr_clk: extalr { 63 compatible = "fixed-clock"; 64 #clock-cells = <0>; 65 /* This value must be overridden by the board */ 66 clock-frequency = <0>; 67 }; 68 69 pmu_a76 { 70 compatible = "arm,cortex-a76-pmu"; 71 interrupts-extended = <&gic GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>; 72 }; 73 74 /* External SCIF clock - to be overridden by boards that provide it */ 75 scif_clk: scif { 76 compatible = "fixed-clock"; 77 #clock-cells = <0>; 78 clock-frequency = <0>; 79 }; 80 81 soc: soc { 82 compatible = "simple-bus"; 83 interrupt-parent = <&gic>; 84 #address-cells = <2>; 85 #size-cells = <2>; 86 ranges; 87 88 rwdt: watchdog@e6020000 { 89 compatible = "renesas,r8a779a0-wdt", 90 "renesas,rcar-gen4-wdt"; 91 reg = <0 0xe6020000 0 0x0c>; 92 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 93 clocks = <&cpg CPG_MOD 907>; 94 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 95 resets = <&cpg 907>; 96 status = "disabled"; 97 }; 98 99 pfc: pinctrl@e6050000 { 100 compatible = "renesas,pfc-r8a779a0"; 101 reg = <0 0xe6050000 0 0x16c>, <0 0xe6050800 0 0x16c>, 102 <0 0xe6058000 0 0x16c>, <0 0xe6058800 0 0x16c>, 103 <0 0xe6060000 0 0x16c>, <0 0xe6060800 0 0x16c>, 104 <0 0xe6068000 0 0x16c>, <0 0xe6068800 0 0x16c>, 105 <0 0xe6069000 0 0x16c>, <0 0xe6069800 0 0x16c>; 106 }; 107 108 gpio0: gpio@e6058180 { 109 compatible = "renesas,gpio-r8a779a0", 110 "renesas,rcar-gen4-gpio"; 111 reg = <0 0xe6058180 0 0x54>; 112 interrupts = <GIC_SPI 832 IRQ_TYPE_LEVEL_HIGH>; 113 clocks = <&cpg CPG_MOD 916>; 114 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 115 resets = <&cpg 916>; 116 gpio-controller; 117 #gpio-cells = <2>; 118 gpio-ranges = <&pfc 0 0 28>; 119 interrupt-controller; 120 #interrupt-cells = <2>; 121 }; 122 123 gpio1: gpio@e6050180 { 124 compatible = "renesas,gpio-r8a779a0", 125 "renesas,rcar-gen4-gpio"; 126 reg = <0 0xe6050180 0 0x54>; 127 interrupts = <GIC_SPI 836 IRQ_TYPE_LEVEL_HIGH>; 128 clocks = <&cpg CPG_MOD 915>; 129 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 130 resets = <&cpg 915>; 131 gpio-controller; 132 #gpio-cells = <2>; 133 gpio-ranges = <&pfc 0 32 31>; 134 interrupt-controller; 135 #interrupt-cells = <2>; 136 }; 137 138 gpio2: gpio@e6050980 { 139 compatible = "renesas,gpio-r8a779a0", 140 "renesas,rcar-gen4-gpio"; 141 reg = <0 0xe6050980 0 0x54>; 142 interrupts = <GIC_SPI 840 IRQ_TYPE_LEVEL_HIGH>; 143 clocks = <&cpg CPG_MOD 915>; 144 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 145 resets = <&cpg 915>; 146 gpio-controller; 147 #gpio-cells = <2>; 148 gpio-ranges = <&pfc 0 64 25>; 149 interrupt-controller; 150 #interrupt-cells = <2>; 151 }; 152 153 gpio3: gpio@e6058980 { 154 compatible = "renesas,gpio-r8a779a0", 155 "renesas,rcar-gen4-gpio"; 156 reg = <0 0xe6058980 0 0x54>; 157 interrupts = <GIC_SPI 844 IRQ_TYPE_LEVEL_HIGH>; 158 clocks = <&cpg CPG_MOD 916>; 159 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 160 resets = <&cpg 916>; 161 gpio-controller; 162 #gpio-cells = <2>; 163 gpio-ranges = <&pfc 0 96 17>; 164 interrupt-controller; 165 #interrupt-cells = <2>; 166 }; 167 168 gpio4: gpio@e6060180 { 169 compatible = "renesas,gpio-r8a779a0", 170 "renesas,rcar-gen4-gpio"; 171 reg = <0 0xe6060180 0 0x54>; 172 interrupts = <GIC_SPI 848 IRQ_TYPE_LEVEL_HIGH>; 173 clocks = <&cpg CPG_MOD 917>; 174 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 175 resets = <&cpg 917>; 176 gpio-controller; 177 #gpio-cells = <2>; 178 gpio-ranges = <&pfc 0 128 27>; 179 interrupt-controller; 180 #interrupt-cells = <2>; 181 }; 182 183 gpio5: gpio@e6060980 { 184 compatible = "renesas,gpio-r8a779a0", 185 "renesas,rcar-gen4-gpio"; 186 reg = <0 0xe6060980 0 0x54>; 187 interrupts = <GIC_SPI 852 IRQ_TYPE_LEVEL_HIGH>; 188 clocks = <&cpg CPG_MOD 917>; 189 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 190 resets = <&cpg 917>; 191 gpio-controller; 192 #gpio-cells = <2>; 193 gpio-ranges = <&pfc 0 160 21>; 194 interrupt-controller; 195 #interrupt-cells = <2>; 196 }; 197 198 gpio6: gpio@e6068180 { 199 compatible = "renesas,gpio-r8a779a0", 200 "renesas,rcar-gen4-gpio"; 201 reg = <0 0xe6068180 0 0x54>; 202 interrupts = <GIC_SPI 856 IRQ_TYPE_LEVEL_HIGH>; 203 clocks = <&cpg CPG_MOD 918>; 204 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 205 resets = <&cpg 918>; 206 gpio-controller; 207 #gpio-cells = <2>; 208 gpio-ranges = <&pfc 0 192 21>; 209 interrupt-controller; 210 #interrupt-cells = <2>; 211 }; 212 213 gpio7: gpio@e6068980 { 214 compatible = "renesas,gpio-r8a779a0", 215 "renesas,rcar-gen4-gpio"; 216 reg = <0 0xe6068980 0 0x54>; 217 interrupts = <GIC_SPI 860 IRQ_TYPE_LEVEL_HIGH>; 218 clocks = <&cpg CPG_MOD 918>; 219 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 220 resets = <&cpg 918>; 221 gpio-controller; 222 #gpio-cells = <2>; 223 gpio-ranges = <&pfc 0 224 21>; 224 interrupt-controller; 225 #interrupt-cells = <2>; 226 }; 227 228 gpio8: gpio@e6069180 { 229 compatible = "renesas,gpio-r8a779a0", 230 "renesas,rcar-gen4-gpio"; 231 reg = <0 0xe6069180 0 0x54>; 232 interrupts = <GIC_SPI 864 IRQ_TYPE_LEVEL_HIGH>; 233 clocks = <&cpg CPG_MOD 918>; 234 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 235 resets = <&cpg 918>; 236 gpio-controller; 237 #gpio-cells = <2>; 238 gpio-ranges = <&pfc 0 256 21>; 239 interrupt-controller; 240 #interrupt-cells = <2>; 241 }; 242 243 gpio9: gpio@e6069980 { 244 compatible = "renesas,gpio-r8a779a0", 245 "renesas,rcar-gen4-gpio"; 246 reg = <0 0xe6069980 0 0x54>; 247 interrupts = <GIC_SPI 868 IRQ_TYPE_LEVEL_HIGH>; 248 clocks = <&cpg CPG_MOD 918>; 249 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 250 resets = <&cpg 918>; 251 gpio-controller; 252 #gpio-cells = <2>; 253 gpio-ranges = <&pfc 0 288 21>; 254 interrupt-controller; 255 #interrupt-cells = <2>; 256 }; 257 258 cmt0: timer@e60f0000 { 259 compatible = "renesas,r8a779a0-cmt0", 260 "renesas,rcar-gen3-cmt0"; 261 reg = <0 0xe60f0000 0 0x1004>; 262 interrupts = <GIC_SPI 500 IRQ_TYPE_LEVEL_HIGH>, 263 <GIC_SPI 501 IRQ_TYPE_LEVEL_HIGH>; 264 clocks = <&cpg CPG_MOD 910>; 265 clock-names = "fck"; 266 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 267 resets = <&cpg 910>; 268 status = "disabled"; 269 }; 270 271 cmt1: timer@e6130000 { 272 compatible = "renesas,r8a779a0-cmt1", 273 "renesas,rcar-gen3-cmt1"; 274 reg = <0 0xe6130000 0 0x1004>; 275 interrupts = <GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH>, 276 <GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>, 277 <GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH>, 278 <GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH>, 279 <GIC_SPI 452 IRQ_TYPE_LEVEL_HIGH>, 280 <GIC_SPI 453 IRQ_TYPE_LEVEL_HIGH>, 281 <GIC_SPI 454 IRQ_TYPE_LEVEL_HIGH>, 282 <GIC_SPI 455 IRQ_TYPE_LEVEL_HIGH>; 283 clocks = <&cpg CPG_MOD 911>; 284 clock-names = "fck"; 285 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 286 resets = <&cpg 911>; 287 status = "disabled"; 288 }; 289 290 cmt2: timer@e6140000 { 291 compatible = "renesas,r8a779a0-cmt1", 292 "renesas,rcar-gen3-cmt1"; 293 reg = <0 0xe6140000 0 0x1004>; 294 interrupts = <GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>, 295 <GIC_SPI 457 IRQ_TYPE_LEVEL_HIGH>, 296 <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH>, 297 <GIC_SPI 459 IRQ_TYPE_LEVEL_HIGH>, 298 <GIC_SPI 460 IRQ_TYPE_LEVEL_HIGH>, 299 <GIC_SPI 461 IRQ_TYPE_LEVEL_HIGH>, 300 <GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH>, 301 <GIC_SPI 463 IRQ_TYPE_LEVEL_HIGH>; 302 clocks = <&cpg CPG_MOD 912>; 303 clock-names = "fck"; 304 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 305 resets = <&cpg 912>; 306 status = "disabled"; 307 }; 308 309 cmt3: timer@e6148000 { 310 compatible = "renesas,r8a779a0-cmt1", 311 "renesas,rcar-gen3-cmt1"; 312 reg = <0 0xe6148000 0 0x1004>; 313 interrupts = <GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH>, 314 <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>, 315 <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>, 316 <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>, 317 <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>, 318 <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>, 319 <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, 320 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>; 321 clocks = <&cpg CPG_MOD 913>; 322 clock-names = "fck"; 323 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 324 resets = <&cpg 913>; 325 status = "disabled"; 326 }; 327 328 cpg: clock-controller@e6150000 { 329 compatible = "renesas,r8a779a0-cpg-mssr"; 330 reg = <0 0xe6150000 0 0x4000>; 331 clocks = <&extal_clk>, <&extalr_clk>; 332 clock-names = "extal", "extalr"; 333 #clock-cells = <2>; 334 #power-domain-cells = <0>; 335 #reset-cells = <1>; 336 }; 337 338 rst: reset-controller@e6160000 { 339 compatible = "renesas,r8a779a0-rst"; 340 reg = <0 0xe6160000 0 0x4000>; 341 }; 342 343 sysc: system-controller@e6180000 { 344 compatible = "renesas,r8a779a0-sysc"; 345 reg = <0 0xe6180000 0 0x4000>; 346 #power-domain-cells = <1>; 347 }; 348 349 tsc: thermal@e6190000 { 350 compatible = "renesas,r8a779a0-thermal"; 351 reg = <0 0xe6190000 0 0x200>, 352 <0 0xe6198000 0 0x200>, 353 <0 0xe61a0000 0 0x200>, 354 <0 0xe61a8000 0 0x200>, 355 <0 0xe61b0000 0 0x200>; 356 clocks = <&cpg CPG_MOD 919>; 357 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 358 resets = <&cpg 919>; 359 #thermal-sensor-cells = <1>; 360 }; 361 362 intc_ex: interrupt-controller@e61c0000 { 363 compatible = "renesas,intc-ex-r8a779a0", "renesas,irqc"; 364 #interrupt-cells = <2>; 365 interrupt-controller; 366 reg = <0 0xe61c0000 0 0x200>; 367 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 368 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 369 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 370 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 371 <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, 372 <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 373 clocks = <&cpg CPG_CORE R8A779A0_CLK_CP>; 374 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 375 }; 376 377 tmu0: timer@e61e0000 { 378 compatible = "renesas,tmu-r8a779a0", "renesas,tmu"; 379 reg = <0 0xe61e0000 0 0x30>; 380 interrupts = <GIC_SPI 512 IRQ_TYPE_LEVEL_HIGH>, 381 <GIC_SPI 513 IRQ_TYPE_LEVEL_HIGH>, 382 <GIC_SPI 514 IRQ_TYPE_LEVEL_HIGH>; 383 clocks = <&cpg CPG_MOD 713>; 384 clock-names = "fck"; 385 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 386 resets = <&cpg 713>; 387 status = "disabled"; 388 }; 389 390 tmu1: timer@e6fc0000 { 391 compatible = "renesas,tmu-r8a779a0", "renesas,tmu"; 392 reg = <0 0xe6fc0000 0 0x30>; 393 interrupts = <GIC_SPI 504 IRQ_TYPE_LEVEL_HIGH>, 394 <GIC_SPI 505 IRQ_TYPE_LEVEL_HIGH>, 395 <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>; 396 clocks = <&cpg CPG_MOD 714>; 397 clock-names = "fck"; 398 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 399 resets = <&cpg 714>; 400 status = "disabled"; 401 }; 402 403 tmu2: timer@e6fd0000 { 404 compatible = "renesas,tmu-r8a779a0", "renesas,tmu"; 405 reg = <0 0xe6fd0000 0 0x30>; 406 interrupts = <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>, 407 <GIC_SPI 509 IRQ_TYPE_LEVEL_HIGH>, 408 <GIC_SPI 510 IRQ_TYPE_LEVEL_HIGH>; 409 clocks = <&cpg CPG_MOD 715>; 410 clock-names = "fck"; 411 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 412 resets = <&cpg 715>; 413 status = "disabled"; 414 }; 415 416 tmu3: timer@e6fe0000 { 417 compatible = "renesas,tmu-r8a779a0", "renesas,tmu"; 418 reg = <0 0xe6fe0000 0 0x30>; 419 interrupts = <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, 420 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, 421 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>; 422 clocks = <&cpg CPG_MOD 716>; 423 clock-names = "fck"; 424 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 425 resets = <&cpg 716>; 426 status = "disabled"; 427 }; 428 429 tmu4: timer@ffc00000 { 430 compatible = "renesas,tmu-r8a779a0", "renesas,tmu"; 431 reg = <0 0xffc00000 0 0x30>; 432 interrupts = <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, 433 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>, 434 <GIC_SPI 478 IRQ_TYPE_LEVEL_HIGH>; 435 clocks = <&cpg CPG_MOD 717>; 436 clock-names = "fck"; 437 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 438 resets = <&cpg 717>; 439 status = "disabled"; 440 }; 441 442 i2c0: i2c@e6500000 { 443 compatible = "renesas,i2c-r8a779a0", 444 "renesas,rcar-gen4-i2c"; 445 reg = <0 0xe6500000 0 0x40>; 446 interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>; 447 clocks = <&cpg CPG_MOD 518>; 448 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 449 resets = <&cpg 518>; 450 dmas = <&dmac1 0x91>, <&dmac1 0x90>; 451 dma-names = "tx", "rx"; 452 i2c-scl-internal-delay-ns = <110>; 453 #address-cells = <1>; 454 #size-cells = <0>; 455 status = "disabled"; 456 }; 457 458 i2c1: i2c@e6508000 { 459 compatible = "renesas,i2c-r8a779a0", 460 "renesas,rcar-gen4-i2c"; 461 reg = <0 0xe6508000 0 0x40>; 462 interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>; 463 clocks = <&cpg CPG_MOD 519>; 464 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 465 resets = <&cpg 519>; 466 dmas = <&dmac1 0x93>, <&dmac1 0x92>; 467 dma-names = "tx", "rx"; 468 i2c-scl-internal-delay-ns = <110>; 469 #address-cells = <1>; 470 #size-cells = <0>; 471 status = "disabled"; 472 }; 473 474 i2c2: i2c@e6510000 { 475 compatible = "renesas,i2c-r8a779a0", 476 "renesas,rcar-gen4-i2c"; 477 reg = <0 0xe6510000 0 0x40>; 478 interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>; 479 clocks = <&cpg CPG_MOD 520>; 480 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 481 resets = <&cpg 520>; 482 dmas = <&dmac1 0x95>, <&dmac1 0x94>; 483 dma-names = "tx", "rx"; 484 i2c-scl-internal-delay-ns = <110>; 485 #address-cells = <1>; 486 #size-cells = <0>; 487 status = "disabled"; 488 }; 489 490 i2c3: i2c@e66d0000 { 491 compatible = "renesas,i2c-r8a779a0", 492 "renesas,rcar-gen4-i2c"; 493 reg = <0 0xe66d0000 0 0x40>; 494 interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>; 495 clocks = <&cpg CPG_MOD 521>; 496 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 497 resets = <&cpg 521>; 498 dmas = <&dmac1 0x97>, <&dmac1 0x96>; 499 dma-names = "tx", "rx"; 500 i2c-scl-internal-delay-ns = <110>; 501 #address-cells = <1>; 502 #size-cells = <0>; 503 status = "disabled"; 504 }; 505 506 i2c4: i2c@e66d8000 { 507 compatible = "renesas,i2c-r8a779a0", 508 "renesas,rcar-gen4-i2c"; 509 reg = <0 0xe66d8000 0 0x40>; 510 interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>; 511 clocks = <&cpg CPG_MOD 522>; 512 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 513 resets = <&cpg 522>; 514 dmas = <&dmac1 0x99>, <&dmac1 0x98>; 515 dma-names = "tx", "rx"; 516 i2c-scl-internal-delay-ns = <110>; 517 #address-cells = <1>; 518 #size-cells = <0>; 519 status = "disabled"; 520 }; 521 522 i2c5: i2c@e66e0000 { 523 compatible = "renesas,i2c-r8a779a0", 524 "renesas,rcar-gen4-i2c"; 525 reg = <0 0xe66e0000 0 0x40>; 526 interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; 527 clocks = <&cpg CPG_MOD 523>; 528 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 529 resets = <&cpg 523>; 530 dmas = <&dmac1 0x9b>, <&dmac1 0x9a>; 531 dma-names = "tx", "rx"; 532 i2c-scl-internal-delay-ns = <110>; 533 #address-cells = <1>; 534 #size-cells = <0>; 535 status = "disabled"; 536 }; 537 538 i2c6: i2c@e66e8000 { 539 compatible = "renesas,i2c-r8a779a0", 540 "renesas,rcar-gen4-i2c"; 541 reg = <0 0xe66e8000 0 0x40>; 542 interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>; 543 clocks = <&cpg CPG_MOD 524>; 544 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 545 resets = <&cpg 524>; 546 dmas = <&dmac1 0x9d>, <&dmac1 0x9c>; 547 dma-names = "tx", "rx"; 548 i2c-scl-internal-delay-ns = <110>; 549 #address-cells = <1>; 550 #size-cells = <0>; 551 status = "disabled"; 552 }; 553 554 hscif0: serial@e6540000 { 555 compatible = "renesas,hscif-r8a779a0", 556 "renesas,rcar-gen4-hscif", "renesas,hscif"; 557 reg = <0 0xe6540000 0 0x60>; 558 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; 559 clocks = <&cpg CPG_MOD 514>, 560 <&cpg CPG_CORE R8A779A0_CLK_S1D2>, 561 <&scif_clk>; 562 clock-names = "fck", "brg_int", "scif_clk"; 563 dmas = <&dmac1 0x31>, <&dmac1 0x30>; 564 dma-names = "tx", "rx"; 565 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 566 resets = <&cpg 514>; 567 status = "disabled"; 568 }; 569 570 hscif1: serial@e6550000 { 571 compatible = "renesas,hscif-r8a779a0", 572 "renesas,rcar-gen4-hscif", "renesas,hscif"; 573 reg = <0 0xe6550000 0 0x60>; 574 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; 575 clocks = <&cpg CPG_MOD 515>, 576 <&cpg CPG_CORE R8A779A0_CLK_S1D2>, 577 <&scif_clk>; 578 clock-names = "fck", "brg_int", "scif_clk"; 579 dmas = <&dmac1 0x33>, <&dmac1 0x32>; 580 dma-names = "tx", "rx"; 581 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 582 resets = <&cpg 515>; 583 status = "disabled"; 584 }; 585 586 hscif2: serial@e6560000 { 587 compatible = "renesas,hscif-r8a779a0", 588 "renesas,rcar-gen4-hscif", "renesas,hscif"; 589 reg = <0 0xe6560000 0 0x60>; 590 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 591 clocks = <&cpg CPG_MOD 516>, 592 <&cpg CPG_CORE R8A779A0_CLK_S1D2>, 593 <&scif_clk>; 594 clock-names = "fck", "brg_int", "scif_clk"; 595 dmas = <&dmac1 0x35>, <&dmac1 0x34>; 596 dma-names = "tx", "rx"; 597 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 598 resets = <&cpg 516>; 599 status = "disabled"; 600 }; 601 602 hscif3: serial@e66a0000 { 603 compatible = "renesas,hscif-r8a779a0", 604 "renesas,rcar-gen4-hscif", "renesas,hscif"; 605 reg = <0 0xe66a0000 0 0x60>; 606 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; 607 clocks = <&cpg CPG_MOD 517>, 608 <&cpg CPG_CORE R8A779A0_CLK_S1D2>, 609 <&scif_clk>; 610 clock-names = "fck", "brg_int", "scif_clk"; 611 dmas = <&dmac1 0x37>, <&dmac1 0x36>; 612 dma-names = "tx", "rx"; 613 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 614 resets = <&cpg 517>; 615 status = "disabled"; 616 }; 617 618 canfd: can@e6660000 { 619 compatible = "renesas,r8a779a0-canfd"; 620 reg = <0 0xe6660000 0 0x8000>; 621 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>, 622 <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; 623 interrupt-names = "ch_int", "g_int"; 624 clocks = <&cpg CPG_MOD 328>, 625 <&cpg CPG_CORE R8A779A0_CLK_CANFD>, 626 <&can_clk>; 627 clock-names = "fck", "canfd", "can_clk"; 628 assigned-clocks = <&cpg CPG_CORE R8A779A0_CLK_CANFD>; 629 assigned-clock-rates = <80000000>; 630 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 631 resets = <&cpg 328>; 632 status = "disabled"; 633 634 channel0 { 635 status = "disabled"; 636 }; 637 638 channel1 { 639 status = "disabled"; 640 }; 641 642 channel2 { 643 status = "disabled"; 644 }; 645 646 channel3 { 647 status = "disabled"; 648 }; 649 650 channel4 { 651 status = "disabled"; 652 }; 653 654 channel5 { 655 status = "disabled"; 656 }; 657 658 channel6 { 659 status = "disabled"; 660 }; 661 662 channel7 { 663 status = "disabled"; 664 }; 665 }; 666 667 avb0: ethernet@e6800000 { 668 compatible = "renesas,etheravb-r8a779a0", 669 "renesas,etheravb-rcar-gen3"; 670 reg = <0 0xe6800000 0 0x800>; 671 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 672 <GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH>, 673 <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>, 674 <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>, 675 <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, 676 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>, 677 <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>, 678 <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>, 679 <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>, 680 <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>, 681 <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>, 682 <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>, 683 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 684 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>, 685 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>, 686 <GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>, 687 <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>, 688 <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>, 689 <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>, 690 <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>, 691 <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>, 692 <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>, 693 <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>, 694 <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>, 695 <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>; 696 interrupt-names = "ch0", "ch1", "ch2", "ch3", 697 "ch4", "ch5", "ch6", "ch7", 698 "ch8", "ch9", "ch10", "ch11", 699 "ch12", "ch13", "ch14", "ch15", 700 "ch16", "ch17", "ch18", "ch19", 701 "ch20", "ch21", "ch22", "ch23", 702 "ch24"; 703 clocks = <&cpg CPG_MOD 211>; 704 clock-names = "fck"; 705 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 706 resets = <&cpg 211>; 707 phy-mode = "rgmii"; 708 rx-internal-delay-ps = <0>; 709 tx-internal-delay-ps = <0>; 710 #address-cells = <1>; 711 #size-cells = <0>; 712 status = "disabled"; 713 }; 714 715 avb1: ethernet@e6810000 { 716 compatible = "renesas,etheravb-r8a779a0", 717 "renesas,etheravb-rcar-gen3"; 718 reg = <0 0xe6810000 0 0x800>; 719 interrupts = <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>, 720 <GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>, 721 <GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>, 722 <GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>, 723 <GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>, 724 <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>, 725 <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>, 726 <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>, 727 <GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH>, 728 <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>, 729 <GIC_SPI 291 IRQ_TYPE_LEVEL_HIGH>, 730 <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>, 731 <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>, 732 <GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH>, 733 <GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH>, 734 <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>, 735 <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>, 736 <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>, 737 <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>, 738 <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>, 739 <GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH>, 740 <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>, 741 <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, 742 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 743 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>; 744 interrupt-names = "ch0", "ch1", "ch2", "ch3", 745 "ch4", "ch5", "ch6", "ch7", 746 "ch8", "ch9", "ch10", "ch11", 747 "ch12", "ch13", "ch14", "ch15", 748 "ch16", "ch17", "ch18", "ch19", 749 "ch20", "ch21", "ch22", "ch23", 750 "ch24"; 751 clocks = <&cpg CPG_MOD 212>; 752 clock-names = "fck"; 753 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 754 resets = <&cpg 212>; 755 phy-mode = "rgmii"; 756 rx-internal-delay-ps = <0>; 757 tx-internal-delay-ps = <0>; 758 #address-cells = <1>; 759 #size-cells = <0>; 760 status = "disabled"; 761 }; 762 763 avb2: ethernet@e6820000 { 764 compatible = "renesas,etheravb-r8a779a0", 765 "renesas,etheravb-rcar-gen3"; 766 reg = <0 0xe6820000 0 0x1000>; 767 interrupts = <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>, 768 <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>, 769 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, 770 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, 771 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, 772 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, 773 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, 774 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, 775 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, 776 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 777 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 778 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 779 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, 780 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>, 781 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 782 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 783 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 784 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 785 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 786 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 787 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 788 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 789 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 790 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 791 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>; 792 interrupt-names = "ch0", "ch1", "ch2", "ch3", 793 "ch4", "ch5", "ch6", "ch7", 794 "ch8", "ch9", "ch10", "ch11", 795 "ch12", "ch13", "ch14", "ch15", 796 "ch16", "ch17", "ch18", "ch19", 797 "ch20", "ch21", "ch22", "ch23", 798 "ch24"; 799 clocks = <&cpg CPG_MOD 213>; 800 clock-names = "fck"; 801 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 802 resets = <&cpg 213>; 803 phy-mode = "rgmii"; 804 rx-internal-delay-ps = <0>; 805 tx-internal-delay-ps = <0>; 806 #address-cells = <1>; 807 #size-cells = <0>; 808 status = "disabled"; 809 }; 810 811 avb3: ethernet@e6830000 { 812 compatible = "renesas,etheravb-r8a779a0", 813 "renesas,etheravb-rcar-gen3"; 814 reg = <0 0xe6830000 0 0x1000>; 815 interrupts = <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 816 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, 817 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 818 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 819 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, 820 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 821 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 822 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 823 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 824 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 825 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 826 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 827 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 828 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 829 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 830 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 831 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, 832 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, 833 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, 834 <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, 835 <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, 836 <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>, 837 <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>, 838 <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>, 839 <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 840 interrupt-names = "ch0", "ch1", "ch2", "ch3", 841 "ch4", "ch5", "ch6", "ch7", 842 "ch8", "ch9", "ch10", "ch11", 843 "ch12", "ch13", "ch14", "ch15", 844 "ch16", "ch17", "ch18", "ch19", 845 "ch20", "ch21", "ch22", "ch23", 846 "ch24"; 847 clocks = <&cpg CPG_MOD 214>; 848 clock-names = "fck"; 849 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 850 resets = <&cpg 214>; 851 phy-mode = "rgmii"; 852 rx-internal-delay-ps = <0>; 853 tx-internal-delay-ps = <0>; 854 #address-cells = <1>; 855 #size-cells = <0>; 856 status = "disabled"; 857 }; 858 859 avb4: ethernet@e6840000 { 860 compatible = "renesas,etheravb-r8a779a0", 861 "renesas,etheravb-rcar-gen3"; 862 reg = <0 0xe6840000 0 0x1000>; 863 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>, 864 <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>, 865 <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>, 866 <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>, 867 <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>, 868 <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>, 869 <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>, 870 <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>, 871 <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>, 872 <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>, 873 <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>, 874 <GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>, 875 <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>, 876 <GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH>, 877 <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>, 878 <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>, 879 <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>, 880 <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>, 881 <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>, 882 <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>, 883 <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>, 884 <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>, 885 <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>, 886 <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>, 887 <GIC_SPI 380 IRQ_TYPE_LEVEL_HIGH>; 888 interrupt-names = "ch0", "ch1", "ch2", "ch3", 889 "ch4", "ch5", "ch6", "ch7", 890 "ch8", "ch9", "ch10", "ch11", 891 "ch12", "ch13", "ch14", "ch15", 892 "ch16", "ch17", "ch18", "ch19", 893 "ch20", "ch21", "ch22", "ch23", 894 "ch24"; 895 clocks = <&cpg CPG_MOD 215>; 896 clock-names = "fck"; 897 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 898 resets = <&cpg 215>; 899 phy-mode = "rgmii"; 900 rx-internal-delay-ps = <0>; 901 tx-internal-delay-ps = <0>; 902 #address-cells = <1>; 903 #size-cells = <0>; 904 status = "disabled"; 905 }; 906 907 avb5: ethernet@e6850000 { 908 compatible = "renesas,etheravb-r8a779a0", 909 "renesas,etheravb-rcar-gen3"; 910 reg = <0 0xe6850000 0 0x1000>; 911 interrupts = <GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH>, 912 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, 913 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>, 914 <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>, 915 <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>, 916 <GIC_SPI 386 IRQ_TYPE_LEVEL_HIGH>, 917 <GIC_SPI 387 IRQ_TYPE_LEVEL_HIGH>, 918 <GIC_SPI 388 IRQ_TYPE_LEVEL_HIGH>, 919 <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>, 920 <GIC_SPI 390 IRQ_TYPE_LEVEL_HIGH>, 921 <GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH>, 922 <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH>, 923 <GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH>, 924 <GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH>, 925 <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>, 926 <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>, 927 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>, 928 <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 929 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 930 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 931 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 932 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 933 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 934 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 935 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; 936 interrupt-names = "ch0", "ch1", "ch2", "ch3", 937 "ch4", "ch5", "ch6", "ch7", 938 "ch8", "ch9", "ch10", "ch11", 939 "ch12", "ch13", "ch14", "ch15", 940 "ch16", "ch17", "ch18", "ch19", 941 "ch20", "ch21", "ch22", "ch23", 942 "ch24"; 943 clocks = <&cpg CPG_MOD 216>; 944 clock-names = "fck"; 945 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 946 resets = <&cpg 216>; 947 phy-mode = "rgmii"; 948 rx-internal-delay-ps = <0>; 949 tx-internal-delay-ps = <0>; 950 #address-cells = <1>; 951 #size-cells = <0>; 952 status = "disabled"; 953 }; 954 955 scif0: serial@e6e60000 { 956 compatible = "renesas,scif-r8a779a0", 957 "renesas,rcar-gen4-scif", "renesas,scif"; 958 reg = <0 0xe6e60000 0 64>; 959 interrupts = <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>; 960 clocks = <&cpg CPG_MOD 702>, 961 <&cpg CPG_CORE R8A779A0_CLK_S1D2>, 962 <&scif_clk>; 963 clock-names = "fck", "brg_int", "scif_clk"; 964 dmas = <&dmac1 0x51>, <&dmac1 0x50>; 965 dma-names = "tx", "rx"; 966 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 967 resets = <&cpg 702>; 968 status = "disabled"; 969 }; 970 971 scif1: serial@e6e68000 { 972 compatible = "renesas,scif-r8a779a0", 973 "renesas,rcar-gen4-scif", "renesas,scif"; 974 reg = <0 0xe6e68000 0 64>; 975 interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>; 976 clocks = <&cpg CPG_MOD 703>, 977 <&cpg CPG_CORE R8A779A0_CLK_S1D2>, 978 <&scif_clk>; 979 clock-names = "fck", "brg_int", "scif_clk"; 980 dmas = <&dmac1 0x53>, <&dmac1 0x52>; 981 dma-names = "tx", "rx"; 982 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 983 resets = <&cpg 703>; 984 status = "disabled"; 985 }; 986 987 scif3: serial@e6c50000 { 988 compatible = "renesas,scif-r8a779a0", 989 "renesas,rcar-gen4-scif", "renesas,scif"; 990 reg = <0 0xe6c50000 0 64>; 991 interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>; 992 clocks = <&cpg CPG_MOD 704>, 993 <&cpg CPG_CORE R8A779A0_CLK_S1D2>, 994 <&scif_clk>; 995 clock-names = "fck", "brg_int", "scif_clk"; 996 dmas = <&dmac1 0x57>, <&dmac1 0x56>; 997 dma-names = "tx", "rx"; 998 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 999 resets = <&cpg 704>; 1000 status = "disabled"; 1001 }; 1002 1003 scif4: serial@e6c40000 { 1004 compatible = "renesas,scif-r8a779a0", 1005 "renesas,rcar-gen4-scif", "renesas,scif"; 1006 reg = <0 0xe6c40000 0 64>; 1007 interrupts = <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>; 1008 clocks = <&cpg CPG_MOD 705>, 1009 <&cpg CPG_CORE R8A779A0_CLK_S1D2>, 1010 <&scif_clk>; 1011 clock-names = "fck", "brg_int", "scif_clk"; 1012 dmas = <&dmac1 0x59>, <&dmac1 0x58>; 1013 dma-names = "tx", "rx"; 1014 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1015 resets = <&cpg 705>; 1016 status = "disabled"; 1017 }; 1018 1019 tpu: pwm@e6e80000 { 1020 compatible = "renesas,tpu-r8a779a0", "renesas,tpu"; 1021 reg = <0 0xe6e80000 0 0x148>; 1022 interrupts = <GIC_SPI 515 IRQ_TYPE_LEVEL_HIGH>; 1023 clocks = <&cpg CPG_MOD 718>; 1024 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1025 resets = <&cpg 718>; 1026 #pwm-cells = <3>; 1027 status = "disabled"; 1028 }; 1029 1030 msiof0: spi@e6e90000 { 1031 compatible = "renesas,msiof-r8a779a0", 1032 "renesas,rcar-gen3-msiof"; 1033 reg = <0 0xe6e90000 0 0x0064>; 1034 interrupts = <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>; 1035 clocks = <&cpg CPG_MOD 618>; 1036 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1037 resets = <&cpg 618>; 1038 dmas = <&dmac1 0x41>, <&dmac1 0x40>; 1039 dma-names = "tx", "rx"; 1040 #address-cells = <1>; 1041 #size-cells = <0>; 1042 status = "disabled"; 1043 }; 1044 1045 msiof1: spi@e6ea0000 { 1046 compatible = "renesas,msiof-r8a779a0", 1047 "renesas,rcar-gen3-msiof"; 1048 reg = <0 0xe6ea0000 0 0x0064>; 1049 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 1050 clocks = <&cpg CPG_MOD 619>; 1051 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1052 resets = <&cpg 619>; 1053 dmas = <&dmac1 0x43>, <&dmac1 0x42>; 1054 dma-names = "tx", "rx"; 1055 #address-cells = <1>; 1056 #size-cells = <0>; 1057 status = "disabled"; 1058 }; 1059 1060 msiof2: spi@e6c00000 { 1061 compatible = "renesas,msiof-r8a779a0", 1062 "renesas,rcar-gen3-msiof"; 1063 reg = <0 0xe6c00000 0 0x0064>; 1064 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; 1065 clocks = <&cpg CPG_MOD 620>; 1066 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1067 resets = <&cpg 620>; 1068 dmas = <&dmac1 0x45>, <&dmac1 0x44>; 1069 dma-names = "tx", "rx"; 1070 #address-cells = <1>; 1071 #size-cells = <0>; 1072 status = "disabled"; 1073 }; 1074 1075 msiof3: spi@e6c10000 { 1076 compatible = "renesas,msiof-r8a779a0", 1077 "renesas,rcar-gen3-msiof"; 1078 reg = <0 0xe6c10000 0 0x0064>; 1079 interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>; 1080 clocks = <&cpg CPG_MOD 621>; 1081 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1082 resets = <&cpg 621>; 1083 dmas = <&dmac1 0x47>, <&dmac1 0x46>; 1084 dma-names = "tx", "rx"; 1085 #address-cells = <1>; 1086 #size-cells = <0>; 1087 status = "disabled"; 1088 }; 1089 1090 msiof4: spi@e6c20000 { 1091 compatible = "renesas,msiof-r8a779a0", 1092 "renesas,rcar-gen3-msiof"; 1093 reg = <0 0xe6c20000 0 0x0064>; 1094 interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>; 1095 clocks = <&cpg CPG_MOD 622>; 1096 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1097 resets = <&cpg 622>; 1098 dmas = <&dmac1 0x49>, <&dmac1 0x48>; 1099 dma-names = "tx", "rx"; 1100 #address-cells = <1>; 1101 #size-cells = <0>; 1102 status = "disabled"; 1103 }; 1104 1105 msiof5: spi@e6c28000 { 1106 compatible = "renesas,msiof-r8a779a0", 1107 "renesas,rcar-gen3-msiof"; 1108 reg = <0 0xe6c28000 0 0x0064>; 1109 interrupts = <GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>; 1110 clocks = <&cpg CPG_MOD 623>; 1111 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1112 resets = <&cpg 623>; 1113 dmas = <&dmac1 0x4b>, <&dmac1 0x4a>; 1114 dma-names = "tx", "rx"; 1115 #address-cells = <1>; 1116 #size-cells = <0>; 1117 status = "disabled"; 1118 }; 1119 1120 vin00: video@e6ef0000 { 1121 compatible = "renesas,vin-r8a779a0"; 1122 reg = <0 0xe6ef0000 0 0x1000>; 1123 interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>; 1124 clocks = <&cpg CPG_MOD 730>; 1125 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1126 resets = <&cpg 730>; 1127 renesas,id = <0>; 1128 status = "disabled"; 1129 1130 ports { 1131 #address-cells = <1>; 1132 #size-cells = <0>; 1133 1134 port@2 { 1135 #address-cells = <1>; 1136 #size-cells = <0>; 1137 1138 reg = <2>; 1139 1140 vin00isp0: endpoint@0 { 1141 reg = <0>; 1142 remote-endpoint = <&isp0vin00>; 1143 }; 1144 }; 1145 }; 1146 }; 1147 1148 vin01: video@e6ef1000 { 1149 compatible = "renesas,vin-r8a779a0"; 1150 reg = <0 0xe6ef1000 0 0x1000>; 1151 interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 1152 clocks = <&cpg CPG_MOD 731>; 1153 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1154 resets = <&cpg 731>; 1155 renesas,id = <1>; 1156 status = "disabled"; 1157 1158 ports { 1159 #address-cells = <1>; 1160 #size-cells = <0>; 1161 1162 port@2 { 1163 #address-cells = <1>; 1164 #size-cells = <0>; 1165 1166 reg = <2>; 1167 1168 vin01isp0: endpoint@0 { 1169 reg = <0>; 1170 remote-endpoint = <&isp0vin01>; 1171 }; 1172 }; 1173 }; 1174 }; 1175 1176 vin02: video@e6ef2000 { 1177 compatible = "renesas,vin-r8a779a0"; 1178 reg = <0 0xe6ef2000 0 0x1000>; 1179 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; 1180 clocks = <&cpg CPG_MOD 800>; 1181 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1182 resets = <&cpg 800>; 1183 renesas,id = <2>; 1184 status = "disabled"; 1185 1186 ports { 1187 #address-cells = <1>; 1188 #size-cells = <0>; 1189 1190 port@2 { 1191 #address-cells = <1>; 1192 #size-cells = <0>; 1193 1194 reg = <2>; 1195 1196 vin02isp0: endpoint@0 { 1197 reg = <0>; 1198 remote-endpoint = <&isp0vin02>; 1199 }; 1200 }; 1201 }; 1202 }; 1203 1204 vin03: video@e6ef3000 { 1205 compatible = "renesas,vin-r8a779a0"; 1206 reg = <0 0xe6ef3000 0 0x1000>; 1207 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; 1208 clocks = <&cpg CPG_MOD 801>; 1209 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1210 resets = <&cpg 801>; 1211 renesas,id = <3>; 1212 status = "disabled"; 1213 1214 ports { 1215 #address-cells = <1>; 1216 #size-cells = <0>; 1217 1218 port@2 { 1219 #address-cells = <1>; 1220 #size-cells = <0>; 1221 1222 reg = <2>; 1223 1224 vin03isp0: endpoint@0 { 1225 reg = <0>; 1226 remote-endpoint = <&isp0vin03>; 1227 }; 1228 }; 1229 }; 1230 }; 1231 1232 vin04: video@e6ef4000 { 1233 compatible = "renesas,vin-r8a779a0"; 1234 reg = <0 0xe6ef4000 0 0x1000>; 1235 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 1236 clocks = <&cpg CPG_MOD 802>; 1237 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1238 resets = <&cpg 802>; 1239 renesas,id = <4>; 1240 status = "disabled"; 1241 1242 ports { 1243 #address-cells = <1>; 1244 #size-cells = <0>; 1245 1246 port@2 { 1247 #address-cells = <1>; 1248 #size-cells = <0>; 1249 1250 reg = <2>; 1251 1252 vin04isp0: endpoint@0 { 1253 reg = <0>; 1254 remote-endpoint = <&isp0vin04>; 1255 }; 1256 }; 1257 }; 1258 }; 1259 1260 vin05: video@e6ef5000 { 1261 compatible = "renesas,vin-r8a779a0"; 1262 reg = <0 0xe6ef5000 0 0x1000>; 1263 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 1264 clocks = <&cpg CPG_MOD 803>; 1265 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1266 resets = <&cpg 803>; 1267 renesas,id = <5>; 1268 status = "disabled"; 1269 1270 ports { 1271 #address-cells = <1>; 1272 #size-cells = <0>; 1273 1274 port@2 { 1275 #address-cells = <1>; 1276 #size-cells = <0>; 1277 1278 reg = <2>; 1279 1280 vin05isp0: endpoint@0 { 1281 reg = <0>; 1282 remote-endpoint = <&isp0vin05>; 1283 }; 1284 }; 1285 }; 1286 }; 1287 1288 vin06: video@e6ef6000 { 1289 compatible = "renesas,vin-r8a779a0"; 1290 reg = <0 0xe6ef6000 0 0x1000>; 1291 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 1292 clocks = <&cpg CPG_MOD 804>; 1293 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1294 resets = <&cpg 804>; 1295 renesas,id = <6>; 1296 status = "disabled"; 1297 1298 ports { 1299 #address-cells = <1>; 1300 #size-cells = <0>; 1301 1302 port@2 { 1303 #address-cells = <1>; 1304 #size-cells = <0>; 1305 1306 reg = <2>; 1307 1308 vin06isp0: endpoint@0 { 1309 reg = <0>; 1310 remote-endpoint = <&isp0vin06>; 1311 }; 1312 }; 1313 }; 1314 }; 1315 1316 vin07: video@e6ef7000 { 1317 compatible = "renesas,vin-r8a779a0"; 1318 reg = <0 0xe6ef7000 0 0x1000>; 1319 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 1320 clocks = <&cpg CPG_MOD 805>; 1321 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1322 resets = <&cpg 805>; 1323 renesas,id = <7>; 1324 status = "disabled"; 1325 1326 ports { 1327 #address-cells = <1>; 1328 #size-cells = <0>; 1329 1330 port@2 { 1331 #address-cells = <1>; 1332 #size-cells = <0>; 1333 1334 reg = <2>; 1335 1336 vin07isp0: endpoint@0 { 1337 reg = <0>; 1338 remote-endpoint = <&isp0vin07>; 1339 }; 1340 }; 1341 }; 1342 }; 1343 1344 vin08: video@e6ef8000 { 1345 compatible = "renesas,vin-r8a779a0"; 1346 reg = <0 0xe6ef8000 0 0x1000>; 1347 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 1348 clocks = <&cpg CPG_MOD 806>; 1349 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1350 resets = <&cpg 806>; 1351 renesas,id = <8>; 1352 status = "disabled"; 1353 1354 ports { 1355 #address-cells = <1>; 1356 #size-cells = <0>; 1357 1358 port@2 { 1359 #address-cells = <1>; 1360 #size-cells = <0>; 1361 1362 reg = <2>; 1363 1364 vin08isp1: endpoint@1 { 1365 reg = <1>; 1366 remote-endpoint = <&isp1vin08>; 1367 }; 1368 }; 1369 }; 1370 }; 1371 1372 vin09: video@e6ef9000 { 1373 compatible = "renesas,vin-r8a779a0"; 1374 reg = <0 0xe6ef9000 0 0x1000>; 1375 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; 1376 clocks = <&cpg CPG_MOD 807>; 1377 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1378 resets = <&cpg 807>; 1379 renesas,id = <9>; 1380 status = "disabled"; 1381 1382 ports { 1383 #address-cells = <1>; 1384 #size-cells = <0>; 1385 1386 port@2 { 1387 #address-cells = <1>; 1388 #size-cells = <0>; 1389 1390 reg = <2>; 1391 1392 vin09isp1: endpoint@1 { 1393 reg = <1>; 1394 remote-endpoint = <&isp1vin09>; 1395 }; 1396 }; 1397 }; 1398 }; 1399 1400 vin10: video@e6efa000 { 1401 compatible = "renesas,vin-r8a779a0"; 1402 reg = <0 0xe6efa000 0 0x1000>; 1403 interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>; 1404 clocks = <&cpg CPG_MOD 808>; 1405 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1406 resets = <&cpg 808>; 1407 renesas,id = <10>; 1408 status = "disabled"; 1409 1410 ports { 1411 #address-cells = <1>; 1412 #size-cells = <0>; 1413 1414 port@2 { 1415 #address-cells = <1>; 1416 #size-cells = <0>; 1417 1418 reg = <2>; 1419 1420 vin10isp1: endpoint@1 { 1421 reg = <1>; 1422 remote-endpoint = <&isp1vin10>; 1423 }; 1424 }; 1425 }; 1426 }; 1427 1428 vin11: video@e6efb000 { 1429 compatible = "renesas,vin-r8a779a0"; 1430 reg = <0 0xe6efb000 0 0x1000>; 1431 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; 1432 clocks = <&cpg CPG_MOD 809>; 1433 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1434 resets = <&cpg 809>; 1435 renesas,id = <11>; 1436 status = "disabled"; 1437 1438 ports { 1439 #address-cells = <1>; 1440 #size-cells = <0>; 1441 1442 port@2 { 1443 #address-cells = <1>; 1444 #size-cells = <0>; 1445 1446 reg = <2>; 1447 1448 vin11isp1: endpoint@1 { 1449 reg = <1>; 1450 remote-endpoint = <&isp1vin11>; 1451 }; 1452 }; 1453 }; 1454 }; 1455 1456 vin12: video@e6efc000 { 1457 compatible = "renesas,vin-r8a779a0"; 1458 reg = <0 0xe6efc000 0 0x1000>; 1459 interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>; 1460 clocks = <&cpg CPG_MOD 810>; 1461 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1462 resets = <&cpg 810>; 1463 renesas,id = <12>; 1464 status = "disabled"; 1465 1466 ports { 1467 #address-cells = <1>; 1468 #size-cells = <0>; 1469 1470 port@2 { 1471 #address-cells = <1>; 1472 #size-cells = <0>; 1473 1474 reg = <2>; 1475 1476 vin12isp1: endpoint@1 { 1477 reg = <1>; 1478 remote-endpoint = <&isp1vin12>; 1479 }; 1480 }; 1481 }; 1482 }; 1483 1484 vin13: video@e6efd000 { 1485 compatible = "renesas,vin-r8a779a0"; 1486 reg = <0 0xe6efd000 0 0x1000>; 1487 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 1488 clocks = <&cpg CPG_MOD 811>; 1489 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1490 resets = <&cpg 811>; 1491 renesas,id = <13>; 1492 status = "disabled"; 1493 1494 ports { 1495 #address-cells = <1>; 1496 #size-cells = <0>; 1497 1498 port@2 { 1499 #address-cells = <1>; 1500 #size-cells = <0>; 1501 1502 reg = <2>; 1503 1504 vin13isp1: endpoint@1 { 1505 reg = <1>; 1506 remote-endpoint = <&isp1vin13>; 1507 }; 1508 }; 1509 }; 1510 }; 1511 1512 vin14: video@e6efe000 { 1513 compatible = "renesas,vin-r8a779a0"; 1514 reg = <0 0xe6efe000 0 0x1000>; 1515 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1516 clocks = <&cpg CPG_MOD 812>; 1517 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1518 resets = <&cpg 812>; 1519 renesas,id = <14>; 1520 status = "disabled"; 1521 1522 ports { 1523 #address-cells = <1>; 1524 #size-cells = <0>; 1525 1526 port@2 { 1527 #address-cells = <1>; 1528 #size-cells = <0>; 1529 1530 reg = <2>; 1531 1532 vin14isp1: endpoint@1 { 1533 reg = <1>; 1534 remote-endpoint = <&isp1vin14>; 1535 }; 1536 }; 1537 }; 1538 }; 1539 1540 vin15: video@e6eff000 { 1541 compatible = "renesas,vin-r8a779a0"; 1542 reg = <0 0xe6eff000 0 0x1000>; 1543 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1544 clocks = <&cpg CPG_MOD 813>; 1545 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1546 resets = <&cpg 813>; 1547 renesas,id = <15>; 1548 status = "disabled"; 1549 1550 ports { 1551 #address-cells = <1>; 1552 #size-cells = <0>; 1553 1554 port@2 { 1555 #address-cells = <1>; 1556 #size-cells = <0>; 1557 1558 reg = <2>; 1559 1560 vin15isp1: endpoint@1 { 1561 reg = <1>; 1562 remote-endpoint = <&isp1vin15>; 1563 }; 1564 }; 1565 }; 1566 }; 1567 1568 vin16: video@e6ed0000 { 1569 compatible = "renesas,vin-r8a779a0"; 1570 reg = <0 0xe6ed0000 0 0x1000>; 1571 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; 1572 clocks = <&cpg CPG_MOD 814>; 1573 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1574 resets = <&cpg 814>; 1575 renesas,id = <16>; 1576 status = "disabled"; 1577 1578 ports { 1579 #address-cells = <1>; 1580 #size-cells = <0>; 1581 1582 port@2 { 1583 #address-cells = <1>; 1584 #size-cells = <0>; 1585 1586 reg = <2>; 1587 1588 vin16isp2: endpoint@2 { 1589 reg = <2>; 1590 remote-endpoint = <&isp2vin16>; 1591 }; 1592 }; 1593 }; 1594 }; 1595 1596 vin17: video@e6ed1000 { 1597 compatible = "renesas,vin-r8a779a0"; 1598 reg = <0 0xe6ed1000 0 0x1000>; 1599 interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>; 1600 clocks = <&cpg CPG_MOD 815>; 1601 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1602 resets = <&cpg 815>; 1603 renesas,id = <17>; 1604 status = "disabled"; 1605 1606 ports { 1607 #address-cells = <1>; 1608 #size-cells = <0>; 1609 1610 port@2 { 1611 #address-cells = <1>; 1612 #size-cells = <0>; 1613 1614 reg = <2>; 1615 1616 vin17isp2: endpoint@2 { 1617 reg = <2>; 1618 remote-endpoint = <&isp2vin17>; 1619 }; 1620 }; 1621 }; 1622 }; 1623 1624 vin18: video@e6ed2000 { 1625 compatible = "renesas,vin-r8a779a0"; 1626 reg = <0 0xe6ed2000 0 0x1000>; 1627 interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>; 1628 clocks = <&cpg CPG_MOD 816>; 1629 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1630 resets = <&cpg 816>; 1631 renesas,id = <18>; 1632 status = "disabled"; 1633 1634 ports { 1635 #address-cells = <1>; 1636 #size-cells = <0>; 1637 1638 port@2 { 1639 #address-cells = <1>; 1640 #size-cells = <0>; 1641 1642 reg = <2>; 1643 1644 vin18isp2: endpoint@2 { 1645 reg = <2>; 1646 remote-endpoint = <&isp2vin18>; 1647 }; 1648 }; 1649 }; 1650 }; 1651 1652 vin19: video@e6ed3000 { 1653 compatible = "renesas,vin-r8a779a0"; 1654 reg = <0 0xe6ed3000 0 0x1000>; 1655 interrupts = <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>; 1656 clocks = <&cpg CPG_MOD 817>; 1657 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1658 resets = <&cpg 817>; 1659 renesas,id = <19>; 1660 status = "disabled"; 1661 1662 ports { 1663 #address-cells = <1>; 1664 #size-cells = <0>; 1665 1666 port@2 { 1667 #address-cells = <1>; 1668 #size-cells = <0>; 1669 1670 reg = <2>; 1671 1672 vin19isp2: endpoint@2 { 1673 reg = <2>; 1674 remote-endpoint = <&isp2vin19>; 1675 }; 1676 }; 1677 }; 1678 }; 1679 1680 vin20: video@e6ed4000 { 1681 compatible = "renesas,vin-r8a779a0"; 1682 reg = <0 0xe6ed4000 0 0x1000>; 1683 interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>; 1684 clocks = <&cpg CPG_MOD 818>; 1685 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1686 resets = <&cpg 818>; 1687 renesas,id = <20>; 1688 status = "disabled"; 1689 1690 ports { 1691 #address-cells = <1>; 1692 #size-cells = <0>; 1693 1694 port@2 { 1695 #address-cells = <1>; 1696 #size-cells = <0>; 1697 1698 reg = <2>; 1699 1700 vin20isp2: endpoint@2 { 1701 reg = <2>; 1702 remote-endpoint = <&isp2vin20>; 1703 }; 1704 }; 1705 }; 1706 }; 1707 1708 vin21: video@e6ed5000 { 1709 compatible = "renesas,vin-r8a779a0"; 1710 reg = <0 0xe6ed5000 0 0x1000>; 1711 interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>; 1712 clocks = <&cpg CPG_MOD 819>; 1713 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1714 resets = <&cpg 819>; 1715 renesas,id = <21>; 1716 status = "disabled"; 1717 1718 ports { 1719 #address-cells = <1>; 1720 #size-cells = <0>; 1721 1722 port@2 { 1723 #address-cells = <1>; 1724 #size-cells = <0>; 1725 1726 reg = <2>; 1727 1728 vin21isp2: endpoint@2 { 1729 reg = <2>; 1730 remote-endpoint = <&isp2vin21>; 1731 }; 1732 }; 1733 }; 1734 }; 1735 1736 vin22: video@e6ed6000 { 1737 compatible = "renesas,vin-r8a779a0"; 1738 reg = <0 0xe6ed6000 0 0x1000>; 1739 interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>; 1740 clocks = <&cpg CPG_MOD 820>; 1741 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1742 resets = <&cpg 820>; 1743 renesas,id = <22>; 1744 status = "disabled"; 1745 1746 ports { 1747 #address-cells = <1>; 1748 #size-cells = <0>; 1749 1750 port@2 { 1751 #address-cells = <1>; 1752 #size-cells = <0>; 1753 1754 reg = <2>; 1755 1756 vin22isp2: endpoint@2 { 1757 reg = <2>; 1758 remote-endpoint = <&isp2vin22>; 1759 }; 1760 }; 1761 }; 1762 }; 1763 1764 vin23: video@e6ed7000 { 1765 compatible = "renesas,vin-r8a779a0"; 1766 reg = <0 0xe6ed7000 0 0x1000>; 1767 interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>; 1768 clocks = <&cpg CPG_MOD 821>; 1769 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1770 resets = <&cpg 821>; 1771 renesas,id = <23>; 1772 status = "disabled"; 1773 1774 ports { 1775 #address-cells = <1>; 1776 #size-cells = <0>; 1777 1778 port@2 { 1779 #address-cells = <1>; 1780 #size-cells = <0>; 1781 1782 reg = <2>; 1783 1784 vin23isp2: endpoint@2 { 1785 reg = <2>; 1786 remote-endpoint = <&isp2vin23>; 1787 }; 1788 }; 1789 }; 1790 }; 1791 1792 vin24: video@e6ed8000 { 1793 compatible = "renesas,vin-r8a779a0"; 1794 reg = <0 0xe6ed8000 0 0x1000>; 1795 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 1796 clocks = <&cpg CPG_MOD 822>; 1797 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1798 resets = <&cpg 822>; 1799 renesas,id = <24>; 1800 status = "disabled"; 1801 1802 ports { 1803 #address-cells = <1>; 1804 #size-cells = <0>; 1805 1806 port@2 { 1807 #address-cells = <1>; 1808 #size-cells = <0>; 1809 1810 reg = <2>; 1811 1812 vin24isp3: endpoint@3 { 1813 reg = <3>; 1814 remote-endpoint = <&isp3vin24>; 1815 }; 1816 }; 1817 }; 1818 }; 1819 1820 vin25: video@e6ed9000 { 1821 compatible = "renesas,vin-r8a779a0"; 1822 reg = <0 0xe6ed9000 0 0x1000>; 1823 interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>; 1824 clocks = <&cpg CPG_MOD 823>; 1825 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1826 resets = <&cpg 823>; 1827 renesas,id = <25>; 1828 status = "disabled"; 1829 1830 ports { 1831 #address-cells = <1>; 1832 #size-cells = <0>; 1833 1834 port@2 { 1835 #address-cells = <1>; 1836 #size-cells = <0>; 1837 1838 reg = <2>; 1839 1840 vin25isp3: endpoint@3 { 1841 reg = <3>; 1842 remote-endpoint = <&isp3vin25>; 1843 }; 1844 }; 1845 }; 1846 }; 1847 1848 vin26: video@e6eda000 { 1849 compatible = "renesas,vin-r8a779a0"; 1850 reg = <0 0xe6eda000 0 0x1000>; 1851 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 1852 clocks = <&cpg CPG_MOD 824>; 1853 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1854 resets = <&cpg 824>; 1855 renesas,id = <26>; 1856 status = "disabled"; 1857 1858 ports { 1859 #address-cells = <1>; 1860 #size-cells = <0>; 1861 1862 port@2 { 1863 #address-cells = <1>; 1864 #size-cells = <0>; 1865 1866 reg = <2>; 1867 1868 vin26isp3: endpoint@3 { 1869 reg = <3>; 1870 remote-endpoint = <&isp3vin26>; 1871 }; 1872 }; 1873 }; 1874 }; 1875 1876 vin27: video@e6edb000 { 1877 compatible = "renesas,vin-r8a779a0"; 1878 reg = <0 0xe6edb000 0 0x1000>; 1879 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 1880 clocks = <&cpg CPG_MOD 825>; 1881 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1882 resets = <&cpg 825>; 1883 renesas,id = <27>; 1884 status = "disabled"; 1885 1886 ports { 1887 #address-cells = <1>; 1888 #size-cells = <0>; 1889 1890 port@2 { 1891 #address-cells = <1>; 1892 #size-cells = <0>; 1893 1894 reg = <2>; 1895 1896 vin27isp3: endpoint@3 { 1897 reg = <3>; 1898 remote-endpoint = <&isp3vin27>; 1899 }; 1900 }; 1901 }; 1902 }; 1903 1904 vin28: video@e6edc000 { 1905 compatible = "renesas,vin-r8a779a0"; 1906 reg = <0 0xe6edc000 0 0x1000>; 1907 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 1908 clocks = <&cpg CPG_MOD 826>; 1909 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1910 resets = <&cpg 826>; 1911 renesas,id = <28>; 1912 status = "disabled"; 1913 1914 ports { 1915 #address-cells = <1>; 1916 #size-cells = <0>; 1917 1918 port@2 { 1919 #address-cells = <1>; 1920 #size-cells = <0>; 1921 1922 reg = <2>; 1923 1924 vin28isp3: endpoint@3 { 1925 reg = <3>; 1926 remote-endpoint = <&isp3vin28>; 1927 }; 1928 }; 1929 }; 1930 }; 1931 1932 vin29: video@e6edd000 { 1933 compatible = "renesas,vin-r8a779a0"; 1934 reg = <0 0xe6edd000 0 0x1000>; 1935 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 1936 clocks = <&cpg CPG_MOD 827>; 1937 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1938 resets = <&cpg 827>; 1939 renesas,id = <29>; 1940 status = "disabled"; 1941 1942 ports { 1943 #address-cells = <1>; 1944 #size-cells = <0>; 1945 1946 port@2 { 1947 #address-cells = <1>; 1948 #size-cells = <0>; 1949 1950 reg = <2>; 1951 1952 vin29isp3: endpoint@3 { 1953 reg = <3>; 1954 remote-endpoint = <&isp3vin29>; 1955 }; 1956 }; 1957 }; 1958 }; 1959 1960 vin30: video@e6ede000 { 1961 compatible = "renesas,vin-r8a779a0"; 1962 reg = <0 0xe6ede000 0 0x1000>; 1963 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; 1964 clocks = <&cpg CPG_MOD 828>; 1965 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1966 resets = <&cpg 828>; 1967 renesas,id = <30>; 1968 status = "disabled"; 1969 1970 ports { 1971 #address-cells = <1>; 1972 #size-cells = <0>; 1973 1974 port@2 { 1975 #address-cells = <1>; 1976 #size-cells = <0>; 1977 1978 reg = <2>; 1979 1980 vin30isp3: endpoint@3 { 1981 reg = <3>; 1982 remote-endpoint = <&isp3vin30>; 1983 }; 1984 }; 1985 }; 1986 }; 1987 1988 vin31: video@e6edf000 { 1989 compatible = "renesas,vin-r8a779a0"; 1990 reg = <0 0xe6edf000 0 0x1000>; 1991 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; 1992 clocks = <&cpg CPG_MOD 829>; 1993 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 1994 resets = <&cpg 829>; 1995 renesas,id = <31>; 1996 status = "disabled"; 1997 1998 ports { 1999 #address-cells = <1>; 2000 #size-cells = <0>; 2001 2002 port@2 { 2003 #address-cells = <1>; 2004 #size-cells = <0>; 2005 2006 reg = <2>; 2007 2008 vin31isp3: endpoint@3 { 2009 reg = <3>; 2010 remote-endpoint = <&isp3vin31>; 2011 }; 2012 }; 2013 }; 2014 }; 2015 2016 dmac1: dma-controller@e7350000 { 2017 compatible = "renesas,dmac-r8a779a0", 2018 "renesas,rcar-gen4-dmac"; 2019 reg = <0 0xe7350000 0 0x1000>, 2020 <0 0xe7300000 0 0x10000>; 2021 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, 2022 <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, 2023 <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, 2024 <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, 2025 <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, 2026 <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>, 2027 <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>, 2028 <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>, 2029 <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 2030 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 2031 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 2032 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 2033 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 2034 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 2035 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 2036 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 2037 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; 2038 interrupt-names = "error", 2039 "ch0", "ch1", "ch2", "ch3", "ch4", 2040 "ch5", "ch6", "ch7", "ch8", "ch9", 2041 "ch10", "ch11", "ch12", "ch13", 2042 "ch14", "ch15"; 2043 clocks = <&cpg CPG_MOD 709>; 2044 clock-names = "fck"; 2045 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2046 resets = <&cpg 709>; 2047 #dma-cells = <1>; 2048 dma-channels = <16>; 2049 }; 2050 2051 dmac2: dma-controller@e7351000 { 2052 compatible = "renesas,dmac-r8a779a0", 2053 "renesas,rcar-gen4-dmac"; 2054 reg = <0 0xe7351000 0 0x1000>, 2055 <0 0xe7310000 0 0x10000>; 2056 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, 2057 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 2058 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 2059 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 2060 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 2061 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 2062 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 2063 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 2064 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; 2065 interrupt-names = "error", 2066 "ch0", "ch1", "ch2", "ch3", "ch4", 2067 "ch5", "ch6", "ch7"; 2068 clocks = <&cpg CPG_MOD 710>; 2069 clock-names = "fck"; 2070 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2071 resets = <&cpg 710>; 2072 #dma-cells = <1>; 2073 dma-channels = <8>; 2074 }; 2075 2076 mmc0: mmc@ee140000 { 2077 compatible = "renesas,sdhi-r8a779a0", 2078 "renesas,rcar-gen3-sdhi"; 2079 reg = <0 0xee140000 0 0x2000>; 2080 interrupts = <GIC_SPI 236 IRQ_TYPE_LEVEL_HIGH>; 2081 clocks = <&cpg CPG_MOD 706>, <&cpg CPG_CORE R8A779A0_CLK_SD0H>; 2082 clock-names = "core", "clkh"; 2083 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2084 resets = <&cpg 706>; 2085 max-frequency = <200000000>; 2086 iommus = <&ipmmu_ds0 32>; 2087 status = "disabled"; 2088 }; 2089 2090 rpc: spi@ee200000 { 2091 compatible = "renesas,r8a779a0-rpc-if", 2092 "renesas,rcar-gen3-rpc-if"; 2093 reg = <0 0xee200000 0 0x200>, 2094 <0 0x08000000 0 0x04000000>, 2095 <0 0xee208000 0 0x100>; 2096 reg-names = "regs", "dirmap", "wbuf"; 2097 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; 2098 clocks = <&cpg CPG_MOD 629>; 2099 clock-names = "rpc"; 2100 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2101 resets = <&cpg 629>; 2102 #address-cells = <1>; 2103 #size-cells = <0>; 2104 status = "disabled"; 2105 }; 2106 2107 ipmmu_rt0: iommu@ee480000 { 2108 compatible = "renesas,ipmmu-r8a779a0", 2109 "renesas,rcar-gen4-ipmmu-vmsa"; 2110 reg = <0 0xee480000 0 0x20000>; 2111 renesas,ipmmu-main = <&ipmmu_mm 10>; 2112 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2113 #iommu-cells = <1>; 2114 }; 2115 2116 ipmmu_rt1: iommu@ee4c0000 { 2117 compatible = "renesas,ipmmu-r8a779a0", 2118 "renesas,rcar-gen4-ipmmu-vmsa"; 2119 reg = <0 0xee4c0000 0 0x20000>; 2120 renesas,ipmmu-main = <&ipmmu_mm 19>; 2121 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2122 #iommu-cells = <1>; 2123 }; 2124 2125 ipmmu_ds0: iommu@eed00000 { 2126 compatible = "renesas,ipmmu-r8a779a0", 2127 "renesas,rcar-gen4-ipmmu-vmsa"; 2128 reg = <0 0xeed00000 0 0x20000>; 2129 renesas,ipmmu-main = <&ipmmu_mm 0>; 2130 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2131 #iommu-cells = <1>; 2132 }; 2133 2134 ipmmu_ds1: iommu@eed40000 { 2135 compatible = "renesas,ipmmu-r8a779a0", 2136 "renesas,rcar-gen4-ipmmu-vmsa"; 2137 reg = <0 0xeed40000 0 0x20000>; 2138 renesas,ipmmu-main = <&ipmmu_mm 1>; 2139 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2140 #iommu-cells = <1>; 2141 }; 2142 2143 ipmmu_ir: iommu@eed80000 { 2144 compatible = "renesas,ipmmu-r8a779a0", 2145 "renesas,rcar-gen4-ipmmu-vmsa"; 2146 reg = <0 0xeed80000 0 0x20000>; 2147 renesas,ipmmu-main = <&ipmmu_mm 3>; 2148 power-domains = <&sysc R8A779A0_PD_A3IR>; 2149 #iommu-cells = <1>; 2150 }; 2151 2152 ipmmu_vc0: iommu@eedc0000 { 2153 compatible = "renesas,ipmmu-r8a779a0", 2154 "renesas,rcar-gen4-ipmmu-vmsa"; 2155 reg = <0 0xeedc0000 0 0x20000>; 2156 renesas,ipmmu-main = <&ipmmu_mm 12>; 2157 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2158 #iommu-cells = <1>; 2159 }; 2160 2161 ipmmu_vi0: iommu@eee80000 { 2162 compatible = "renesas,ipmmu-r8a779a0", 2163 "renesas,rcar-gen4-ipmmu-vmsa"; 2164 reg = <0 0xeee80000 0 0x20000>; 2165 renesas,ipmmu-main = <&ipmmu_mm 14>; 2166 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2167 #iommu-cells = <1>; 2168 }; 2169 2170 ipmmu_vi1: iommu@eeec0000 { 2171 compatible = "renesas,ipmmu-r8a779a0", 2172 "renesas,rcar-gen4-ipmmu-vmsa"; 2173 reg = <0 0xeeec0000 0 0x20000>; 2174 renesas,ipmmu-main = <&ipmmu_mm 15>; 2175 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2176 #iommu-cells = <1>; 2177 }; 2178 2179 ipmmu_3dg: iommu@eee00000 { 2180 compatible = "renesas,ipmmu-r8a779a0", 2181 "renesas,rcar-gen4-ipmmu-vmsa"; 2182 reg = <0 0xeee00000 0 0x20000>; 2183 renesas,ipmmu-main = <&ipmmu_mm 6>; 2184 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2185 #iommu-cells = <1>; 2186 }; 2187 2188 ipmmu_vip0: iommu@eef00000 { 2189 compatible = "renesas,ipmmu-r8a779a0", 2190 "renesas,rcar-gen4-ipmmu-vmsa"; 2191 reg = <0 0xeef00000 0 0x20000>; 2192 renesas,ipmmu-main = <&ipmmu_mm 5>; 2193 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2194 #iommu-cells = <1>; 2195 }; 2196 2197 ipmmu_vip1: iommu@eef40000 { 2198 compatible = "renesas,ipmmu-r8a779a0", 2199 "renesas,rcar-gen4-ipmmu-vmsa"; 2200 reg = <0 0xeef40000 0 0x20000>; 2201 renesas,ipmmu-main = <&ipmmu_mm 11>; 2202 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2203 #iommu-cells = <1>; 2204 }; 2205 2206 ipmmu_mm: iommu@eefc0000 { 2207 compatible = "renesas,ipmmu-r8a779a0", 2208 "renesas,rcar-gen4-ipmmu-vmsa"; 2209 reg = <0 0xeefc0000 0 0x20000>; 2210 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>, 2211 <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; 2212 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2213 #iommu-cells = <1>; 2214 }; 2215 2216 gic: interrupt-controller@f1000000 { 2217 compatible = "arm,gic-v3"; 2218 #interrupt-cells = <3>; 2219 #address-cells = <0>; 2220 interrupt-controller; 2221 reg = <0x0 0xf1000000 0 0x20000>, 2222 <0x0 0xf1060000 0 0x110000>; 2223 interrupts = <GIC_PPI 9 2224 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>; 2225 }; 2226 2227 fcpvd0: fcp@fea10000 { 2228 compatible = "renesas,fcpv"; 2229 reg = <0 0xfea10000 0 0x200>; 2230 clocks = <&cpg CPG_MOD 508>; 2231 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2232 resets = <&cpg 508>; 2233 }; 2234 2235 fcpvd1: fcp@fea11000 { 2236 compatible = "renesas,fcpv"; 2237 reg = <0 0xfea11000 0 0x200>; 2238 clocks = <&cpg CPG_MOD 509>; 2239 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2240 resets = <&cpg 509>; 2241 }; 2242 2243 vspd0: vsp@fea20000 { 2244 compatible = "renesas,vsp2"; 2245 reg = <0 0xfea20000 0 0x5000>; 2246 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>; 2247 clocks = <&cpg CPG_MOD 830>; 2248 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2249 resets = <&cpg 830>; 2250 2251 renesas,fcp = <&fcpvd0>; 2252 }; 2253 2254 vspd1: vsp@fea28000 { 2255 compatible = "renesas,vsp2"; 2256 reg = <0 0xfea28000 0 0x5000>; 2257 interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>; 2258 clocks = <&cpg CPG_MOD 831>; 2259 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2260 resets = <&cpg 831>; 2261 2262 renesas,fcp = <&fcpvd1>; 2263 }; 2264 2265 csi40: csi2@feaa0000 { 2266 compatible = "renesas,r8a779a0-csi2"; 2267 reg = <0 0xfeaa0000 0 0x10000>; 2268 interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>; 2269 clocks = <&cpg CPG_MOD 331>; 2270 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2271 resets = <&cpg 331>; 2272 status = "disabled"; 2273 2274 ports { 2275 #address-cells = <1>; 2276 #size-cells = <0>; 2277 2278 port@0 { 2279 reg = <0>; 2280 }; 2281 2282 port@1 { 2283 reg = <1>; 2284 csi40isp0: endpoint { 2285 remote-endpoint = <&isp0csi40>; 2286 }; 2287 }; 2288 }; 2289 }; 2290 2291 csi41: csi2@feab0000 { 2292 compatible = "renesas,r8a779a0-csi2"; 2293 reg = <0 0xfeab0000 0 0x10000>; 2294 interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>; 2295 clocks = <&cpg CPG_MOD 400>; 2296 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2297 resets = <&cpg 400>; 2298 status = "disabled"; 2299 2300 ports { 2301 #address-cells = <1>; 2302 #size-cells = <0>; 2303 2304 port@0 { 2305 reg = <0>; 2306 }; 2307 2308 port@1 { 2309 reg = <1>; 2310 csi41isp1: endpoint { 2311 remote-endpoint = <&isp1csi41>; 2312 }; 2313 }; 2314 }; 2315 }; 2316 2317 csi42: csi2@fed60000 { 2318 compatible = "renesas,r8a779a0-csi2"; 2319 reg = <0 0xfed60000 0 0x10000>; 2320 interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>; 2321 clocks = <&cpg CPG_MOD 401>; 2322 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2323 resets = <&cpg 401>; 2324 status = "disabled"; 2325 2326 ports { 2327 #address-cells = <1>; 2328 #size-cells = <0>; 2329 2330 port@0 { 2331 reg = <0>; 2332 }; 2333 2334 port@1 { 2335 reg = <1>; 2336 csi42isp2: endpoint { 2337 remote-endpoint = <&isp2csi42>; 2338 }; 2339 }; 2340 }; 2341 }; 2342 2343 csi43: csi2@fed70000 { 2344 compatible = "renesas,r8a779a0-csi2"; 2345 reg = <0 0xfed70000 0 0x10000>; 2346 interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>; 2347 clocks = <&cpg CPG_MOD 402>; 2348 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2349 resets = <&cpg 402>; 2350 status = "disabled"; 2351 2352 ports { 2353 #address-cells = <1>; 2354 #size-cells = <0>; 2355 2356 port@0 { 2357 reg = <0>; 2358 }; 2359 2360 port@1 { 2361 reg = <1>; 2362 csi43isp3: endpoint { 2363 remote-endpoint = <&isp3csi43>; 2364 }; 2365 }; 2366 }; 2367 }; 2368 2369 du: display@feb00000 { 2370 compatible = "renesas,du-r8a779a0"; 2371 reg = <0 0xfeb00000 0 0x40000>; 2372 interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>, 2373 <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 2374 clocks = <&cpg CPG_MOD 411>; 2375 clock-names = "du.0"; 2376 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2377 resets = <&cpg 411>; 2378 reset-names = "du.0"; 2379 renesas,vsps = <&vspd0 0>, <&vspd1 0>; 2380 2381 status = "disabled"; 2382 2383 ports { 2384 #address-cells = <1>; 2385 #size-cells = <0>; 2386 2387 port@0 { 2388 reg = <0>; 2389 du_out_dsi0: endpoint { 2390 remote-endpoint = <&dsi0_in>; 2391 }; 2392 }; 2393 2394 port@1 { 2395 reg = <1>; 2396 du_out_dsi1: endpoint { 2397 remote-endpoint = <&dsi1_in>; 2398 }; 2399 }; 2400 }; 2401 }; 2402 2403 isp0: isp@fed00000 { 2404 compatible = "renesas,r8a779a0-isp"; 2405 reg = <0 0xfed00000 0 0x10000>; 2406 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 2407 clocks = <&cpg CPG_MOD 612>; 2408 power-domains = <&sysc R8A779A0_PD_A3ISP01>; 2409 resets = <&cpg 612>; 2410 status = "disabled"; 2411 2412 ports { 2413 #address-cells = <1>; 2414 #size-cells = <0>; 2415 2416 port@0 { 2417 #address-cells = <1>; 2418 #size-cells = <0>; 2419 2420 reg = <0>; 2421 2422 isp0csi40: endpoint@0 { 2423 reg = <0>; 2424 remote-endpoint = <&csi40isp0>; 2425 }; 2426 }; 2427 2428 port@1 { 2429 reg = <1>; 2430 isp0vin00: endpoint { 2431 remote-endpoint = <&vin00isp0>; 2432 }; 2433 }; 2434 2435 port@2 { 2436 reg = <2>; 2437 isp0vin01: endpoint { 2438 remote-endpoint = <&vin01isp0>; 2439 }; 2440 }; 2441 2442 port@3 { 2443 reg = <3>; 2444 isp0vin02: endpoint { 2445 remote-endpoint = <&vin02isp0>; 2446 }; 2447 }; 2448 2449 port@4 { 2450 reg = <4>; 2451 isp0vin03: endpoint { 2452 remote-endpoint = <&vin03isp0>; 2453 }; 2454 }; 2455 2456 port@5 { 2457 reg = <5>; 2458 isp0vin04: endpoint { 2459 remote-endpoint = <&vin04isp0>; 2460 }; 2461 }; 2462 2463 port@6 { 2464 reg = <6>; 2465 isp0vin05: endpoint { 2466 remote-endpoint = <&vin05isp0>; 2467 }; 2468 }; 2469 2470 port@7 { 2471 reg = <7>; 2472 isp0vin06: endpoint { 2473 remote-endpoint = <&vin06isp0>; 2474 }; 2475 }; 2476 2477 port@8 { 2478 reg = <8>; 2479 isp0vin07: endpoint { 2480 remote-endpoint = <&vin07isp0>; 2481 }; 2482 }; 2483 }; 2484 }; 2485 2486 isp1: isp@fed20000 { 2487 compatible = "renesas,r8a779a0-isp"; 2488 reg = <0 0xfed20000 0 0x10000>; 2489 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 2490 clocks = <&cpg CPG_MOD 613>; 2491 power-domains = <&sysc R8A779A0_PD_A3ISP01>; 2492 resets = <&cpg 613>; 2493 status = "disabled"; 2494 2495 ports { 2496 #address-cells = <1>; 2497 #size-cells = <0>; 2498 2499 port@0 { 2500 #address-cells = <1>; 2501 #size-cells = <0>; 2502 2503 reg = <0>; 2504 2505 isp1csi41: endpoint@1 { 2506 reg = <1>; 2507 remote-endpoint = <&csi41isp1>; 2508 }; 2509 }; 2510 2511 port@1 { 2512 reg = <1>; 2513 isp1vin08: endpoint { 2514 remote-endpoint = <&vin08isp1>; 2515 }; 2516 }; 2517 2518 port@2 { 2519 reg = <2>; 2520 isp1vin09: endpoint { 2521 remote-endpoint = <&vin09isp1>; 2522 }; 2523 }; 2524 2525 port@3 { 2526 reg = <3>; 2527 isp1vin10: endpoint { 2528 remote-endpoint = <&vin10isp1>; 2529 }; 2530 }; 2531 2532 port@4 { 2533 reg = <4>; 2534 isp1vin11: endpoint { 2535 remote-endpoint = <&vin11isp1>; 2536 }; 2537 }; 2538 2539 port@5 { 2540 reg = <5>; 2541 isp1vin12: endpoint { 2542 remote-endpoint = <&vin12isp1>; 2543 }; 2544 }; 2545 2546 port@6 { 2547 reg = <6>; 2548 isp1vin13: endpoint { 2549 remote-endpoint = <&vin13isp1>; 2550 }; 2551 }; 2552 2553 port@7 { 2554 reg = <7>; 2555 isp1vin14: endpoint { 2556 remote-endpoint = <&vin14isp1>; 2557 }; 2558 }; 2559 2560 port@8 { 2561 reg = <8>; 2562 isp1vin15: endpoint { 2563 remote-endpoint = <&vin15isp1>; 2564 }; 2565 }; 2566 }; 2567 }; 2568 2569 isp2: isp@fed30000 { 2570 compatible = "renesas,r8a779a0-isp"; 2571 reg = <0 0xfed30000 0 0x10000>; 2572 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 2573 clocks = <&cpg CPG_MOD 614>; 2574 power-domains = <&sysc R8A779A0_PD_A3ISP23>; 2575 resets = <&cpg 614>; 2576 status = "disabled"; 2577 2578 ports { 2579 #address-cells = <1>; 2580 #size-cells = <0>; 2581 2582 port@0 { 2583 #address-cells = <1>; 2584 #size-cells = <0>; 2585 2586 reg = <0>; 2587 2588 isp2csi42: endpoint@0 { 2589 reg = <0>; 2590 remote-endpoint = <&csi42isp2>; 2591 }; 2592 }; 2593 2594 port@1 { 2595 reg = <1>; 2596 isp2vin16: endpoint { 2597 remote-endpoint = <&vin16isp2>; 2598 }; 2599 }; 2600 2601 port@2 { 2602 reg = <2>; 2603 isp2vin17: endpoint { 2604 remote-endpoint = <&vin17isp2>; 2605 }; 2606 }; 2607 2608 port@3 { 2609 reg = <3>; 2610 isp2vin18: endpoint { 2611 remote-endpoint = <&vin18isp2>; 2612 }; 2613 }; 2614 2615 port@4 { 2616 reg = <4>; 2617 isp2vin19: endpoint { 2618 remote-endpoint = <&vin19isp2>; 2619 }; 2620 }; 2621 2622 port@5 { 2623 reg = <5>; 2624 isp2vin20: endpoint { 2625 remote-endpoint = <&vin20isp2>; 2626 }; 2627 }; 2628 2629 port@6 { 2630 reg = <6>; 2631 isp2vin21: endpoint { 2632 remote-endpoint = <&vin21isp2>; 2633 }; 2634 }; 2635 2636 port@7 { 2637 reg = <7>; 2638 isp2vin22: endpoint { 2639 remote-endpoint = <&vin22isp2>; 2640 }; 2641 }; 2642 2643 port@8 { 2644 reg = <8>; 2645 isp2vin23: endpoint { 2646 remote-endpoint = <&vin23isp2>; 2647 }; 2648 }; 2649 }; 2650 }; 2651 2652 isp3: isp@fed40000 { 2653 compatible = "renesas,r8a779a0-isp"; 2654 reg = <0 0xfed40000 0 0x10000>; 2655 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 2656 clocks = <&cpg CPG_MOD 615>; 2657 power-domains = <&sysc R8A779A0_PD_A3ISP23>; 2658 resets = <&cpg 615>; 2659 status = "disabled"; 2660 2661 ports { 2662 #address-cells = <1>; 2663 #size-cells = <0>; 2664 2665 port@0 { 2666 #address-cells = <1>; 2667 #size-cells = <0>; 2668 2669 reg = <0>; 2670 2671 isp3csi43: endpoint@1 { 2672 reg = <1>; 2673 remote-endpoint = <&csi43isp3>; 2674 }; 2675 }; 2676 2677 port@1 { 2678 reg = <1>; 2679 isp3vin24: endpoint { 2680 remote-endpoint = <&vin24isp3>; 2681 }; 2682 }; 2683 2684 port@2 { 2685 reg = <2>; 2686 isp3vin25: endpoint { 2687 remote-endpoint = <&vin25isp3>; 2688 }; 2689 }; 2690 2691 port@3 { 2692 reg = <3>; 2693 isp3vin26: endpoint { 2694 remote-endpoint = <&vin26isp3>; 2695 }; 2696 }; 2697 2698 port@4 { 2699 reg = <4>; 2700 isp3vin27: endpoint { 2701 remote-endpoint = <&vin27isp3>; 2702 }; 2703 }; 2704 2705 port@5 { 2706 reg = <5>; 2707 isp3vin28: endpoint { 2708 remote-endpoint = <&vin28isp3>; 2709 }; 2710 }; 2711 2712 port@6 { 2713 reg = <6>; 2714 isp3vin29: endpoint { 2715 remote-endpoint = <&vin29isp3>; 2716 }; 2717 }; 2718 2719 port@7 { 2720 reg = <7>; 2721 isp3vin30: endpoint { 2722 remote-endpoint = <&vin30isp3>; 2723 }; 2724 }; 2725 2726 port@8 { 2727 reg = <8>; 2728 isp3vin31: endpoint { 2729 remote-endpoint = <&vin31isp3>; 2730 }; 2731 }; 2732 }; 2733 }; 2734 2735 dsi0: dsi-encoder@fed80000 { 2736 compatible = "renesas,r8a779a0-dsi-csi2-tx"; 2737 reg = <0 0xfed80000 0 0x10000>; 2738 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2739 clocks = <&cpg CPG_MOD 415>, 2740 <&cpg CPG_CORE R8A779A0_CLK_DSI>, 2741 <&cpg CPG_CORE R8A779A0_CLK_CL16MCK>; 2742 clock-names = "fck", "dsi", "pll"; 2743 resets = <&cpg 415>; 2744 status = "disabled"; 2745 2746 ports { 2747 #address-cells = <1>; 2748 #size-cells = <0>; 2749 2750 port@0 { 2751 reg = <0>; 2752 dsi0_in: endpoint { 2753 remote-endpoint = <&du_out_dsi0>; 2754 }; 2755 }; 2756 2757 port@1 { 2758 reg = <1>; 2759 }; 2760 }; 2761 }; 2762 2763 dsi1: dsi-encoder@fed90000 { 2764 compatible = "renesas,r8a779a0-dsi-csi2-tx"; 2765 reg = <0 0xfed90000 0 0x10000>; 2766 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; 2767 clocks = <&cpg CPG_MOD 416>, 2768 <&cpg CPG_CORE R8A779A0_CLK_DSI>, 2769 <&cpg CPG_CORE R8A779A0_CLK_CL16MCK>; 2770 clock-names = "fck", "dsi", "pll"; 2771 resets = <&cpg 416>; 2772 status = "disabled"; 2773 2774 ports { 2775 #address-cells = <1>; 2776 #size-cells = <0>; 2777 2778 port@0 { 2779 reg = <0>; 2780 dsi1_in: endpoint { 2781 remote-endpoint = <&du_out_dsi1>; 2782 }; 2783 }; 2784 2785 port@1 { 2786 reg = <1>; 2787 }; 2788 }; 2789 }; 2790 2791 prr: chipid@fff00044 { 2792 compatible = "renesas,prr"; 2793 reg = <0 0xfff00044 0 4>; 2794 }; 2795 }; 2796 2797 thermal-zones { 2798 sensor1_thermal: sensor1-thermal { 2799 polling-delay-passive = <250>; 2800 polling-delay = <1000>; 2801 thermal-sensors = <&tsc 0>; 2802 2803 trips { 2804 sensor1_crit: sensor1-crit { 2805 temperature = <120000>; 2806 hysteresis = <1000>; 2807 type = "critical"; 2808 }; 2809 }; 2810 }; 2811 2812 sensor2_thermal: sensor2-thermal { 2813 polling-delay-passive = <250>; 2814 polling-delay = <1000>; 2815 thermal-sensors = <&tsc 1>; 2816 2817 trips { 2818 sensor2_crit: sensor2-crit { 2819 temperature = <120000>; 2820 hysteresis = <1000>; 2821 type = "critical"; 2822 }; 2823 }; 2824 }; 2825 2826 sensor3_thermal: sensor3-thermal { 2827 polling-delay-passive = <250>; 2828 polling-delay = <1000>; 2829 thermal-sensors = <&tsc 2>; 2830 2831 trips { 2832 sensor3_crit: sensor3-crit { 2833 temperature = <120000>; 2834 hysteresis = <1000>; 2835 type = "critical"; 2836 }; 2837 }; 2838 }; 2839 2840 sensor4_thermal: sensor4-thermal { 2841 polling-delay-passive = <250>; 2842 polling-delay = <1000>; 2843 thermal-sensors = <&tsc 3>; 2844 2845 trips { 2846 sensor4_crit: sensor4-crit { 2847 temperature = <120000>; 2848 hysteresis = <1000>; 2849 type = "critical"; 2850 }; 2851 }; 2852 }; 2853 2854 sensor5_thermal: sensor5-thermal { 2855 polling-delay-passive = <250>; 2856 polling-delay = <1000>; 2857 thermal-sensors = <&tsc 4>; 2858 2859 trips { 2860 sensor5_crit: sensor5-crit { 2861 temperature = <120000>; 2862 hysteresis = <1000>; 2863 type = "critical"; 2864 }; 2865 }; 2866 }; 2867 }; 2868 2869 timer { 2870 compatible = "arm,armv8-timer"; 2871 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, 2872 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, 2873 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, 2874 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>; 2875 }; 2876 };
Cache object: cbeec52e6c38cb408baf17d3109ff723
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