1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Device Tree Source for common parts of Salvator-X board variants
4 *
5 * Copyright (C) 2015-2016 Renesas Electronics Corp.
6 */
7
8 /*
9 * SSI-AK4613
10 *
11 * This command is required when Playback/Capture
12 *
13 * amixer set "DVC Out" 100%
14 * amixer set "DVC In" 100%
15 *
16 * You can use Mute
17 *
18 * amixer set "DVC Out Mute" on
19 * amixer set "DVC In Mute" on
20 *
21 * You can use Volume Ramp
22 *
23 * amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps"
24 * amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps"
25 * amixer set "DVC Out Ramp" on
26 * aplay xxx.wav &
27 * amixer set "DVC Out" 80% // Volume Down
28 * amixer set "DVC Out" 100% // Volume Up
29 */
30
31 #include <dt-bindings/gpio/gpio.h>
32 #include <dt-bindings/input/input.h>
33
34 / {
35 aliases {
36 serial0 = &scif2;
37 serial1 = &hscif1;
38 ethernet0 = &avb;
39 mmc0 = &sdhi2;
40 mmc1 = &sdhi0;
41 mmc2 = &sdhi3;
42 };
43
44 chosen {
45 bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
46 stdout-path = "serial0:115200n8";
47 };
48
49 audio_clkout: audio-clkout {
50 /*
51 * This is same as <&rcar_sound 0>
52 * but needed to avoid cs2000/rcar_sound probe dead-lock
53 */
54 compatible = "fixed-clock";
55 #clock-cells = <0>;
56 clock-frequency = <12288000>;
57 };
58
59 backlight: backlight {
60 compatible = "pwm-backlight";
61 pwms = <&pwm1 0 50000>;
62
63 brightness-levels = <256 128 64 16 8 4 0>;
64 default-brightness-level = <6>;
65
66 power-supply = <®_12v>;
67 enable-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
68 };
69
70 cvbs-in {
71 compatible = "composite-video-connector";
72 label = "CVBS IN";
73
74 port {
75 cvbs_con: endpoint {
76 remote-endpoint = <&adv7482_ain7>;
77 };
78 };
79 };
80
81 hdmi-in {
82 compatible = "hdmi-connector";
83 label = "HDMI IN";
84 type = "a";
85
86 port {
87 hdmi_in_con: endpoint {
88 remote-endpoint = <&adv7482_hdmi>;
89 };
90 };
91 };
92
93 hdmi0-out {
94 compatible = "hdmi-connector";
95 label = "HDMI0 OUT";
96 type = "a";
97
98 port {
99 hdmi0_con: endpoint {
100 remote-endpoint = <&rcar_dw_hdmi0_out>;
101 };
102 };
103 };
104
105 hdmi1-out {
106 compatible = "hdmi-connector";
107 label = "HDMI1 OUT";
108 type = "a";
109
110 port {
111 hdmi1_con: endpoint {
112 };
113 };
114 };
115
116 keys {
117 compatible = "gpio-keys";
118
119 pinctrl-0 = <&keys_pins>;
120 pinctrl-names = "default";
121
122 key-1 {
123 gpios = <&gpio5 17 GPIO_ACTIVE_LOW>;
124 linux,code = <KEY_1>;
125 label = "SW4-1";
126 wakeup-source;
127 debounce-interval = <20>;
128 };
129 key-2 {
130 gpios = <&gpio5 20 GPIO_ACTIVE_LOW>;
131 linux,code = <KEY_2>;
132 label = "SW4-2";
133 wakeup-source;
134 debounce-interval = <20>;
135 };
136 key-3 {
137 gpios = <&gpio5 22 GPIO_ACTIVE_LOW>;
138 linux,code = <KEY_3>;
139 label = "SW4-3";
140 wakeup-source;
141 debounce-interval = <20>;
142 };
143 key-4 {
144 gpios = <&gpio5 23 GPIO_ACTIVE_LOW>;
145 linux,code = <KEY_4>;
146 label = "SW4-4";
147 wakeup-source;
148 debounce-interval = <20>;
149 };
150 key-a {
151 gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
152 linux,code = <KEY_A>;
153 label = "TSW0";
154 wakeup-source;
155 debounce-interval = <20>;
156 };
157 key-b {
158 gpios = <&gpio6 12 GPIO_ACTIVE_LOW>;
159 linux,code = <KEY_B>;
160 label = "TSW1";
161 wakeup-source;
162 debounce-interval = <20>;
163 };
164 key-c {
165 gpios = <&gpio6 13 GPIO_ACTIVE_LOW>;
166 linux,code = <KEY_C>;
167 label = "TSW2";
168 wakeup-source;
169 debounce-interval = <20>;
170 };
171 };
172
173 reg_1p8v: regulator-1p8v {
174 compatible = "regulator-fixed";
175 regulator-name = "fixed-1.8V";
176 regulator-min-microvolt = <1800000>;
177 regulator-max-microvolt = <1800000>;
178 regulator-boot-on;
179 regulator-always-on;
180 };
181
182 reg_3p3v: regulator-3p3v {
183 compatible = "regulator-fixed";
184 regulator-name = "fixed-3.3V";
185 regulator-min-microvolt = <3300000>;
186 regulator-max-microvolt = <3300000>;
187 regulator-boot-on;
188 regulator-always-on;
189 };
190
191 reg_12v: regulator-12v {
192 compatible = "regulator-fixed";
193 regulator-name = "fixed-12V";
194 regulator-min-microvolt = <12000000>;
195 regulator-max-microvolt = <12000000>;
196 regulator-boot-on;
197 regulator-always-on;
198 };
199
200 sound_card: sound {
201 compatible = "audio-graph-card";
202
203 label = "rcar-sound";
204
205 dais = <&rsnd_port0 /* ak4613 */
206 &rsnd_port1 /* HDMI0 */
207 #ifdef SOC_HAS_HDMI1
208 &rsnd_port2 /* HDMI1 */
209 #endif
210 >;
211 };
212
213 vbus0_usb2: regulator-vbus0-usb2 {
214 compatible = "regulator-fixed";
215
216 regulator-name = "USB20_VBUS0";
217 regulator-min-microvolt = <5000000>;
218 regulator-max-microvolt = <5000000>;
219
220 gpio = <&gpio6 16 GPIO_ACTIVE_HIGH>;
221 enable-active-high;
222 };
223
224 vcc_sdhi0: regulator-vcc-sdhi0 {
225 compatible = "regulator-fixed";
226
227 regulator-name = "SDHI0 Vcc";
228 regulator-min-microvolt = <3300000>;
229 regulator-max-microvolt = <3300000>;
230
231 gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
232 enable-active-high;
233 };
234
235 vccq_sdhi0: regulator-vccq-sdhi0 {
236 compatible = "regulator-gpio";
237
238 regulator-name = "SDHI0 VccQ";
239 regulator-min-microvolt = <1800000>;
240 regulator-max-microvolt = <3300000>;
241
242 gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
243 gpios-states = <1>;
244 states = <3300000 1>, <1800000 0>;
245 };
246
247 vcc_sdhi3: regulator-vcc-sdhi3 {
248 compatible = "regulator-fixed";
249
250 regulator-name = "SDHI3 Vcc";
251 regulator-min-microvolt = <3300000>;
252 regulator-max-microvolt = <3300000>;
253
254 gpio = <&gpio3 15 GPIO_ACTIVE_HIGH>;
255 enable-active-high;
256 };
257
258 vccq_sdhi3: regulator-vccq-sdhi3 {
259 compatible = "regulator-gpio";
260
261 regulator-name = "SDHI3 VccQ";
262 regulator-min-microvolt = <1800000>;
263 regulator-max-microvolt = <3300000>;
264
265 gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
266 gpios-states = <1>;
267 states = <3300000 1>, <1800000 0>;
268 };
269
270 vga {
271 compatible = "vga-connector";
272
273 port {
274 vga_in: endpoint {
275 remote-endpoint = <&adv7123_out>;
276 };
277 };
278 };
279
280 vga-encoder {
281 compatible = "adi,adv7123";
282
283 ports {
284 #address-cells = <1>;
285 #size-cells = <0>;
286
287 port@0 {
288 reg = <0>;
289 adv7123_in: endpoint {
290 remote-endpoint = <&du_out_rgb>;
291 };
292 };
293 port@1 {
294 reg = <1>;
295 adv7123_out: endpoint {
296 remote-endpoint = <&vga_in>;
297 };
298 };
299 };
300 };
301
302 x12_clk: x12 {
303 compatible = "fixed-clock";
304 #clock-cells = <0>;
305 clock-frequency = <24576000>;
306 };
307
308 /* External DU dot clocks */
309 x21_clk: x21-clock {
310 compatible = "fixed-clock";
311 #clock-cells = <0>;
312 clock-frequency = <33000000>;
313 };
314
315 x22_clk: x22-clock {
316 compatible = "fixed-clock";
317 #clock-cells = <0>;
318 clock-frequency = <33000000>;
319 };
320
321 x23_clk: x23-clock {
322 compatible = "fixed-clock";
323 #clock-cells = <0>;
324 clock-frequency = <25000000>;
325 };
326 };
327
328 &a57_0 {
329 cpu-supply = <&dvfs>;
330 };
331
332 &audio_clk_a {
333 clock-frequency = <22579200>;
334 };
335
336 &avb {
337 pinctrl-0 = <&avb_pins>;
338 pinctrl-names = "default";
339 phy-handle = <&phy0>;
340 tx-internal-delay-ps = <2000>;
341 status = "okay";
342
343 phy0: ethernet-phy@0 {
344 compatible = "ethernet-phy-id0022.1622",
345 "ethernet-phy-ieee802.3-c22";
346 rxc-skew-ps = <1500>;
347 reg = <0>;
348 interrupt-parent = <&gpio2>;
349 interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
350 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
351 };
352 };
353
354 &csi20 {
355 status = "okay";
356
357 ports {
358 port@0 {
359 csi20_in: endpoint {
360 clock-lanes = <0>;
361 data-lanes = <1>;
362 remote-endpoint = <&adv7482_txb>;
363 };
364 };
365 };
366 };
367
368 &csi40 {
369 status = "okay";
370
371 ports {
372 port@0 {
373 csi40_in: endpoint {
374 clock-lanes = <0>;
375 data-lanes = <1 2 3 4>;
376 remote-endpoint = <&adv7482_txa>;
377 };
378 };
379 };
380 };
381
382 &du {
383 pinctrl-0 = <&du_pins>;
384 pinctrl-names = "default";
385 status = "okay";
386
387 ports {
388 port@0 {
389 du_out_rgb: endpoint {
390 remote-endpoint = <&adv7123_in>;
391 };
392 };
393 };
394 };
395
396 &ehci0 {
397 dr_mode = "otg";
398 status = "okay";
399 };
400
401 &ehci1 {
402 status = "okay";
403 };
404
405 &extalr_clk {
406 clock-frequency = <32768>;
407 };
408
409 &hdmi0 {
410 status = "okay";
411
412 ports {
413 port@1 {
414 reg = <1>;
415 rcar_dw_hdmi0_out: endpoint {
416 remote-endpoint = <&hdmi0_con>;
417 };
418 };
419 port@2 {
420 reg = <2>;
421 dw_hdmi0_snd_in: endpoint {
422 remote-endpoint = <&rsnd_endpoint1>;
423 };
424 };
425 };
426 };
427
428 #ifdef SOC_HAS_HDMI1
429 &hdmi1 {
430 status = "okay";
431
432 ports {
433 port@1 {
434 reg = <1>;
435 rcar_dw_hdmi1_out: endpoint {
436 remote-endpoint = <&hdmi1_con>;
437 };
438 };
439 port@2 {
440 reg = <2>;
441 dw_hdmi1_snd_in: endpoint {
442 remote-endpoint = <&rsnd_endpoint2>;
443 };
444 };
445 };
446 };
447
448 &hdmi1_con {
449 remote-endpoint = <&rcar_dw_hdmi1_out>;
450 };
451 #endif /* SOC_HAS_HDMI1 */
452
453 &hscif1 {
454 pinctrl-0 = <&hscif1_pins>;
455 pinctrl-names = "default";
456
457 uart-has-rtscts;
458 /* Please only enable hscif1 or scif1 */
459 status = "okay";
460 };
461
462 &hsusb {
463 dr_mode = "otg";
464 status = "okay";
465 };
466
467 &i2c2 {
468 pinctrl-0 = <&i2c2_pins>;
469 pinctrl-names = "default";
470
471 status = "okay";
472
473 clock-frequency = <100000>;
474
475 ak4613: codec@10 {
476 compatible = "asahi-kasei,ak4613";
477 #sound-dai-cells = <0>;
478 reg = <0x10>;
479 clocks = <&rcar_sound 3>;
480
481 asahi-kasei,in1-single-end;
482 asahi-kasei,in2-single-end;
483 asahi-kasei,out1-single-end;
484 asahi-kasei,out2-single-end;
485 asahi-kasei,out3-single-end;
486 asahi-kasei,out4-single-end;
487 asahi-kasei,out5-single-end;
488 asahi-kasei,out6-single-end;
489
490 port {
491 ak4613_endpoint: endpoint {
492 remote-endpoint = <&rsnd_endpoint0>;
493 };
494 };
495 };
496
497 cs2000: clk_multiplier@4f {
498 #clock-cells = <0>;
499 compatible = "cirrus,cs2000-cp";
500 reg = <0x4f>;
501 clocks = <&audio_clkout>, <&x12_clk>;
502 clock-names = "clk_in", "ref_clk";
503
504 assigned-clocks = <&cs2000>;
505 assigned-clock-rates = <24576000>; /* 1/1 divide */
506 };
507 };
508
509 &i2c4 {
510 status = "okay";
511
512 pca9654: gpio@20 {
513 compatible = "onnn,pca9654";
514 reg = <0x20>;
515 gpio-controller;
516 #gpio-cells = <2>;
517 };
518
519 video-receiver@70 {
520 compatible = "adi,adv7482";
521 reg = <0x70 0x71 0x72 0x73 0x74 0x75
522 0x60 0x61 0x62 0x63 0x64 0x65>;
523 reg-names = "main", "dpll", "cp", "hdmi", "edid", "repeater",
524 "infoframe", "cbus", "cec", "sdp", "txa", "txb" ;
525
526 interrupt-parent = <&gpio6>;
527 interrupt-names = "intrq1", "intrq2";
528 interrupts = <30 IRQ_TYPE_LEVEL_LOW>,
529 <31 IRQ_TYPE_LEVEL_LOW>;
530
531 ports {
532 #address-cells = <1>;
533 #size-cells = <0>;
534
535 port@7 {
536 reg = <7>;
537
538 adv7482_ain7: endpoint {
539 remote-endpoint = <&cvbs_con>;
540 };
541 };
542
543 port@8 {
544 reg = <8>;
545
546 adv7482_hdmi: endpoint {
547 remote-endpoint = <&hdmi_in_con>;
548 };
549 };
550
551 port@a {
552 reg = <10>;
553
554 adv7482_txa: endpoint {
555 clock-lanes = <0>;
556 data-lanes = <1 2 3 4>;
557 remote-endpoint = <&csi40_in>;
558 };
559 };
560
561 port@b {
562 reg = <11>;
563
564 adv7482_txb: endpoint {
565 clock-lanes = <0>;
566 data-lanes = <1>;
567 remote-endpoint = <&csi20_in>;
568 };
569 };
570 };
571 };
572
573 csa_vdd: adc@7c {
574 compatible = "maxim,max9611";
575 reg = <0x7c>;
576
577 shunt-resistor-micro-ohms = <5000>;
578 };
579
580 csa_dvfs: adc@7f {
581 compatible = "maxim,max9611";
582 reg = <0x7f>;
583
584 shunt-resistor-micro-ohms = <5000>;
585 };
586 };
587
588 &i2c_dvfs {
589 status = "okay";
590
591 clock-frequency = <400000>;
592
593 pmic: pmic@30 {
594 pinctrl-0 = <&irq0_pins>;
595 pinctrl-names = "default";
596
597 compatible = "rohm,bd9571mwv";
598 reg = <0x30>;
599 interrupt-parent = <&intc_ex>;
600 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
601 interrupt-controller;
602 #interrupt-cells = <2>;
603 gpio-controller;
604 #gpio-cells = <2>;
605 rohm,ddr-backup-power = <0xf>;
606 rohm,rstbmode-level;
607
608 regulators {
609 dvfs: dvfs {
610 regulator-name = "dvfs";
611 regulator-min-microvolt = <750000>;
612 regulator-max-microvolt = <1030000>;
613 regulator-boot-on;
614 regulator-always-on;
615 };
616 };
617 };
618
619 eeprom@50 {
620 compatible = "rohm,br24t01", "atmel,24c01";
621 reg = <0x50>;
622 pagesize = <8>;
623 };
624 };
625
626 &ohci0 {
627 dr_mode = "otg";
628 status = "okay";
629 };
630
631 &ohci1 {
632 status = "okay";
633 };
634
635 &pcie_bus_clk {
636 clock-frequency = <100000000>;
637 };
638
639 &pciec0 {
640 status = "okay";
641 };
642
643 &pciec1 {
644 status = "okay";
645 };
646
647 &pfc {
648 pinctrl-0 = <&scif_clk_pins>;
649 pinctrl-names = "default";
650
651 avb_pins: avb {
652 mux {
653 groups = "avb_link", "avb_mdio", "avb_mii";
654 function = "avb";
655 };
656
657 pins_mdio {
658 groups = "avb_mdio";
659 drive-strength = <24>;
660 };
661
662 pins_mii_tx {
663 pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0",
664 "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3";
665 drive-strength = <12>;
666 };
667 };
668
669 du_pins: du {
670 groups = "du_rgb888", "du_sync", "du_oddf", "du_clk_out_0";
671 function = "du";
672 };
673
674 hscif1_pins: hscif1 {
675 groups = "hscif1_data_a", "hscif1_ctrl_a";
676 function = "hscif1";
677 };
678
679 i2c2_pins: i2c2 {
680 groups = "i2c2_a";
681 function = "i2c2";
682 };
683
684 irq0_pins: irq0 {
685 groups = "intc_ex_irq0";
686 function = "intc_ex";
687 };
688
689 keys_pins: keys {
690 pins = "GP_5_17", "GP_5_20", "GP_5_22";
691 bias-pull-up;
692 };
693
694 pwm1_pins: pwm1 {
695 groups = "pwm1_a";
696 function = "pwm1";
697 };
698
699 scif1_pins: scif1 {
700 groups = "scif1_data_a", "scif1_ctrl";
701 function = "scif1";
702 };
703
704 scif2_pins: scif2 {
705 groups = "scif2_data_a";
706 function = "scif2";
707 };
708
709 scif_clk_pins: scif_clk {
710 groups = "scif_clk_a";
711 function = "scif_clk";
712 };
713
714 sdhi0_pins: sd0 {
715 groups = "sdhi0_data4", "sdhi0_ctrl";
716 function = "sdhi0";
717 power-source = <3300>;
718 };
719
720 sdhi0_pins_uhs: sd0_uhs {
721 groups = "sdhi0_data4", "sdhi0_ctrl";
722 function = "sdhi0";
723 power-source = <1800>;
724 };
725
726 sdhi2_pins: sd2 {
727 groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
728 function = "sdhi2";
729 power-source = <1800>;
730 };
731
732 sdhi3_pins: sd3 {
733 groups = "sdhi3_data4", "sdhi3_ctrl";
734 function = "sdhi3";
735 power-source = <3300>;
736 };
737
738 sdhi3_pins_uhs: sd3_uhs {
739 groups = "sdhi3_data4", "sdhi3_ctrl";
740 function = "sdhi3";
741 power-source = <1800>;
742 };
743
744 sound_pins: sound {
745 groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
746 function = "ssi";
747 };
748
749 sound_clk_pins: sound_clk {
750 groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",
751 "audio_clkout_a", "audio_clkout3_a";
752 function = "audio_clk";
753 };
754
755 usb0_pins: usb0 {
756 groups = "usb0";
757 function = "usb0";
758 };
759
760 usb1_pins: usb1 {
761 mux {
762 groups = "usb1";
763 function = "usb1";
764 };
765
766 ovc {
767 pins = "GP_6_27";
768 bias-pull-up;
769 };
770
771 pwen {
772 pins = "GP_6_26";
773 bias-pull-down;
774 };
775 };
776
777 usb30_pins: usb30 {
778 groups = "usb30";
779 function = "usb30";
780 };
781 };
782
783 &pwm1 {
784 pinctrl-0 = <&pwm1_pins>;
785 pinctrl-names = "default";
786
787 status = "okay";
788 };
789
790 &rcar_sound {
791 pinctrl-0 = <&sound_pins>, <&sound_clk_pins>;
792 pinctrl-names = "default";
793
794 /* Single DAI */
795 #sound-dai-cells = <0>;
796
797 /* audio_clkout0/1/2/3 */
798 #clock-cells = <1>;
799 clock-frequency = <12288000 11289600>;
800
801 status = "okay";
802
803 /* update <audio_clk_b> to <cs2000> */
804 clocks = <&cpg CPG_MOD 1005>,
805 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
806 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
807 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
808 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
809 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
810 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
811 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
812 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
813 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
814 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
815 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
816 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
817 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
818 <&audio_clk_a>, <&cs2000>,
819 <&audio_clk_c>,
820 <&cpg CPG_CORE CPG_AUDIO_CLK_I>;
821
822 ports {
823 #address-cells = <1>;
824 #size-cells = <0>;
825 rsnd_port0: port@0 {
826 reg = <0>;
827 rsnd_endpoint0: endpoint {
828 remote-endpoint = <&ak4613_endpoint>;
829
830 dai-format = "left_j";
831 bitclock-master = <&rsnd_endpoint0>;
832 frame-master = <&rsnd_endpoint0>;
833
834 playback = <&ssi0>, <&src0>, <&dvc0>;
835 capture = <&ssi1>, <&src1>, <&dvc1>;
836 };
837 };
838
839 rsnd_port1: port@1 {
840 reg = <1>;
841 rsnd_endpoint1: endpoint {
842 remote-endpoint = <&dw_hdmi0_snd_in>;
843
844 dai-format = "i2s";
845 bitclock-master = <&rsnd_endpoint1>;
846 frame-master = <&rsnd_endpoint1>;
847
848 playback = <&ssi2>;
849 };
850 };
851
852 #ifdef SOC_HAS_HDMI1
853 rsnd_port2: port@2 {
854 reg = <2>;
855 rsnd_endpoint2: endpoint {
856 remote-endpoint = <&dw_hdmi1_snd_in>;
857
858 dai-format = "i2s";
859 bitclock-master = <&rsnd_endpoint2>;
860 frame-master = <&rsnd_endpoint2>;
861
862 playback = <&ssi3>;
863 };
864 };
865 #endif /* SOC_HAS_HDMI1 */
866 };
867 };
868
869 &rpc {
870 /* Left disabled. To be enabled by firmware when unlocked. */
871
872 flash@0 {
873 compatible = "cypress,hyperflash", "cfi-flash";
874 reg = <0>;
875
876 partitions {
877 compatible = "fixed-partitions";
878 #address-cells = <1>;
879 #size-cells = <1>;
880
881 bootparam@0 {
882 reg = <0x00000000 0x040000>;
883 read-only;
884 };
885 bl2@40000 {
886 reg = <0x00040000 0x140000>;
887 read-only;
888 };
889 cert_header_sa6@180000 {
890 reg = <0x00180000 0x040000>;
891 read-only;
892 };
893 bl31@1c0000 {
894 reg = <0x001c0000 0x040000>;
895 read-only;
896 };
897 tee@200000 {
898 reg = <0x00200000 0x440000>;
899 read-only;
900 };
901 uboot@640000 {
902 reg = <0x00640000 0x100000>;
903 read-only;
904 };
905 dtb@740000 {
906 reg = <0x00740000 0x080000>;
907 };
908 kernel@7c0000 {
909 reg = <0x007c0000 0x1400000>;
910 };
911 user@1bc0000 {
912 reg = <0x01bc0000 0x2440000>;
913 };
914 };
915 };
916 };
917
918 &rwdt {
919 timeout-sec = <60>;
920 status = "okay";
921 };
922
923 #ifdef SOC_HAS_SATA
924 &sata {
925 status = "okay";
926 };
927 #endif /* SOC_HAS_SATA */
928
929 &scif1 {
930 pinctrl-0 = <&scif1_pins>;
931 pinctrl-names = "default";
932
933 uart-has-rtscts;
934 /* Please only enable hscif1 or scif1 */
935 /* status = "okay"; */
936 };
937
938 &scif2 {
939 pinctrl-0 = <&scif2_pins>;
940 pinctrl-names = "default";
941
942 status = "okay";
943 };
944
945 &scif_clk {
946 clock-frequency = <14745600>;
947 };
948
949 &sdhi0 {
950 pinctrl-0 = <&sdhi0_pins>;
951 pinctrl-1 = <&sdhi0_pins_uhs>;
952 pinctrl-names = "default", "state_uhs";
953
954 vmmc-supply = <&vcc_sdhi0>;
955 vqmmc-supply = <&vccq_sdhi0>;
956 cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
957 wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
958 bus-width = <4>;
959 sd-uhs-sdr50;
960 sd-uhs-sdr104;
961 status = "okay";
962 };
963
964 &sdhi2 {
965 /* used for on-board 8bit eMMC */
966 pinctrl-0 = <&sdhi2_pins>;
967 pinctrl-1 = <&sdhi2_pins>;
968 pinctrl-names = "default", "state_uhs";
969
970 vmmc-supply = <®_3p3v>;
971 vqmmc-supply = <®_1p8v>;
972 bus-width = <8>;
973 mmc-hs200-1_8v;
974 mmc-hs400-1_8v;
975 no-sd;
976 no-sdio;
977 non-removable;
978 fixed-emmc-driver-type = <1>;
979 full-pwr-cycle-in-suspend;
980 status = "okay";
981 };
982
983 &sdhi3 {
984 pinctrl-0 = <&sdhi3_pins>;
985 pinctrl-1 = <&sdhi3_pins_uhs>;
986 pinctrl-names = "default", "state_uhs";
987
988 vmmc-supply = <&vcc_sdhi3>;
989 vqmmc-supply = <&vccq_sdhi3>;
990 cd-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
991 wp-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;
992 bus-width = <4>;
993 sd-uhs-sdr50;
994 sd-uhs-sdr104;
995 status = "okay";
996 };
997
998 &ssi1 {
999 shared-pin;
1000 };
1001
1002 &usb_extal_clk {
1003 clock-frequency = <50000000>;
1004 };
1005
1006 &usb2_phy0 {
1007 pinctrl-0 = <&usb0_pins>;
1008 pinctrl-names = "default";
1009
1010 vbus-supply = <&vbus0_usb2>;
1011 status = "okay";
1012 };
1013
1014 &usb2_phy1 {
1015 pinctrl-0 = <&usb1_pins>;
1016 pinctrl-names = "default";
1017
1018 status = "okay";
1019 };
1020
1021 &usb3_peri0 {
1022 phys = <&usb3_phy0>;
1023 phy-names = "usb";
1024
1025 companion = <&xhci0>;
1026
1027 status = "okay";
1028 };
1029
1030 &usb3_phy0 {
1031 status = "okay";
1032 };
1033
1034 &usb3s0_clk {
1035 clock-frequency = <100000000>;
1036 };
1037
1038 &vin0 {
1039 status = "okay";
1040 };
1041
1042 &vin1 {
1043 status = "okay";
1044 };
1045
1046 &vin2 {
1047 status = "okay";
1048 };
1049
1050 &vin3 {
1051 status = "okay";
1052 };
1053
1054 &vin4 {
1055 status = "okay";
1056 };
1057
1058 &vin5 {
1059 status = "okay";
1060 };
1061
1062 &vin6 {
1063 status = "okay";
1064 };
1065
1066 &vin7 {
1067 status = "okay";
1068 };
1069
1070 &xhci0 {
1071 pinctrl-0 = <&usb30_pins>;
1072 pinctrl-names = "default";
1073
1074 status = "okay";
1075 };
1076
1077 #ifdef SOC_HAS_USB2_CH2
1078 &ehci2 {
1079 status = "okay";
1080 };
1081
1082 &ohci2 {
1083 status = "okay";
1084 };
1085
1086 &pfc {
1087 usb2_pins: usb2 {
1088 groups = "usb2";
1089 function = "usb2";
1090 };
1091 };
1092
1093 &usb2_phy2 {
1094 pinctrl-0 = <&usb2_pins>;
1095 pinctrl-names = "default";
1096
1097 status = "okay";
1098 };
1099 #endif /* SOC_HAS_USB2_CH2 */
Cache object: bccbeac777fae06f3dcb8ca4386a3e7c
|