The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/src/arm64/renesas/ulcb.dtsi

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    1 // SPDX-License-Identifier: GPL-2.0
    2 /*
    3  * Device Tree Source for the R-Car Gen3 ULCB board
    4  *
    5  * Copyright (C) 2016 Renesas Electronics Corp.
    6  * Copyright (C) 2016 Cogent Embedded, Inc.
    7  */
    8 
    9 /*
   10  * SSI-AK4613
   11  *      aplay   -D plughw:0,0 xxx.wav
   12  *      arecord -D plughw:0,0 xxx.wav
   13  * SSI-HDMI
   14  *      aplay   -D plughw:0,1 xxx.wav
   15  */
   16 
   17 #include <dt-bindings/gpio/gpio.h>
   18 #include <dt-bindings/input/input.h>
   19 
   20 / {
   21         model = "Renesas R-Car Gen3 ULCB board";
   22 
   23         aliases {
   24                 serial0 = &scif2;
   25                 ethernet0 = &avb;
   26                 mmc0 = &sdhi2;
   27                 mmc1 = &sdhi0;
   28         };
   29 
   30         chosen {
   31                 bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
   32                 stdout-path = "serial0:115200n8";
   33         };
   34 
   35         audio_clkout: audio-clkout {
   36                 /*
   37                  * This is same as <&rcar_sound 0>
   38                  * but needed to avoid cs2000/rcar_sound probe dead-lock
   39                  */
   40                 compatible = "fixed-clock";
   41                 #clock-cells = <0>;
   42                 clock-frequency = <12288000>;
   43         };
   44 
   45         hdmi0-out {
   46                 compatible = "hdmi-connector";
   47                 type = "a";
   48 
   49                 port {
   50                         hdmi0_con: endpoint {
   51                                 remote-endpoint = <&rcar_dw_hdmi0_out>;
   52                         };
   53                 };
   54         };
   55 
   56         keyboard {
   57                 compatible = "gpio-keys";
   58 
   59                 key-1 {
   60                         linux,code = <KEY_1>;
   61                         label = "SW3";
   62                         wakeup-source;
   63                         debounce-interval = <20>;
   64                         gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
   65                 };
   66         };
   67 
   68         leds {
   69                 compatible = "gpio-leds";
   70 
   71                 led5 {
   72                         gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
   73                 };
   74                 led6 {
   75                         gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
   76                 };
   77         };
   78 
   79         reg_1p8v: regulator-1p8v {
   80                 compatible = "regulator-fixed";
   81                 regulator-name = "fixed-1.8V";
   82                 regulator-min-microvolt = <1800000>;
   83                 regulator-max-microvolt = <1800000>;
   84                 regulator-boot-on;
   85                 regulator-always-on;
   86         };
   87 
   88         reg_3p3v: regulator-3p3v {
   89                 compatible = "regulator-fixed";
   90                 regulator-name = "fixed-3.3V";
   91                 regulator-min-microvolt = <3300000>;
   92                 regulator-max-microvolt = <3300000>;
   93                 regulator-boot-on;
   94                 regulator-always-on;
   95         };
   96 
   97         sound_card: sound {
   98                 compatible = "audio-graph-card2";
   99                 label = "rcar-sound";
  100 
  101                 links = <&rsnd_port0    /* ak4613 */
  102                          &rsnd_port1    /* HDMI0  */
  103                         >;
  104         };
  105 
  106         vcc_sdhi0: regulator-vcc-sdhi0 {
  107                 compatible = "regulator-fixed";
  108 
  109                 regulator-name = "SDHI0 Vcc";
  110                 regulator-min-microvolt = <3300000>;
  111                 regulator-max-microvolt = <3300000>;
  112 
  113                 gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
  114                 enable-active-high;
  115         };
  116 
  117         vccq_sdhi0: regulator-vccq-sdhi0 {
  118                 compatible = "regulator-gpio";
  119 
  120                 regulator-name = "SDHI0 VccQ";
  121                 regulator-min-microvolt = <1800000>;
  122                 regulator-max-microvolt = <3300000>;
  123 
  124                 gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
  125                 gpios-states = <1>;
  126                 states = <3300000 1>, <1800000 0>;
  127         };
  128 
  129         x12_clk: x12 {
  130                 compatible = "fixed-clock";
  131                 #clock-cells = <0>;
  132                 clock-frequency = <24576000>;
  133         };
  134 
  135         x23_clk: x23-clock {
  136                 compatible = "fixed-clock";
  137                 #clock-cells = <0>;
  138                 clock-frequency = <25000000>;
  139         };
  140 };
  141 
  142 &a57_0 {
  143         cpu-supply = <&dvfs>;
  144 };
  145 
  146 &audio_clk_a {
  147         clock-frequency = <22579200>;
  148 };
  149 
  150 &avb {
  151         pinctrl-0 = <&avb_pins>;
  152         pinctrl-names = "default";
  153         phy-handle = <&phy0>;
  154         tx-internal-delay-ps = <2000>;
  155         status = "okay";
  156 
  157         phy0: ethernet-phy@0 {
  158                 compatible = "ethernet-phy-id0022.1622",
  159                              "ethernet-phy-ieee802.3-c22";
  160                 rxc-skew-ps = <1500>;
  161                 reg = <0>;
  162                 interrupt-parent = <&gpio2>;
  163                 interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
  164                 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
  165         };
  166 };
  167 
  168 &du {
  169         status = "okay";
  170 };
  171 
  172 &ehci1 {
  173         status = "okay";
  174 };
  175 
  176 &extal_clk {
  177         clock-frequency = <16666666>;
  178 };
  179 
  180 &extalr_clk {
  181         clock-frequency = <32768>;
  182 };
  183 
  184 &hdmi0 {
  185         status = "okay";
  186 
  187         ports {
  188                 port@1 {
  189                         reg = <1>;
  190                         rcar_dw_hdmi0_out: endpoint {
  191                                 remote-endpoint = <&hdmi0_con>;
  192                         };
  193                 };
  194                 port@2 {
  195                         reg = <2>;
  196                         dw_hdmi0_snd_in: endpoint {
  197                                 remote-endpoint = <&rsnd_for_hdmi>;
  198                         };
  199                 };
  200         };
  201 };
  202 
  203 &i2c2 {
  204         pinctrl-0 = <&i2c2_pins>;
  205         pinctrl-names = "default";
  206 
  207         status = "okay";
  208 
  209         clock-frequency = <100000>;
  210 
  211         ak4613: codec@10 {
  212                 compatible = "asahi-kasei,ak4613";
  213                 #sound-dai-cells = <0>;
  214                 reg = <0x10>;
  215                 clocks = <&rcar_sound 3>;
  216 
  217                 asahi-kasei,in1-single-end;
  218                 asahi-kasei,in2-single-end;
  219                 asahi-kasei,out1-single-end;
  220                 asahi-kasei,out2-single-end;
  221                 asahi-kasei,out3-single-end;
  222                 asahi-kasei,out4-single-end;
  223                 asahi-kasei,out5-single-end;
  224                 asahi-kasei,out6-single-end;
  225 
  226                 port {
  227                         ak4613_endpoint: endpoint {
  228                                 remote-endpoint = <&rsnd_for_ak4613>;
  229                         };
  230                 };
  231         };
  232 
  233         cs2000: clk-multiplier@4f {
  234                 #clock-cells = <0>;
  235                 compatible = "cirrus,cs2000-cp";
  236                 reg = <0x4f>;
  237                 clocks = <&audio_clkout>, <&x12_clk>;
  238                 clock-names = "clk_in", "ref_clk";
  239 
  240                 assigned-clocks = <&cs2000>;
  241                 assigned-clock-rates = <24576000>; /* 1/1 divide */
  242         };
  243 };
  244 
  245 &i2c4 {
  246         status = "okay";
  247 
  248         clock-frequency = <400000>;
  249 
  250         versaclock5: clock-generator@6a {
  251                 compatible = "idt,5p49v5925";
  252                 reg = <0x6a>;
  253                 #clock-cells = <1>;
  254                 clocks = <&x23_clk>;
  255                 clock-names = "xin";
  256         };
  257 };
  258 
  259 &i2c_dvfs {
  260         status = "okay";
  261 
  262         clock-frequency = <400000>;
  263 
  264         pmic: pmic@30 {
  265                 pinctrl-0 = <&irq0_pins>;
  266                 pinctrl-names = "default";
  267 
  268                 compatible = "rohm,bd9571mwv";
  269                 reg = <0x30>;
  270                 interrupt-parent = <&intc_ex>;
  271                 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
  272                 interrupt-controller;
  273                 #interrupt-cells = <2>;
  274                 gpio-controller;
  275                 #gpio-cells = <2>;
  276                 rohm,ddr-backup-power = <0xf>;
  277                 rohm,rstbmode-pulse;
  278 
  279                 regulators {
  280                         dvfs: dvfs {
  281                                 regulator-name = "dvfs";
  282                                 regulator-min-microvolt = <750000>;
  283                                 regulator-max-microvolt = <1030000>;
  284                                 regulator-boot-on;
  285                                 regulator-always-on;
  286                         };
  287                 };
  288         };
  289 };
  290 
  291 &ohci1 {
  292         status = "okay";
  293 };
  294 
  295 &pfc {
  296         pinctrl-0 = <&scif_clk_pins>;
  297         pinctrl-names = "default";
  298 
  299         avb_pins: avb {
  300                 mux {
  301                         groups = "avb_link", "avb_mdio", "avb_mii";
  302                         function = "avb";
  303                 };
  304 
  305                 pins_mdio {
  306                         groups = "avb_mdio";
  307                         drive-strength = <24>;
  308                 };
  309 
  310                 pins_mii_tx {
  311                         pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0",
  312                                "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3";
  313                         drive-strength = <12>;
  314                 };
  315         };
  316 
  317         i2c2_pins: i2c2 {
  318                 groups = "i2c2_a";
  319                 function = "i2c2";
  320         };
  321 
  322         irq0_pins: irq0 {
  323                 groups = "intc_ex_irq0";
  324                 function = "intc_ex";
  325         };
  326 
  327         scif2_pins: scif2 {
  328                 groups = "scif2_data_a";
  329                 function = "scif2";
  330         };
  331 
  332         scif_clk_pins: scif_clk {
  333                 groups = "scif_clk_a";
  334                 function = "scif_clk";
  335         };
  336 
  337         sdhi0_pins: sd0 {
  338                 groups = "sdhi0_data4", "sdhi0_ctrl";
  339                 function = "sdhi0";
  340                 power-source = <3300>;
  341         };
  342 
  343         sdhi0_pins_uhs: sd0_uhs {
  344                 groups = "sdhi0_data4", "sdhi0_ctrl";
  345                 function = "sdhi0";
  346                 power-source = <1800>;
  347         };
  348 
  349         sdhi2_pins: sd2 {
  350                 groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
  351                 function = "sdhi2";
  352                 power-source = <1800>;
  353         };
  354 
  355         sound_pins: sound {
  356                 groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
  357                 function = "ssi";
  358         };
  359 
  360         sound_clk_pins: sound-clk {
  361                 groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",
  362                          "audio_clkout_a", "audio_clkout3_a";
  363                 function = "audio_clk";
  364         };
  365 
  366         usb1_pins: usb1 {
  367                 groups = "usb1";
  368                 function = "usb1";
  369         };
  370 };
  371 
  372 &rcar_sound {
  373         pinctrl-0 = <&sound_pins>, <&sound_clk_pins>;
  374         pinctrl-names = "default";
  375 
  376         /* Single DAI */
  377         #sound-dai-cells = <0>;
  378 
  379         /* audio_clkout0/1/2/3 */
  380         #clock-cells = <1>;
  381         clock-frequency = <12288000 11289600>;
  382 
  383         status = "okay";
  384 
  385         /* update <audio_clk_b> to <cs2000> */
  386         clocks = <&cpg CPG_MOD 1005>,
  387                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
  388                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
  389                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
  390                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
  391                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
  392                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
  393                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
  394                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
  395                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
  396                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
  397                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
  398                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
  399                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
  400                  <&audio_clk_a>, <&cs2000>,
  401                  <&audio_clk_c>,
  402                  <&cpg CPG_CORE CPG_AUDIO_CLK_I>;
  403 
  404         ports {
  405                 #address-cells = <1>;
  406                 #size-cells = <0>;
  407                 rsnd_port0: port@0 {
  408                         reg = <0>;
  409                         rsnd_for_ak4613: endpoint {
  410                                 remote-endpoint = <&ak4613_endpoint>;
  411                                 bitclock-master;
  412                                 frame-master;
  413                                 playback = <&ssi0>, <&src0>, <&dvc0>;
  414                                 capture = <&ssi1>, <&src1>, <&dvc1>;
  415                         };
  416                 };
  417                 rsnd_port1: port@1 {
  418                         reg = <1>;
  419                         rsnd_for_hdmi: endpoint {
  420                                 remote-endpoint = <&dw_hdmi0_snd_in>;
  421                                 bitclock-master;
  422                                 frame-master;
  423                                 playback = <&ssi2>;
  424                         };
  425                 };
  426         };
  427 };
  428 
  429 &rpc {
  430         /* Left disabled.  To be enabled by firmware when unlocked. */
  431 
  432         flash@0 {
  433                 compatible = "cypress,hyperflash", "cfi-flash";
  434                 reg = <0>;
  435 
  436                 partitions {
  437                         compatible = "fixed-partitions";
  438                         #address-cells = <1>;
  439                         #size-cells = <1>;
  440 
  441                         bootparam@0 {
  442                                 reg = <0x00000000 0x040000>;
  443                                 read-only;
  444                         };
  445                         bl2@40000 {
  446                                 reg = <0x00040000 0x140000>;
  447                                 read-only;
  448                         };
  449                         cert_header_sa6@180000 {
  450                                 reg = <0x00180000 0x040000>;
  451                                 read-only;
  452                         };
  453                         bl31@1c0000 {
  454                                 reg = <0x001c0000 0x040000>;
  455                                 read-only;
  456                         };
  457                         tee@200000 {
  458                                 reg = <0x00200000 0x440000>;
  459                                 read-only;
  460                         };
  461                         uboot@640000 {
  462                                 reg = <0x00640000 0x100000>;
  463                                 read-only;
  464                         };
  465                         dtb@740000 {
  466                                 reg = <0x00740000 0x080000>;
  467                         };
  468                         kernel@7c0000 {
  469                                 reg = <0x007c0000 0x1400000>;
  470                         };
  471                         user@1bc0000 {
  472                                 reg = <0x01bc0000 0x2440000>;
  473                         };
  474                 };
  475         };
  476 };
  477 
  478 &rwdt {
  479         timeout-sec = <60>;
  480         status = "okay";
  481 };
  482 
  483 &scif2 {
  484         pinctrl-0 = <&scif2_pins>;
  485         pinctrl-names = "default";
  486 
  487         status = "okay";
  488 };
  489 
  490 &scif_clk {
  491         clock-frequency = <14745600>;
  492 };
  493 
  494 &sdhi0 {
  495         pinctrl-0 = <&sdhi0_pins>;
  496         pinctrl-1 = <&sdhi0_pins_uhs>;
  497         pinctrl-names = "default", "state_uhs";
  498 
  499         vmmc-supply = <&vcc_sdhi0>;
  500         vqmmc-supply = <&vccq_sdhi0>;
  501         cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
  502         bus-width = <4>;
  503         sd-uhs-sdr50;
  504         sd-uhs-sdr104;
  505         status = "okay";
  506 };
  507 
  508 &sdhi2 {
  509         /* used for on-board 8bit eMMC */
  510         pinctrl-0 = <&sdhi2_pins>;
  511         pinctrl-1 = <&sdhi2_pins>;
  512         pinctrl-names = "default", "state_uhs";
  513 
  514         vmmc-supply = <&reg_3p3v>;
  515         vqmmc-supply = <&reg_1p8v>;
  516         bus-width = <8>;
  517         mmc-hs200-1_8v;
  518         mmc-hs400-1_8v;
  519         no-sd;
  520         no-sdio;
  521         non-removable;
  522         full-pwr-cycle-in-suspend;
  523         status = "okay";
  524 };
  525 
  526 &ssi1 {
  527         shared-pin;
  528 };
  529 
  530 &usb2_phy1 {
  531         pinctrl-0 = <&usb1_pins>;
  532         pinctrl-names = "default";
  533 
  534         status = "okay";
  535 };

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