Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/src/arm64/rockchip/rk3326-odroid-go2.dts
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1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 /* 3 * Copyright (c) 2019 Hardkernel Co., Ltd 4 * Copyright (c) 2020 Theobroma Systems Design und Consulting GmbH 5 */ 6 7 /dts-v1/; 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 11 #include "rk3326.dtsi" 12 13 / { 14 model = "ODROID-GO Advance"; 15 compatible = "hardkernel,rk3326-odroid-go2", "rockchip,rk3326"; 16 17 aliases { 18 mmc0 = &sdmmc; 19 }; 20 21 chosen { 22 stdout-path = "serial2:115200n8"; 23 }; 24 25 adc-joystick { 26 compatible = "adc-joystick"; 27 io-channels = <&saradc 1>, 28 <&saradc 2>; 29 #address-cells = <1>; 30 #size-cells = <0>; 31 32 axis@0 { 33 reg = <0>; 34 abs-flat = <10>; 35 abs-fuzz = <10>; 36 abs-range = <172 772>; 37 linux,code = <ABS_X>; 38 }; 39 40 axis@1 { 41 reg = <1>; 42 abs-flat = <10>; 43 abs-fuzz = <10>; 44 abs-range = <278 815>; 45 linux,code = <ABS_Y>; 46 }; 47 }; 48 49 backlight: backlight { 50 compatible = "pwm-backlight"; 51 power-supply = <&vcc_bl>; 52 pwms = <&pwm1 0 25000 0>; 53 }; 54 55 gpio-keys { 56 compatible = "gpio-keys"; 57 pinctrl-names = "default"; 58 pinctrl-0 = <&btn_pins>; 59 60 /* 61 * *** ODROIDGO2-Advance Switch layout *** 62 * |------------------------------------------------| 63 * | sw15 sw16 | 64 * |------------------------------------------------| 65 * | sw1 |-------------------| sw8 | 66 * | sw3 sw4 | | sw7 sw5 | 67 * | sw2 | LCD Display | sw6 | 68 * | | | | 69 * | |-------------------| | 70 * | sw9 sw10 sw11 sw12 sw13 sw14 | 71 * |------------------------------------------------| 72 */ 73 74 button-sw1 { 75 gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_LOW>; 76 label = "DPAD-UP"; 77 linux,code = <BTN_DPAD_UP>; 78 }; 79 button-sw2 { 80 gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_LOW>; 81 label = "DPAD-DOWN"; 82 linux,code = <BTN_DPAD_DOWN>; 83 }; 84 button-sw3 { 85 gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_LOW>; 86 label = "DPAD-LEFT"; 87 linux,code = <BTN_DPAD_LEFT>; 88 }; 89 button-sw4 { 90 gpios = <&gpio1 RK_PB7 GPIO_ACTIVE_LOW>; 91 label = "DPAD-RIGHT"; 92 linux,code = <BTN_DPAD_RIGHT>; 93 }; 94 button-sw5 { 95 gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_LOW>; 96 label = "BTN-A"; 97 linux,code = <BTN_EAST>; 98 }; 99 button-sw6 { 100 gpios = <&gpio1 RK_PA5 GPIO_ACTIVE_LOW>; 101 label = "BTN-B"; 102 linux,code = <BTN_SOUTH>; 103 }; 104 button-sw7 { 105 gpios = <&gpio1 RK_PA6 GPIO_ACTIVE_LOW>; 106 label = "BTN-Y"; 107 linux,code = <BTN_WEST>; 108 }; 109 button-sw8 { 110 gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_LOW>; 111 label = "BTN-X"; 112 linux,code = <BTN_NORTH>; 113 }; 114 button-sw9 { 115 gpios = <&gpio2 RK_PA0 GPIO_ACTIVE_LOW>; 116 label = "F1"; 117 linux,code = <BTN_TRIGGER_HAPPY1>; 118 }; 119 button-sw10 { 120 gpios = <&gpio2 RK_PA1 GPIO_ACTIVE_LOW>; 121 label = "F2"; 122 linux,code = <BTN_TRIGGER_HAPPY2>; 123 }; 124 button-sw11 { 125 gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_LOW>; 126 label = "F3"; 127 linux,code = <BTN_TRIGGER_HAPPY3>; 128 }; 129 button-sw12 { 130 gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_LOW>; 131 label = "F4"; 132 linux,code = <BTN_TRIGGER_HAPPY4>; 133 }; 134 button-sw13 { 135 gpios = <&gpio2 RK_PA4 GPIO_ACTIVE_LOW>; 136 label = "F5"; 137 linux,code = <BTN_TRIGGER_HAPPY5>; 138 }; 139 button-sw14 { 140 gpios = <&gpio2 RK_PA5 GPIO_ACTIVE_LOW>; 141 label = "F6"; 142 linux,code = <BTN_TRIGGER_HAPPY6>; 143 }; 144 button-sw15 { 145 gpios = <&gpio2 RK_PA6 GPIO_ACTIVE_LOW>; 146 label = "TOP-LEFT"; 147 linux,code = <BTN_TL>; 148 }; 149 button-sw16 { 150 gpios = <&gpio2 RK_PA7 GPIO_ACTIVE_LOW>; 151 label = "TOP-RIGHT"; 152 linux,code = <BTN_TR>; 153 }; 154 }; 155 156 leds: gpio-leds { 157 compatible = "gpio-leds"; 158 pinctrl-names = "default"; 159 pinctrl-0 = <&blue_led_pin>; 160 161 blue_led: led-0 { 162 label = "blue:heartbeat"; 163 gpios = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>; 164 linux,default-trigger = "heartbeat"; 165 }; 166 }; 167 168 rk817-sound { 169 compatible = "simple-audio-card"; 170 simple-audio-card,name = "Analog"; 171 simple-audio-card,format = "i2s"; 172 simple-audio-card,hp-det-gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>; 173 simple-audio-card,mclk-fs = <256>; 174 simple-audio-card,widgets = 175 "Microphone", "Mic Jack", 176 "Headphone", "Headphones", 177 "Speaker", "Speaker"; 178 simple-audio-card,routing = 179 "MICL", "Mic Jack", 180 "Headphones", "HPOL", 181 "Headphones", "HPOR", 182 "Speaker", "SPKO"; 183 184 simple-audio-card,codec { 185 sound-dai = <&rk817>; 186 }; 187 188 simple-audio-card,cpu { 189 sound-dai = <&i2s1_2ch>; 190 }; 191 }; 192 193 vccsys: vccsys { 194 compatible = "regulator-fixed"; 195 regulator-name = "vcc3v8_sys"; 196 regulator-always-on; 197 regulator-min-microvolt = <3800000>; 198 regulator-max-microvolt = <3800000>; 199 }; 200 201 vcc_host: vcc_host { 202 compatible = "regulator-fixed"; 203 regulator-name = "vcc_host"; 204 regulator-min-microvolt = <5000000>; 205 regulator-max-microvolt = <5000000>; 206 207 gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; 208 enable-active-high; 209 regulator-always-on; 210 regulator-boot-on; 211 vin-supply = <&usb_midu>; 212 }; 213 }; 214 215 &cpu0 { 216 cpu-supply = <&vdd_arm>; 217 }; 218 219 &cpu1 { 220 cpu-supply = <&vdd_arm>; 221 }; 222 223 &cpu2 { 224 cpu-supply = <&vdd_arm>; 225 }; 226 227 &cpu3 { 228 cpu-supply = <&vdd_arm>; 229 }; 230 231 &cru { 232 assigned-clocks = <&cru PLL_NPLL>, 233 <&cru ACLK_BUS_PRE>, <&cru ACLK_PERI_PRE>, 234 <&cru HCLK_BUS_PRE>, <&cru HCLK_PERI_PRE>, 235 <&cru PCLK_BUS_PRE>, <&cru SCLK_GPU>, 236 <&cru PLL_CPLL>; 237 238 assigned-clock-rates = <1188000000>, 239 <200000000>, <200000000>, 240 <150000000>, <150000000>, 241 <100000000>, <200000000>, 242 <17000000>; 243 }; 244 245 &display_subsystem { 246 status = "okay"; 247 }; 248 249 &dsi { 250 status = "okay"; 251 252 ports { 253 mipi_out: port@1 { 254 reg = <1>; 255 256 mipi_out_panel: endpoint { 257 remote-endpoint = <&mipi_in_panel>; 258 }; 259 }; 260 }; 261 262 panel@0 { 263 compatible = "elida,kd35t133"; 264 reg = <0>; 265 backlight = <&backlight>; 266 iovcc-supply = <&vcc_lcd>; 267 reset-gpios = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>; 268 rotation = <270>; 269 vdd-supply = <&vcc_lcd>; 270 271 port { 272 mipi_in_panel: endpoint { 273 remote-endpoint = <&mipi_out_panel>; 274 }; 275 }; 276 }; 277 }; 278 279 &dsi_dphy { 280 status = "okay"; 281 }; 282 283 &gpu { 284 mali-supply = <&vdd_logic>; 285 status = "okay"; 286 }; 287 288 &i2c0 { 289 clock-frequency = <400000>; 290 i2c-scl-falling-time-ns = <16>; 291 i2c-scl-rising-time-ns = <280>; 292 status = "okay"; 293 294 rk817: pmic@20 { 295 compatible = "rockchip,rk817"; 296 reg = <0x20>; 297 interrupt-parent = <&gpio0>; 298 interrupts = <RK_PB2 IRQ_TYPE_LEVEL_LOW>; 299 clock-output-names = "rk808-clkout1", "xin32k"; 300 clock-names = "mclk"; 301 clocks = <&cru SCLK_I2S1_OUT>; 302 pinctrl-names = "default"; 303 pinctrl-0 = <&pmic_int>, <&i2s1_2ch_mclk>; 304 wakeup-source; 305 #clock-cells = <1>; 306 #sound-dai-cells = <0>; 307 308 vcc1-supply = <&vccsys>; 309 vcc2-supply = <&vccsys>; 310 vcc3-supply = <&vccsys>; 311 vcc4-supply = <&vccsys>; 312 vcc5-supply = <&vccsys>; 313 vcc6-supply = <&vccsys>; 314 vcc7-supply = <&vccsys>; 315 vcc8-supply = <&vccsys>; 316 317 regulators { 318 vdd_logic: DCDC_REG1 { 319 regulator-name = "vdd_logic"; 320 regulator-min-microvolt = <950000>; 321 regulator-max-microvolt = <1150000>; 322 regulator-ramp-delay = <6001>; 323 regulator-always-on; 324 regulator-boot-on; 325 326 regulator-state-mem { 327 regulator-on-in-suspend; 328 regulator-suspend-microvolt = <950000>; 329 }; 330 }; 331 332 vdd_arm: DCDC_REG2 { 333 regulator-name = "vdd_arm"; 334 regulator-min-microvolt = <950000>; 335 regulator-max-microvolt = <1350000>; 336 regulator-ramp-delay = <6001>; 337 regulator-always-on; 338 regulator-boot-on; 339 340 regulator-state-mem { 341 regulator-off-in-suspend; 342 regulator-suspend-microvolt = <950000>; 343 }; 344 }; 345 346 vcc_ddr: DCDC_REG3 { 347 regulator-name = "vcc_ddr"; 348 regulator-always-on; 349 regulator-boot-on; 350 351 regulator-state-mem { 352 regulator-on-in-suspend; 353 }; 354 }; 355 356 vcc_3v3: DCDC_REG4 { 357 regulator-name = "vcc_3v3"; 358 regulator-min-microvolt = <3300000>; 359 regulator-max-microvolt = <3300000>; 360 regulator-always-on; 361 regulator-boot-on; 362 363 regulator-state-mem { 364 regulator-off-in-suspend; 365 regulator-suspend-microvolt = <3300000>; 366 }; 367 }; 368 369 vcc_1v8: LDO_REG2 { 370 regulator-name = "vcc_1v8"; 371 regulator-min-microvolt = <1800000>; 372 regulator-max-microvolt = <1800000>; 373 regulator-always-on; 374 regulator-boot-on; 375 376 regulator-state-mem { 377 regulator-on-in-suspend; 378 regulator-suspend-microvolt = <1800000>; 379 }; 380 }; 381 382 vdd_1v0: LDO_REG3 { 383 regulator-name = "vdd_1v0"; 384 regulator-min-microvolt = <1000000>; 385 regulator-max-microvolt = <1000000>; 386 regulator-always-on; 387 regulator-boot-on; 388 389 regulator-state-mem { 390 regulator-on-in-suspend; 391 regulator-suspend-microvolt = <1000000>; 392 }; 393 }; 394 395 vcc3v3_pmu: LDO_REG4 { 396 regulator-name = "vcc3v3_pmu"; 397 regulator-min-microvolt = <3300000>; 398 regulator-max-microvolt = <3300000>; 399 regulator-always-on; 400 regulator-boot-on; 401 402 regulator-state-mem { 403 regulator-on-in-suspend; 404 regulator-suspend-microvolt = <3300000>; 405 }; 406 }; 407 408 vccio_sd: LDO_REG5 { 409 regulator-name = "vccio_sd"; 410 regulator-min-microvolt = <1800000>; 411 regulator-max-microvolt = <3300000>; 412 regulator-always-on; 413 regulator-boot-on; 414 415 regulator-state-mem { 416 regulator-on-in-suspend; 417 regulator-suspend-microvolt = <3300000>; 418 }; 419 }; 420 421 vcc_sd: LDO_REG6 { 422 regulator-name = "vcc_sd"; 423 regulator-min-microvolt = <3300000>; 424 regulator-max-microvolt = <3300000>; 425 regulator-boot-on; 426 427 regulator-state-mem { 428 regulator-on-in-suspend; 429 regulator-suspend-microvolt = <3300000>; 430 }; 431 }; 432 433 vcc_bl: LDO_REG7 { 434 regulator-name = "vcc_bl"; 435 regulator-min-microvolt = <3300000>; 436 regulator-max-microvolt = <3300000>; 437 438 regulator-state-mem { 439 regulator-off-in-suspend; 440 regulator-suspend-microvolt = <3300000>; 441 }; 442 }; 443 444 vcc_lcd: LDO_REG8 { 445 regulator-name = "vcc_lcd"; 446 regulator-min-microvolt = <2800000>; 447 regulator-max-microvolt = <2800000>; 448 449 regulator-state-mem { 450 regulator-off-in-suspend; 451 regulator-suspend-microvolt = <2800000>; 452 }; 453 }; 454 455 vcc_cam: LDO_REG9 { 456 regulator-name = "vcc_cam"; 457 regulator-min-microvolt = <3000000>; 458 regulator-max-microvolt = <3000000>; 459 460 regulator-state-mem { 461 regulator-off-in-suspend; 462 regulator-suspend-microvolt = <3000000>; 463 }; 464 }; 465 466 usb_midu: BOOST { 467 regulator-name = "usb_midu"; 468 regulator-min-microvolt = <5000000>; 469 regulator-max-microvolt = <5400000>; 470 regulator-always-on; 471 regulator-boot-on; 472 }; 473 }; 474 475 rk817_codec: codec { 476 rockchip,mic-in-differential; 477 }; 478 }; 479 }; 480 481 /* EXT Header(P2): 7(SCL:GPIO0.C2), 8(SDA:GPIO0.C3) */ 482 &i2c1 { 483 clock-frequency = <400000>; 484 status = "okay"; 485 }; 486 487 /* I2S 1 Channel Used */ 488 &i2s1_2ch { 489 status = "okay"; 490 }; 491 492 &io_domains { 493 vccio1-supply = <&vcc_3v3>; 494 vccio2-supply = <&vccio_sd>; 495 vccio3-supply = <&vcc_3v3>; 496 vccio4-supply = <&vcc_3v3>; 497 vccio5-supply = <&vcc_3v3>; 498 vccio6-supply = <&vcc_3v3>; 499 status = "okay"; 500 }; 501 502 &pmu_io_domains { 503 pmuio1-supply = <&vcc3v3_pmu>; 504 pmuio2-supply = <&vcc3v3_pmu>; 505 status = "okay"; 506 }; 507 508 &pwm1 { 509 status = "okay"; 510 }; 511 512 &saradc { 513 vref-supply = <&vcc_1v8>; 514 status = "okay"; 515 }; 516 517 &sdmmc { 518 cap-sd-highspeed; 519 card-detect-delay = <200>; 520 cd-gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_LOW>; /*[> CD GPIO <]*/ 521 sd-uhs-sdr12; 522 sd-uhs-sdr25; 523 sd-uhs-sdr50; 524 sd-uhs-sdr104; 525 vmmc-supply = <&vcc_sd>; 526 vqmmc-supply = <&vccio_sd>; 527 status = "okay"; 528 }; 529 530 &sfc { 531 pinctrl-0 = <&sfc_clk &sfc_cs0 &sfc_bus2>; 532 pinctrl-names = "default"; 533 #address-cells = <1>; 534 #size-cells = <0>; 535 status = "okay"; 536 537 flash@0 { 538 compatible = "jedec,spi-nor"; 539 reg = <0>; 540 spi-max-frequency = <108000000>; 541 spi-rx-bus-width = <2>; 542 spi-tx-bus-width = <1>; 543 }; 544 }; 545 546 &tsadc { 547 status = "okay"; 548 }; 549 550 &u2phy { 551 status = "okay"; 552 553 u2phy_host: host-port { 554 status = "okay"; 555 }; 556 557 u2phy_otg: otg-port { 558 status = "disabled"; 559 }; 560 }; 561 562 &usb20_otg { 563 status = "okay"; 564 }; 565 566 /* EXT Header(P2): 2(RXD:GPIO1.C0),3(TXD:.C1),4(CTS:.C2),5(RTS:.C3) */ 567 &uart1 { 568 pinctrl-names = "default"; 569 pinctrl-0 = <&uart1_xfer &uart1_cts>; 570 status = "okay"; 571 }; 572 573 &uart2 { 574 pinctrl-names = "default"; 575 pinctrl-0 = <&uart2m1_xfer>; 576 status = "okay"; 577 }; 578 579 &vopb { 580 status = "okay"; 581 }; 582 583 &vopb_mmu { 584 status = "okay"; 585 }; 586 587 &pinctrl { 588 btns { 589 btn_pins: btn-pins { 590 rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>, 591 <1 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>, 592 <1 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>, 593 <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>, 594 <1 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>, 595 <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>, 596 <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>, 597 <1 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>, 598 <2 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>, 599 <2 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>, 600 <2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>, 601 <2 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>, 602 <2 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>, 603 <2 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>, 604 <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>, 605 <2 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>; 606 }; 607 }; 608 609 headphone { 610 hp_det: hp-det { 611 rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_down>; 612 }; 613 }; 614 615 leds { 616 blue_led_pin: blue-led-pin { 617 rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; 618 }; 619 }; 620 621 pmic { 622 dc_det: dc-det { 623 rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; 624 }; 625 626 pmic_int: pmic-int { 627 rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>; 628 }; 629 630 soc_slppin_gpio: soc_slppin_gpio { 631 rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_output_low>; 632 }; 633 634 soc_slppin_rst: soc_slppin_rst { 635 rockchip,pins = <0 RK_PA4 2 &pcfg_pull_none>; 636 }; 637 638 soc_slppin_slp: soc_slppin_slp { 639 rockchip,pins = <0 RK_PA4 1 &pcfg_pull_none>; 640 }; 641 }; 642 };
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