The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/src/arm64/rockchip/rk3399-ficus.dts

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    1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
    2 /*
    3  * Copyright (c) 2018 Collabora Ltd.
    4  * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd.
    5  *
    6  * Schematics available at https://dl.vamrs.com/products/ficus/docs/hw
    7  */
    8 
    9 /dts-v1/;
   10 #include "rk3399-rock960.dtsi"
   11 
   12 / {
   13         model = "96boards RK3399 Ficus";
   14         compatible = "vamrs,ficus", "rockchip,rk3399";
   15 
   16         chosen {
   17                 stdout-path = "serial2:1500000n8";
   18         };
   19 
   20         clkin_gmac: external-gmac-clock {
   21                 compatible = "fixed-clock";
   22                 clock-frequency = <125000000>;
   23                 clock-output-names = "clkin_gmac";
   24                 #clock-cells = <0>;
   25         };
   26 
   27         leds {
   28                 compatible = "gpio-leds";
   29                 pinctrl-names = "default";
   30                 pinctrl-0 = <&user_led1_pin>, <&user_led2_pin>,
   31                             <&user_led3_pin>, <&user_led4_pin>,
   32                             <&wlan_led_pin>, <&bt_led_pin>;
   33 
   34                 user_led1: led-1 {
   35                         label = "red:user1";
   36                         gpios = <&gpio4 25 0>;
   37                         linux,default-trigger = "heartbeat";
   38                 };
   39 
   40                 user_led2: led-2 {
   41                         label = "red:user2";
   42                         gpios = <&gpio4 26 0>;
   43                         linux,default-trigger = "mmc0";
   44                 };
   45 
   46                 user_led3: led-3 {
   47                         label = "red:user3";
   48                         gpios = <&gpio4 30 0>;
   49                         linux,default-trigger = "mmc1";
   50                 };
   51 
   52                 user_led4: led-4 {
   53                         label = "red:user4";
   54                         gpios = <&gpio1 0 0>;
   55                         panic-indicator;
   56                         linux,default-trigger = "none";
   57                 };
   58 
   59                 wlan_active_led: led-5 {
   60                         label = "red:wlan";
   61                         gpios = <&gpio1 1 0>;
   62                         linux,default-trigger = "phy0tx";
   63                         default-state = "off";
   64                 };
   65 
   66                 bt_active_led: led-6 {
   67                         label = "red:bt";
   68                         gpios = <&gpio1 4 0>;
   69                         linux,default-trigger = "hci0-power";
   70                         default-state = "off";
   71                 };
   72         };
   73 };
   74 
   75 &gmac {
   76         assigned-clocks = <&cru SCLK_RMII_SRC>;
   77         assigned-clock-parents = <&clkin_gmac>;
   78         clock_in_out = "input";
   79         phy-supply = <&vcc3v3_sys>;
   80         phy-mode = "rgmii";
   81         pinctrl-names = "default";
   82         pinctrl-0 = <&rgmii_pins>;
   83         snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
   84         snps,reset-active-low;
   85         snps,reset-delays-us = <0 10000 50000>;
   86         tx_delay = <0x28>;
   87         rx_delay = <0x11>;
   88         status = "okay";
   89 };
   90 
   91 &pcie0 {
   92         ep-gpios = <&gpio4 RK_PD4 GPIO_ACTIVE_HIGH>;
   93 };
   94 
   95 &pinctrl {
   96         gmac {
   97                 rgmii_sleep_pins: rgmii-sleep-pins {
   98                         rockchip,pins =
   99                                 <3 RK_PB7 RK_FUNC_GPIO &pcfg_output_low>;
  100                 };
  101         };
  102 
  103         pcie {
  104                 pcie_drv: pcie-drv {
  105                         rockchip,pins =
  106                                 <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
  107                         };
  108         };
  109 
  110         usb2 {
  111                 host_vbus_drv: host-vbus-drv {
  112                         rockchip,pins =
  113                                 <4 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
  114                 };
  115         };
  116 
  117         leds {
  118                 user_led1_pin: user-led1-pin {
  119                         rockchip,pins =
  120                                 <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
  121                 };
  122 
  123                 user_led2_pin: user-led2-pin {
  124                         rockchip,pins =
  125                                 <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
  126                 };
  127 
  128                 user_led3_pin: user-led3-pin {
  129                         rockchip,pins =
  130                                 <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
  131                 };
  132 
  133                 user_led4_pin: user-led4-pin {
  134                         rockchip,pins =
  135                                 <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
  136                 };
  137 
  138                 wlan_led_pin: wlan-led-pin {
  139                         rockchip,pins =
  140                                 <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
  141                 };
  142 
  143                 bt_led_pin: bt-led-pin {
  144                         rockchip,pins =
  145                                 <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
  146                 };
  147         };
  148 };
  149 
  150 &spi1 {
  151         /* On both Low speed and High speed expansion */
  152         cs-gpios = <0>, <&gpio4 RK_PA6 0>, <&gpio4 RK_PA7 0>;
  153         status = "okay";
  154 };
  155 
  156 &usbdrd_dwc3_0 {
  157         dr_mode = "host";
  158 };
  159 
  160 &usbdrd_dwc3_1 {
  161         dr_mode = "host";
  162 };
  163 
  164 &vcc3v3_pcie {
  165         gpio = <&gpio1 24 GPIO_ACTIVE_HIGH>;
  166 };
  167 
  168 &vcc5v0_host {
  169         gpio = <&gpio4 27 GPIO_ACTIVE_HIGH>;
  170 };

Cache object: 141c8504074c3e61856cede12ef721b1


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