Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/src/arm64/rockchip/rk3399-puma.dtsi
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1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 /* 3 * Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH 4 */ 5 6 #include <dt-bindings/pwm/pwm.h> 7 #include "rk3399.dtsi" 8 #include "rk3399-opp.dtsi" 9 10 / { 11 aliases { 12 mmc0 = &sdhci; 13 }; 14 15 leds { 16 compatible = "gpio-leds"; 17 pinctrl-names = "default"; 18 pinctrl-0 = <&module_led_pin>; 19 20 module_led: led-0 { 21 label = "module_led"; 22 gpios = <&gpio2 RK_PD1 GPIO_ACTIVE_HIGH>; 23 linux,default-trigger = "heartbeat"; 24 panic-indicator; 25 }; 26 }; 27 28 extcon_usb3: extcon-usb3 { 29 compatible = "linux,extcon-usb-gpio"; 30 id-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_HIGH>; 31 pinctrl-names = "default"; 32 pinctrl-0 = <&usb3_id>; 33 }; 34 35 clkin_gmac: external-gmac-clock { 36 compatible = "fixed-clock"; 37 clock-frequency = <125000000>; 38 clock-output-names = "clkin_gmac"; 39 #clock-cells = <0>; 40 }; 41 42 vcc1v2_phy: vcc1v2-phy { 43 compatible = "regulator-fixed"; 44 regulator-name = "vcc1v2_phy"; 45 regulator-always-on; 46 regulator-boot-on; 47 regulator-min-microvolt = <1200000>; 48 regulator-max-microvolt = <1200000>; 49 vin-supply = <&vcc5v0_sys>; 50 }; 51 52 vcc3v3_sys: vcc3v3-sys { 53 compatible = "regulator-fixed"; 54 regulator-name = "vcc3v3_sys"; 55 regulator-always-on; 56 regulator-boot-on; 57 regulator-min-microvolt = <3300000>; 58 regulator-max-microvolt = <3300000>; 59 vin-supply = <&vcc5v0_sys>; 60 }; 61 62 vcc5v0_host: vcc5v0-host-regulator { 63 compatible = "regulator-fixed"; 64 gpio = <&gpio4 RK_PA3 GPIO_ACTIVE_LOW>; 65 pinctrl-names = "default"; 66 pinctrl-0 = <&vcc5v0_host_en>; 67 regulator-name = "vcc5v0_host"; 68 regulator-always-on; 69 vin-supply = <&vcc5v0_sys>; 70 }; 71 72 vcc5v0_sys: vcc5v0-sys { 73 compatible = "regulator-fixed"; 74 regulator-name = "vcc5v0_sys"; 75 regulator-always-on; 76 regulator-boot-on; 77 regulator-min-microvolt = <5000000>; 78 regulator-max-microvolt = <5000000>; 79 }; 80 81 vdd_log: vdd-log { 82 compatible = "pwm-regulator"; 83 pwms = <&pwm2 0 25000 1>; 84 pwm-supply = <&vcc5v0_sys>; 85 regulator-name = "vdd_log"; 86 regulator-min-microvolt = <800000>; 87 regulator-max-microvolt = <1400000>; 88 regulator-always-on; 89 regulator-boot-on; 90 }; 91 }; 92 93 &cpu_b0 { 94 cpu-supply = <&vdd_cpu_b>; 95 }; 96 97 &cpu_b1 { 98 cpu-supply = <&vdd_cpu_b>; 99 }; 100 101 &cpu_l0 { 102 cpu-supply = <&vdd_cpu_l>; 103 }; 104 105 &cpu_l1 { 106 cpu-supply = <&vdd_cpu_l>; 107 }; 108 109 &cpu_l2 { 110 cpu-supply = <&vdd_cpu_l>; 111 }; 112 113 &cpu_l3 { 114 cpu-supply = <&vdd_cpu_l>; 115 }; 116 117 &emmc_phy { 118 status = "okay"; 119 drive-impedance-ohm = <33>; 120 }; 121 122 &gmac { 123 assigned-clocks = <&cru SCLK_RMII_SRC>; 124 assigned-clock-parents = <&clkin_gmac>; 125 clock_in_out = "input"; 126 phy-supply = <&vcc1v2_phy>; 127 phy-mode = "rgmii"; 128 pinctrl-names = "default"; 129 pinctrl-0 = <&rgmii_pins>; 130 snps,reset-gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>; 131 snps,reset-active-low; 132 snps,reset-delays-us = <0 10000 50000>; 133 tx_delay = <0x10>; 134 rx_delay = <0x10>; 135 status = "okay"; 136 }; 137 138 &gpu { 139 mali-supply = <&vdd_gpu>; 140 status = "okay"; 141 }; 142 143 &i2c0 { 144 status = "okay"; 145 i2c-scl-rising-time-ns = <168>; 146 i2c-scl-falling-time-ns = <4>; 147 clock-frequency = <400000>; 148 149 rk808: pmic@1b { 150 compatible = "rockchip,rk808"; 151 reg = <0x1b>; 152 interrupt-parent = <&gpio1>; 153 interrupts = <22 IRQ_TYPE_LEVEL_LOW>; 154 #clock-cells = <1>; 155 clock-output-names = "xin32k", "rk808-clkout2"; 156 pinctrl-names = "default"; 157 pinctrl-0 = <&pmic_int_l>; 158 rockchip,system-power-controller; 159 wakeup-source; 160 161 vcc1-supply = <&vcc5v0_sys>; 162 vcc2-supply = <&vcc5v0_sys>; 163 vcc3-supply = <&vcc5v0_sys>; 164 vcc4-supply = <&vcc5v0_sys>; 165 vcc6-supply = <&vcc5v0_sys>; 166 vcc7-supply = <&vcc5v0_sys>; 167 vcc8-supply = <&vcc3v3_sys>; 168 vcc9-supply = <&vcc5v0_sys>; 169 vcc10-supply = <&vcc5v0_sys>; 170 vcc11-supply = <&vcc5v0_sys>; 171 vcc12-supply = <&vcc3v3_sys>; 172 vddio-supply = <&vcc1v8_pmu>; 173 174 regulators { 175 vdd_center: DCDC_REG1 { 176 regulator-name = "vdd_center"; 177 regulator-min-microvolt = <750000>; 178 regulator-max-microvolt = <1350000>; 179 regulator-ramp-delay = <6001>; 180 regulator-always-on; 181 regulator-boot-on; 182 regulator-state-mem { 183 regulator-off-in-suspend; 184 }; 185 }; 186 187 vdd_cpu_l: DCDC_REG2 { 188 regulator-name = "vdd_cpu_l"; 189 regulator-min-microvolt = <750000>; 190 regulator-max-microvolt = <1350000>; 191 regulator-ramp-delay = <6001>; 192 regulator-always-on; 193 regulator-boot-on; 194 regulator-state-mem { 195 regulator-off-in-suspend; 196 }; 197 }; 198 199 vcc_ddr: DCDC_REG3 { 200 regulator-name = "vcc_ddr"; 201 regulator-always-on; 202 regulator-boot-on; 203 regulator-state-mem { 204 regulator-on-in-suspend; 205 }; 206 }; 207 208 vcc_1v8: DCDC_REG4 { 209 regulator-name = "vcc_1v8"; 210 regulator-min-microvolt = <1800000>; 211 regulator-max-microvolt = <1800000>; 212 regulator-always-on; 213 regulator-boot-on; 214 regulator-state-mem { 215 regulator-on-in-suspend; 216 regulator-suspend-microvolt = <1800000>; 217 }; 218 }; 219 220 vcc_ldo1: LDO_REG1 { 221 regulator-name = "vcc_ldo1"; 222 regulator-min-microvolt = <1800000>; 223 regulator-max-microvolt = <1800000>; 224 regulator-boot-on; 225 regulator-state-mem { 226 regulator-off-in-suspend; 227 }; 228 }; 229 230 vcc1v8_hdmi: LDO_REG2 { 231 regulator-name = "vcc1v8_hdmi"; 232 regulator-min-microvolt = <1800000>; 233 regulator-max-microvolt = <1800000>; 234 regulator-always-on; 235 regulator-boot-on; 236 regulator-state-mem { 237 regulator-off-in-suspend; 238 }; 239 }; 240 241 vcc1v8_pmu: LDO_REG3 { 242 regulator-name = "vcc1v8_pmu"; 243 regulator-min-microvolt = <1800000>; 244 regulator-max-microvolt = <1800000>; 245 regulator-always-on; 246 regulator-boot-on; 247 regulator-state-mem { 248 regulator-on-in-suspend; 249 regulator-suspend-microvolt = <1800000>; 250 }; 251 }; 252 253 vcc_sd: LDO_REG4 { 254 regulator-name = "vcc_sd"; 255 regulator-min-microvolt = <1800000>; 256 regulator-max-microvolt = <3000000>; 257 regulator-always-on; 258 regulator-boot-on; 259 regulator-state-mem { 260 regulator-on-in-suspend; 261 regulator-suspend-microvolt = <3000000>; 262 }; 263 }; 264 265 vcc_ldo5: LDO_REG5 { 266 regulator-name = "vcc_ldo5"; 267 regulator-min-microvolt = <3000000>; 268 regulator-max-microvolt = <3000000>; 269 regulator-boot-on; 270 regulator-state-mem { 271 regulator-off-in-suspend; 272 }; 273 }; 274 275 vcc_ldo6: LDO_REG6 { 276 regulator-name = "vcc_ldo6"; 277 regulator-min-microvolt = <1500000>; 278 regulator-max-microvolt = <1500000>; 279 regulator-boot-on; 280 regulator-state-mem { 281 regulator-off-in-suspend; 282 }; 283 }; 284 285 vcc0v9_hdmi: LDO_REG7 { 286 regulator-name = "vcc0v9_hdmi"; 287 regulator-min-microvolt = <900000>; 288 regulator-max-microvolt = <900000>; 289 regulator-always-on; 290 regulator-boot-on; 291 regulator-state-mem { 292 regulator-off-in-suspend; 293 }; 294 }; 295 296 vcc_efuse: LDO_REG8 { 297 regulator-name = "vcc_efuse"; 298 regulator-min-microvolt = <1800000>; 299 regulator-max-microvolt = <1800000>; 300 regulator-always-on; 301 regulator-boot-on; 302 regulator-state-mem { 303 regulator-off-in-suspend; 304 }; 305 }; 306 307 vcc3v3_s3: SWITCH_REG1 { 308 regulator-name = "vcc3v3_s3"; 309 regulator-always-on; 310 regulator-boot-on; 311 regulator-state-mem { 312 regulator-off-in-suspend; 313 }; 314 }; 315 316 vcc3v3_s0: SWITCH_REG2 { 317 regulator-name = "vcc3v3_s0"; 318 regulator-always-on; 319 regulator-boot-on; 320 regulator-state-mem { 321 regulator-off-in-suspend; 322 }; 323 }; 324 }; 325 }; 326 327 vdd_gpu: regulator@60 { 328 compatible = "fcs,fan53555"; 329 reg = <0x60>; 330 fcs,suspend-voltage-selector = <1>; 331 regulator-name = "vdd_gpu"; 332 regulator-min-microvolt = <600000>; 333 regulator-max-microvolt = <1230000>; 334 regulator-ramp-delay = <1000>; 335 regulator-always-on; 336 regulator-boot-on; 337 vin-supply = <&vcc5v0_sys>; 338 }; 339 }; 340 341 &i2c7 { 342 status = "okay"; 343 clock-frequency = <400000>; 344 345 fan: fan@18 { 346 compatible = "ti,amc6821"; 347 reg = <0x18>; 348 #cooling-cells = <2>; 349 }; 350 351 rtc_twi: rtc@6f { 352 compatible = "isil,isl1208"; 353 reg = <0x6f>; 354 }; 355 }; 356 357 &i2c8 { 358 status = "okay"; 359 clock-frequency = <400000>; 360 361 vdd_cpu_b: regulator@60 { 362 compatible = "fcs,fan53555"; 363 reg = <0x60>; 364 vin-supply = <&vcc5v0_sys>; 365 regulator-name = "vdd_cpu_b"; 366 regulator-min-microvolt = <600000>; 367 regulator-max-microvolt = <1230000>; 368 regulator-ramp-delay = <1000>; 369 fcs,suspend-voltage-selector = <1>; 370 regulator-always-on; 371 regulator-boot-on; 372 }; 373 }; 374 375 &i2s0 { 376 pinctrl-0 = <&i2s0_2ch_bus>; 377 rockchip,playback-channels = <2>; 378 rockchip,capture-channels = <2>; 379 status = "okay"; 380 }; 381 382 /* 383 * As Q7 does not specify neither a global nor a RX clock for I2S these 384 * signals are not used. Furthermore I2S0_LRCK_RX is used as GPIO. 385 * Therefore we have to redefine the i2s0_2ch_bus definition to prevent 386 * conflicts. 387 */ 388 &i2s0_2ch_bus { 389 rockchip,pins = 390 <3 RK_PD0 1 &pcfg_pull_none>, 391 <3 RK_PD2 1 &pcfg_pull_none>, 392 <3 RK_PD3 1 &pcfg_pull_none>, 393 <3 RK_PD7 1 &pcfg_pull_none>; 394 }; 395 396 &io_domains { 397 status = "okay"; 398 bt656-supply = <&vcc_1v8>; 399 audio-supply = <&vcc_1v8>; 400 sdmmc-supply = <&vcc_sd>; 401 gpio1830-supply = <&vcc_1v8>; 402 }; 403 404 &pmu_io_domains { 405 status = "okay"; 406 pmu1830-supply = <&vcc_1v8>; 407 }; 408 409 &pwm2 { 410 status = "okay"; 411 }; 412 413 &pinctrl { 414 i2c8 { 415 i2c8_xfer_a: i2c8-xfer { 416 rockchip,pins = 417 <1 RK_PC4 1 &pcfg_pull_up>, 418 <1 RK_PC5 1 &pcfg_pull_up>; 419 }; 420 }; 421 422 leds { 423 module_led_pin: module-led-pin { 424 rockchip,pins = 425 <2 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; 426 }; 427 }; 428 429 pmic { 430 pmic_int_l: pmic-int-l { 431 rockchip,pins = 432 <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>; 433 }; 434 }; 435 436 usb2 { 437 vcc5v0_host_en: vcc5v0-host-en { 438 rockchip,pins = 439 <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; 440 }; 441 }; 442 443 usb3 { 444 usb3_id: usb3-id { 445 rockchip,pins = 446 <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; 447 }; 448 }; 449 }; 450 451 &sdhci { 452 /* 453 * Signal integrity isn't great at 200MHz but 100MHz has proven stable 454 * enough. 455 */ 456 max-frequency = <100000000>; 457 458 bus-width = <8>; 459 mmc-hs400-1_8v; 460 mmc-hs400-enhanced-strobe; 461 non-removable; 462 status = "okay"; 463 }; 464 465 &sdmmc { 466 vqmmc-supply = <&vcc_sd>; 467 }; 468 469 &spi1 { 470 status = "okay"; 471 472 norflash: flash@0 { 473 compatible = "jedec,spi-nor"; 474 reg = <0>; 475 spi-max-frequency = <50000000>; 476 }; 477 }; 478 479 &tcphy1 { 480 status = "okay"; 481 }; 482 483 &tsadc { 484 rockchip,hw-tshut-mode = <1>; 485 rockchip,hw-tshut-polarity = <1>; 486 status = "okay"; 487 }; 488 489 &u2phy1 { 490 status = "okay"; 491 492 u2phy1_otg: otg-port { 493 status = "okay"; 494 }; 495 496 u2phy1_host: host-port { 497 phy-supply = <&vcc5v0_host>; 498 status = "okay"; 499 }; 500 }; 501 502 &usbdrd3_1 { 503 status = "okay"; 504 }; 505 506 &usbdrd_dwc3_1 { 507 status = "okay"; 508 dr_mode = "host"; 509 }; 510 511 &usb_host1_ehci { 512 status = "okay"; 513 }; 514 515 &usb_host1_ohci { 516 status = "okay"; 517 };
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