rk3566-soquartz-cm4.dts

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    1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
    2 
    3 /dts-v1/;
    4 
    5 #include "rk3566-soquartz.dtsi"
    6 
    7 / {
    8         model = "Pine64 RK3566 SoQuartz with CM4-IO Carrier Board";
    9         compatible = "pine64,soquartz-cm4io", "pine64,soquartz", "rockchip,rk3566";
   10 
   11         /* labeled +12v in schematic */
   12         vcc12v_dcin: vcc12v-dcin-regulator {
   13                 compatible = "regulator-fixed";
   14                 regulator-name = "vcc12v_dcin";
   15                 regulator-always-on;
   16                 regulator-boot-on;
   17                 regulator-min-microvolt = <12000000>;
   18                 regulator-max-microvolt = <12000000>;
   19         };
   20 
   21         /* labeled +5v in schematic */
   22         vcc_5v: vcc-5v-regulator {
   23                 compatible = "regulator-fixed";
   24                 regulator-name = "vcc_5v";
   25                 regulator-always-on;
   26                 regulator-boot-on;
   27                 regulator-min-microvolt = <5000000>;
   28                 regulator-max-microvolt = <5000000>;
   29                 vin-supply = <&vcc12v_dcin>;
   30         };
   31 };
   32 
   33 &gmac1 {
   34         status = "okay";
   35 };
   36 
   37 /*
   38  * i2c1 is exposed on CM1 / Module1A
   39  * pin 80 - SCL0 - i2c1_scl_m0, pullup to vcc3v3_pmu
   40  * pin 82 - SDA0 - i2c1_sda_m0, pullup to vcc3v3_pmu
   41  */
   42 &i2c1 {
   43         status = "okay";
   44 
   45         /*
   46          * the rtc interrupt is tied to PMIC_PWRON,
   47          * it will force reset the board if triggered.
   48          */
   49         pcf85063: rtc@51 {
   50                 compatible = "nxp,pcf85063";
   51                 reg = <0x51>;
   52         };
   53 };
   54 
   55 /*
   56  * i2c2 is exposed on CM1 / Module1A - to PI40
   57  * pin 56 - GPIO3 - i2c2_scl_m1, pullup to vcc_3v3, shared with i2s1_8ch
   58  * pin 58 - GPIO2 - i2c2_sda_m1, pullup to vcc_3v3
   59  */
   60 &i2c2 {
   61         status = "disabled";
   62 };
   63 
   64 /*
   65  * i2c3 is exposed on CM1 / Module1A - to PI40
   66  * pin 35 - ID_SC(GPIO28) - i2c3_scl_m0, pullup to vcc_3v3
   67  * pin 36 - ID_SD(GPIO27) - i2c3_sda_m0, pullup to vcc_3v3
   68  */
   69 &i2c3 {
   70         status = "disabled";
   71 };
   72 
   73 /*
   74  * i2c4 is exposed on CM2 / Module1B - to PI40
   75  * pin 45 - GPIO24 - i2c4_scl_m1
   76  * pin 47 - GPIO23 - i2c4_sda_m1
   77  */
   78 &i2c4 {
   79         status = "disabled";
   80 };
   81 
   82 /*
   83  * i2s1_8ch is exposed on CM1 / Module1A - to PI40
   84  * pin 24 - GPIO26 - i2s1_sdi1_m1
   85  * pin 25 - GPIO21 - i2s1_sdo0_m1
   86  * pin 26 - GPIO19 - i2s1_lrck_tx_m1
   87  * pin 27 - GPIO20 - i2s1_sdi0_m1
   88  * pin 29 - GPIO16 - i2s1_sdi3_m1
   89  * pin 30 - GPIO6  - i2s1_sdi2_m1
   90  * pin 40 - GPIO9  - i2s1_sdo1_m1, shared with spi3
   91  * pin 41 - GPIO25 - i2s1_sdo2_m1
   92  * pin 49 - GPIO18 - i2s1_sclk_tx_m1
   93  * pin 50 - GPIO17 - i2s1_mclk_m1
   94  * pin 56 - GPIO3  - i2s1_sdo3_m1, shared with i2c2
   95  */
   96 &i2s1_8ch {
   97         status = "disabled";
   98 };
   99 
  100 &led_diy {
  101         status = "okay";
  102 };
  103 
  104 &led_work {
  105         status = "okay";
  106 };
  107 
  108 &rgmii_phy1 {
  109         status = "okay";
  110 };
  111 
  112 /*
  113  * saradc is exposed on CM1 / Module1A - to J2
  114  * pin 94 - AIN1 - saradc_vin3
  115  * pin 96 - AIN0 - saradc_vin2
  116  */
  117 &saradc {
  118         status = "disabled";
  119 };
  120 
  121 &sdmmc0 {
  122         vmmc-supply = <&sdmmc_pwr>;
  123         status = "okay";
  124 };
  125 
  126 &sdmmc_pwr {
  127         regulator-min-microvolt = <3300000>;
  128         regulator-max-microvolt = <3300000>;
  129         status = "okay";
  130 };
  131 
  132 /*
  133  *  spi3 is exposed on CM1 / Module1A - to PI40
  134  * pin 37 - GPIO7  - spi3_cs1_m0
  135  * pin 38 - GPIO11 - spi3_clk_m0
  136  * pin 39 - GPIO8  - spi3_cs0_m0
  137  * pin 40 - GPIO9  - spi3_miso_m0, shared with i2s1_8ch
  138  * pin 44 - GPIO10 - spi3_mosi_m0
  139  */
  140 &spi3 {
  141         status = "disabled";
  142 };
  143 
  144 /*
  145  * uart2 is exposed on CM1 / Module1A - to PI40
  146  * pin 51 - GPIO15 - uart2_rx_m0
  147  * pin 55 - GPIO14 - uart2_tx_m0
  148  */
  149 &uart2 {
  150         status = "okay";
  151 };
  152 
  153 /*
  154  * uart7 is exposed on CM1 / Module1A - to PI40
  155  * pin 46 - GPIO22 - uart7_tx_m2
  156  * pin 47 - GPIO23 - uart7_rx_m2
  157  */
  158 &uart7 {
  159         status = "okay";
  160 };
  161 
  162 &usb2phy0 {
  163         status = "okay";
  164 };
  165 
  166 &usb2phy0_otg {
  167         phy-supply = <&vcc_5v>;
  168         status = "okay";
  169 };
  170 
  171 &usb_host0_xhci {
  172         status = "okay";
  173 };
  174 
  175 &vbus {
  176         vin-supply = <&vcc_5v>;
  177 };

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FreeBSD/Linux Kernel Cross Reference sys/contrib/device-tree/src/arm64/rockchip/rk3566-soquartz-cm4.dts

FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/src/arm64/rockchip/rk3566-soquartz-cm4.dts