sharkl3.dtsi

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    1 // SPDX-License-Identifier: GPL-2.0-only
    2 /*
    3  * Unisoc Sharkl3 platform DTS file
    4  *
    5  * Copyright (C) 2019, Unisoc Inc.
    6  */
    7 
    8 / {
    9         interrupt-parent = <&gic>;
   10         #address-cells = <2>;
   11         #size-cells = <2>;
   12 
   13         soc: soc {
   14                 compatible = "simple-bus";
   15                 #address-cells = <2>;
   16                 #size-cells = <2>;
   17                 ranges;
   18 
   19                 ap_ahb_regs: syscon@20e00000 {
   20                         compatible = "sprd,sc9863a-glbregs", "syscon",
   21                                      "simple-mfd";
   22                         reg = <0 0x20e00000 0 0x4000>;
   23                         #address-cells = <1>;
   24                         #size-cells = <1>;
   25                         ranges = <0 0 0x20e00000 0x4000>;
   26 
   27                         apahb_gate: apahb-gate {
   28                                 compatible = "sprd,sc9863a-apahb-gate";
   29                                 reg = <0x0 0x1020>;
   30                                 #clock-cells = <1>;
   31                         };
   32                 };
   33 
   34                 pmu_regs: syscon@402b0000 {
   35                         compatible = "sprd,sc9863a-glbregs", "syscon",
   36                                      "simple-mfd";
   37                         reg = <0 0x402b0000 0 0x4000>;
   38                         #address-cells = <1>;
   39                         #size-cells = <1>;
   40                         ranges = <0 0 0x402b0000 0x4000>;
   41 
   42                         pmu_gate: pmu-gate {
   43                                 compatible = "sprd,sc9863a-pmu-gate";
   44                                 reg = <0 0x1200>;
   45                                 clocks = <&ext_26m>;
   46                                 clock-names = "ext-26m";
   47                                 #clock-cells = <1>;
   48                         };
   49                 };
   50 
   51                 aon_apb_regs: syscon@402e0000 {
   52                         compatible = "sprd,sc9863a-glbregs", "syscon",
   53                                      "simple-mfd";
   54                         reg = <0 0x402e0000 0 0x4000>;
   55                         #address-cells = <1>;
   56                         #size-cells = <1>;
   57                         ranges = <0 0 0x402e0000 0x4000>;
   58 
   59                         aonapb_gate: aonapb-gate {
   60                                 compatible = "sprd,sc9863a-aonapb-gate";
   61                                 reg = <0 0x1100>;
   62                                 #clock-cells = <1>;
   63                         };
   64                 };
   65 
   66                 anlg_phy_g2_regs: syscon@40353000 {
   67                         compatible = "sprd,sc9863a-glbregs", "syscon",
   68                                      "simple-mfd";
   69                         reg = <0 0x40353000 0 0x3000>;
   70                         #address-cells = <1>;
   71                         #size-cells = <1>;
   72                         ranges = <0 0 0x40353000 0x3000>;
   73 
   74                         pll: pll {
   75                                 compatible = "sprd,sc9863a-pll";
   76                                 reg = <0 0x100>;
   77                                 clocks = <&ext_26m>;
   78                                 clock-names = "ext-26m";
   79                                 #clock-cells = <1>;
   80                         };
   81                 };
   82 
   83                 anlg_phy_g4_regs: syscon@40359000 {
   84                         compatible = "sprd,sc9863a-glbregs", "syscon",
   85                                      "simple-mfd";
   86                         reg = <0 0x40359000 0 0x3000>;
   87                         #address-cells = <1>;
   88                         #size-cells = <1>;
   89                         ranges = <0 0 0x40359000 0x3000>;
   90 
   91                         mpll: mpll {
   92                                 compatible = "sprd,sc9863a-mpll";
   93                                 reg = <0 0x100>;
   94                                 #clock-cells = <1>;
   95                         };
   96                 };
   97 
   98                 anlg_phy_g5_regs: syscon@4035c000 {
   99                         compatible = "sprd,sc9863a-glbregs", "syscon",
  100                                      "simple-mfd";
  101                         reg = <0 0x4035c000 0 0x3000>;
  102                         #address-cells = <1>;
  103                         #size-cells = <1>;
  104                         ranges = <0 0 0x4035c000 0x3000>;
  105 
  106                         rpll: rpll {
  107                                 compatible = "sprd,sc9863a-rpll";
  108                                 reg = <0 0x100>;
  109                                 clocks = <&ext_26m>;
  110                                 clock-names = "ext-26m";
  111                                 #clock-cells = <1>;
  112                         };
  113                 };
  114 
  115                 anlg_phy_g7_regs: syscon@40363000 {
  116                         compatible = "sprd,sc9863a-glbregs", "syscon",
  117                                      "simple-mfd";
  118                         reg = <0 0x40363000 0 0x3000>;
  119                         #address-cells = <1>;
  120                         #size-cells = <1>;
  121                         ranges = <0 0 0x40363000 0x3000>;
  122 
  123                         dpll: dpll {
  124                                 compatible = "sprd,sc9863a-dpll";
  125                                 reg = <0 0x100>;
  126                                 #clock-cells = <1>;
  127                         };
  128                 };
  129 
  130                 mm_ahb_regs: syscon@60800000 {
  131                         compatible = "sprd,sc9863a-glbregs", "syscon",
  132                                      "simple-mfd";
  133                         reg = <0 0x60800000 0 0x1000>;
  134                         #address-cells = <1>;
  135                         #size-cells = <1>;
  136                         ranges = <0 0 0x60800000 0x3000>;
  137 
  138                         mm_gate: mm-gate {
  139                                 compatible = "sprd,sc9863a-mm-gate";
  140                                 reg = <0 0x1100>;
  141                                 #clock-cells = <1>;
  142                         };
  143                 };
  144 
  145                 ap_apb_regs: syscon@71300000 {
  146                         compatible = "sprd,sc9863a-glbregs", "syscon",
  147                                      "simple-mfd";
  148                         reg = <0 0x71300000 0 0x4000>;
  149                         #address-cells = <1>;
  150                         #size-cells = <1>;
  151                         ranges = <0 0 0x71300000 0x4000>;
  152 
  153                         apapb_gate: apapb-gate {
  154                                 compatible = "sprd,sc9863a-apapb-gate";
  155                                 reg = <0 0x1000>;
  156                                 clocks = <&ext_26m>;
  157                                 clock-names = "ext-26m";
  158                                 #clock-cells = <1>;
  159                         };
  160                 };
  161 
  162                 apb@70000000 {
  163                         compatible = "simple-bus";
  164                         #address-cells = <1>;
  165                         #size-cells = <1>;
  166                         ranges = <0 0x0 0x70000000 0x10000000>;
  167 
  168                         uart0: serial@0 {
  169                                 compatible = "sprd,sc9863a-uart",
  170                                              "sprd,sc9836-uart";
  171                                 reg = <0x0 0x100>;
  172                                 interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
  173                                 clocks = <&ext_26m>;
  174                                 status = "disabled";
  175                         };
  176 
  177                         uart1: serial@100000 {
  178                                 compatible = "sprd,sc9863a-uart",
  179                                              "sprd,sc9836-uart";
  180                                 reg = <0x100000 0x100>;
  181                                 interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
  182                                 clocks = <&ext_26m>;
  183                                 status = "disabled";
  184                         };
  185 
  186                         uart2: serial@200000 {
  187                                 compatible = "sprd,sc9863a-uart",
  188                                              "sprd,sc9836-uart";
  189                                 reg = <0x200000 0x100>;
  190                                 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
  191                                 clocks = <&ext_26m>;
  192                                 status = "disabled";
  193                         };
  194 
  195                         uart3: serial@300000 {
  196                                 compatible = "sprd,sc9863a-uart",
  197                                              "sprd,sc9836-uart";
  198                                 reg = <0x300000 0x100>;
  199                                 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
  200                                 clocks = <&ext_26m>;
  201                                 status = "disabled";
  202                         };
  203 
  204                         uart4: serial@400000 {
  205                                 compatible = "sprd,sc9863a-uart",
  206                                              "sprd,sc9836-uart";
  207                                 reg = <0x400000 0x100>;
  208                                 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
  209                                 clocks = <&ext_26m>;
  210                                 status = "disabled";
  211                         };
  212                 };
  213         };
  214 
  215         ext_26m: ext-26m {
  216                 compatible = "fixed-clock";
  217                 #clock-cells = <0>;
  218                 clock-frequency = <26000000>;
  219                 clock-output-names = "ext-26m";
  220         };
  221 
  222         ext_32k: ext-32k {
  223                 compatible = "fixed-clock";
  224                 #clock-cells = <0>;
  225                 clock-frequency = <32768>;
  226                 clock-output-names = "ext-32k";
  227         };
  228 
  229         ext_4m: ext-4m {
  230                 compatible = "fixed-clock";
  231                 #clock-cells = <0>;
  232                 clock-frequency = <4000000>;
  233                 clock-output-names = "ext-4m";
  234         };
  235 
  236         rco_100m: rco-100m {
  237                 compatible = "fixed-clock";
  238                 #clock-cells = <0>;
  239                 clock-frequency = <100000000>;
  240                 clock-output-names = "rco-100m";
  241         };
  242 };

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FreeBSD/Linux Kernel Cross Reference sys/contrib/device-tree/src/arm64/sprd/sharkl3.dtsi

FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/src/arm64/sprd/sharkl3.dtsi