The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)

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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/src/arm64/ti/k3-am64-mcu.dtsi

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    1 // SPDX-License-Identifier: GPL-2.0
    2 /*
    3  * Device Tree Source for AM64 SoC Family MCU Domain peripherals
    4  *
    5  * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
    6  */
    7 
    8 &cbass_mcu {
    9         mcu_uart0: serial@4a00000 {
   10                 compatible = "ti,am64-uart", "ti,am654-uart";
   11                 reg = <0x00 0x04a00000 0x00 0x100>;
   12                 interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>;
   13                 current-speed = <115200>;
   14                 power-domains = <&k3_pds 149 TI_SCI_PD_EXCLUSIVE>;
   15                 clocks = <&k3_clks 149 0>;
   16                 clock-names = "fclk";
   17         };
   18 
   19         mcu_uart1: serial@4a10000 {
   20                 compatible = "ti,am64-uart", "ti,am654-uart";
   21                 reg = <0x00 0x04a10000 0x00 0x100>;
   22                 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
   23                 current-speed = <115200>;
   24                 power-domains = <&k3_pds 160 TI_SCI_PD_EXCLUSIVE>;
   25                 clocks = <&k3_clks 160 0>;
   26                 clock-names = "fclk";
   27         };
   28 
   29         mcu_i2c0: i2c@4900000 {
   30                 compatible = "ti,am64-i2c", "ti,omap4-i2c";
   31                 reg = <0x00 0x04900000 0x00 0x100>;
   32                 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
   33                 #address-cells = <1>;
   34                 #size-cells = <0>;
   35                 power-domains = <&k3_pds 106 TI_SCI_PD_EXCLUSIVE>;
   36                 clocks = <&k3_clks 106 2>;
   37                 clock-names = "fck";
   38         };
   39 
   40         mcu_i2c1: i2c@4910000 {
   41                 compatible = "ti,am64-i2c", "ti,omap4-i2c";
   42                 reg = <0x00 0x04910000 0x00 0x100>;
   43                 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
   44                 #address-cells = <1>;
   45                 #size-cells = <0>;
   46                 power-domains = <&k3_pds 107 TI_SCI_PD_EXCLUSIVE>;
   47                 clocks = <&k3_clks 107 2>;
   48                 clock-names = "fck";
   49         };
   50 
   51         mcu_spi0: spi@4b00000 {
   52                 compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
   53                 reg = <0x00 0x04b00000 0x00 0x400>;
   54                 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
   55                 #address-cells = <1>;
   56                 #size-cells = <0>;
   57                 power-domains = <&k3_pds 147 TI_SCI_PD_EXCLUSIVE>;
   58                 clocks = <&k3_clks 147 0>;
   59         };
   60 
   61         mcu_spi1: spi@4b10000 {
   62                 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
   63                 reg = <0x00 0x04b10000 0x00 0x400>;
   64                 interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>;
   65                 #address-cells = <1>;
   66                 #size-cells = <0>;
   67                 power-domains = <&k3_pds 148 TI_SCI_PD_EXCLUSIVE>;
   68                 clocks = <&k3_clks 148 0>;
   69         };
   70 
   71         mcu_gpio_intr: interrupt-controller@4210000 {
   72                 compatible = "ti,sci-intr";
   73                 reg = <0x00 0x04210000 0x00 0x200>;
   74                 ti,intr-trigger-type = <1>;
   75                 interrupt-controller;
   76                 interrupt-parent = <&gic500>;
   77                 #interrupt-cells = <1>;
   78                 ti,sci = <&dmsc>;
   79                 ti,sci-dev-id = <5>;
   80                 ti,interrupt-ranges = <0 104 4>;
   81         };
   82 
   83         mcu_gpio0: gpio@4201000 {
   84                 compatible = "ti,am64-gpio", "ti,keystone-gpio";
   85                 reg = <0x0 0x4201000 0x0 0x100>;
   86                 gpio-controller;
   87                 #gpio-cells = <2>;
   88                 interrupt-parent = <&mcu_gpio_intr>;
   89                 interrupts = <30>, <31>;
   90                 interrupt-controller;
   91                 #interrupt-cells = <2>;
   92                 ti,ngpio = <23>;
   93                 ti,davinci-gpio-unbanked = <0>;
   94                 power-domains = <&k3_pds 79 TI_SCI_PD_EXCLUSIVE>;
   95                 clocks = <&k3_clks 79 0>;
   96                 clock-names = "gpio";
   97         };
   98 
   99         mcu_pmx0: pinctrl@4084000 {
  100                 compatible = "pinctrl-single";
  101                 reg = <0x00 0x4084000 0x00 0x84>;
  102                 #pinctrl-cells = <1>;
  103                 pinctrl-single,register-width = <32>;
  104                 pinctrl-single,function-mask = <0xffffffff>;
  105         };
  106 };

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